Lines Matching +full:power +full:- +full:limits

3 /*-
58 uint8_t power[RTWN_RIDX_COUNT]) in r92c_dump_txpower()
62 if (sc->sc_debug & RTWN_DEBUG_TXPWR) { in r92c_dump_txpower()
69 power[RTWN_RIDX_CCK1], in r92c_dump_txpower()
70 power[RTWN_RIDX_CCK2], in r92c_dump_txpower()
71 power[RTWN_RIDX_CCK55], in r92c_dump_txpower()
72 power[RTWN_RIDX_CCK11]); in r92c_dump_txpower()
78 power[RTWN_RIDX_OFDM6], in r92c_dump_txpower()
79 power[RTWN_RIDX_OFDM9], in r92c_dump_txpower()
80 power[RTWN_RIDX_OFDM12], in r92c_dump_txpower()
81 power[RTWN_RIDX_OFDM18], in r92c_dump_txpower()
82 power[RTWN_RIDX_OFDM24], in r92c_dump_txpower()
83 power[RTWN_RIDX_OFDM36], in r92c_dump_txpower()
84 power[RTWN_RIDX_OFDM48], in r92c_dump_txpower()
85 power[RTWN_RIDX_OFDM54]); in r92c_dump_txpower()
87 for (i = 0; i < sc->ntxchains; i++) { in r92c_dump_txpower()
89 "TX [%d]: MCS%d-%d: %d %d %d %d %d %d %d %d\n", in r92c_dump_txpower()
93 power[RTWN_RIDX_HT_MCS(i * 8 + 0)], in r92c_dump_txpower()
94 power[RTWN_RIDX_HT_MCS(i * 8 + 1)], in r92c_dump_txpower()
95 power[RTWN_RIDX_HT_MCS(i * 8 + 2)], in r92c_dump_txpower()
96 power[RTWN_RIDX_HT_MCS(i * 8 + 3)], in r92c_dump_txpower()
97 power[RTWN_RIDX_HT_MCS(i * 8 + 4)], in r92c_dump_txpower()
98 power[RTWN_RIDX_HT_MCS(i * 8 + 5)], in r92c_dump_txpower()
99 power[RTWN_RIDX_HT_MCS(i * 8 + 6)], in r92c_dump_txpower()
100 power[RTWN_RIDX_HT_MCS(i * 8 + 7)]); in r92c_dump_txpower()
119 return (-1); in r92c_get_power_group()
122 KASSERT(0, ("wrong channel band (flags %08X)\n", c->ic_flags)); in r92c_get_power_group()
123 return (-1); in r92c_get_power_group()
132 struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT]) in r92c_get_txpower()
134 const struct ieee80211com *ic = &sc->sc_ic; in r92c_get_txpower()
135 struct r92c_softc *rs = sc->sc_priv; in r92c_get_txpower()
136 struct rtwn_r92c_txpwr *rt = rs->rs_txpwr; in r92c_get_txpower()
137 const struct rtwn_r92c_txagc *base = rs->rs_txagc; in r92c_get_txpower()
143 if (group == -1) { /* shouldn't happen */ in r92c_get_txpower()
144 device_printf(sc->sc_dev, "%s: incorrect channel\n", __func__); in r92c_get_txpower()
152 * target power in dBm. in r92c_get_txpower()
155 max_mcs = RTWN_RIDX_HT_MCS(sc->ntxchains * 8 - 1); in r92c_get_txpower()
158 if (rs->regulatory == 0) { in r92c_get_txpower()
160 power[ridx] = base[chain].pwr[0][ridx]; in r92c_get_txpower()
163 if (rs->regulatory == 3) { in r92c_get_txpower()
164 power[ridx] = base[chain].pwr[0][ridx]; in r92c_get_txpower()
165 /* Apply vendor limits. */ in r92c_get_txpower()
167 max = rt->ht40_max_pwr[chain][group]; in r92c_get_txpower()
169 max = rt->ht20_max_pwr[chain][group]; in r92c_get_txpower()
170 if (power[ridx] > max) in r92c_get_txpower()
171 power[ridx] = max; in r92c_get_txpower()
172 } else if (rs->regulatory == 1) { in r92c_get_txpower()
174 power[ridx] = base[chain].pwr[group][ridx]; in r92c_get_txpower()
175 } else if (rs->regulatory != 2) in r92c_get_txpower()
176 power[ridx] = base[chain].pwr[0][ridx]; in r92c_get_txpower()
179 /* Compute per-CCK rate Tx power. */ in r92c_get_txpower()
181 power[ridx] += rt->cck_tx_pwr[chain][group]; in r92c_get_txpower()
183 htpow = rt->ht40_1s_tx_pwr[chain][group]; in r92c_get_txpower()
184 if (sc->ntxchains > 1) { in r92c_get_txpower()
186 diff = rt->ht40_2s_tx_pwr_diff[chain][group]; in r92c_get_txpower()
187 htpow = (htpow > diff) ? htpow - diff : 0; in r92c_get_txpower()
190 /* Compute per-OFDM rate Tx power. */ in r92c_get_txpower()
191 diff = rt->ofdm_tx_pwr_diff[chain][group]; in r92c_get_txpower()
192 ofdmpow = htpow + diff; /* HT->OFDM correction. */ in r92c_get_txpower()
194 power[ridx] += ofdmpow; in r92c_get_txpower()
196 /* Compute per-MCS Tx power. */ in r92c_get_txpower()
198 diff = rt->ht20_tx_pwr_diff[chain][group]; in r92c_get_txpower()
199 htpow += diff; /* HT40->HT20 correction. */ in r92c_get_txpower()
202 power[ridx] += htpow; in r92c_get_txpower()
206 if (power[ridx] > R92C_MAX_TX_PWR) in r92c_get_txpower()
207 power[ridx] = R92C_MAX_TX_PWR; in r92c_get_txpower()
208 /* Apply net80211 limits */ in r92c_get_txpower()
209 if (power[ridx] > ic->ic_txpowlimit) in r92c_get_txpower()
210 power[ridx] = ic->ic_txpowlimit; in r92c_get_txpower()
217 uint8_t power[RTWN_RIDX_COUNT]) in r92c_write_txpower()
221 /* Write per-CCK rate Tx power. */ in r92c_write_txpower()
224 reg = RW(reg, R92C_TXAGC_A_CCK1, power[RTWN_RIDX_CCK1]); in r92c_write_txpower()
227 reg = RW(reg, R92C_TXAGC_A_CCK2, power[RTWN_RIDX_CCK2]); in r92c_write_txpower()
228 reg = RW(reg, R92C_TXAGC_A_CCK55, power[RTWN_RIDX_CCK55]); in r92c_write_txpower()
229 reg = RW(reg, R92C_TXAGC_A_CCK11, power[RTWN_RIDX_CCK11]); in r92c_write_txpower()
233 reg = RW(reg, R92C_TXAGC_B_CCK1, power[RTWN_RIDX_CCK1]); in r92c_write_txpower()
234 reg = RW(reg, R92C_TXAGC_B_CCK2, power[RTWN_RIDX_CCK2]); in r92c_write_txpower()
235 reg = RW(reg, R92C_TXAGC_B_CCK55, power[RTWN_RIDX_CCK55]); in r92c_write_txpower()
238 reg = RW(reg, R92C_TXAGC_B_CCK11, power[RTWN_RIDX_CCK11]); in r92c_write_txpower()
241 /* Write per-OFDM rate Tx power. */ in r92c_write_txpower()
243 SM(R92C_TXAGC_RATE06, power[RTWN_RIDX_OFDM6]) | in r92c_write_txpower()
244 SM(R92C_TXAGC_RATE09, power[RTWN_RIDX_OFDM9]) | in r92c_write_txpower()
245 SM(R92C_TXAGC_RATE12, power[RTWN_RIDX_OFDM12]) | in r92c_write_txpower()
246 SM(R92C_TXAGC_RATE18, power[RTWN_RIDX_OFDM18])); in r92c_write_txpower()
248 SM(R92C_TXAGC_RATE24, power[RTWN_RIDX_OFDM24]) | in r92c_write_txpower()
249 SM(R92C_TXAGC_RATE36, power[RTWN_RIDX_OFDM36]) | in r92c_write_txpower()
250 SM(R92C_TXAGC_RATE48, power[RTWN_RIDX_OFDM48]) | in r92c_write_txpower()
251 SM(R92C_TXAGC_RATE54, power[RTWN_RIDX_OFDM54])); in r92c_write_txpower()
252 /* Write per-MCS Tx power. */ in r92c_write_txpower()
254 SM(R92C_TXAGC_MCS00, power[RTWN_RIDX_HT_MCS(0)]) | in r92c_write_txpower()
255 SM(R92C_TXAGC_MCS01, power[RTWN_RIDX_HT_MCS(1)]) | in r92c_write_txpower()
256 SM(R92C_TXAGC_MCS02, power[RTWN_RIDX_HT_MCS(2)]) | in r92c_write_txpower()
257 SM(R92C_TXAGC_MCS03, power[RTWN_RIDX_HT_MCS(3)])); in r92c_write_txpower()
259 SM(R92C_TXAGC_MCS04, power[RTWN_RIDX_HT_MCS(4)]) | in r92c_write_txpower()
260 SM(R92C_TXAGC_MCS05, power[RTWN_RIDX_HT_MCS(5)]) | in r92c_write_txpower()
261 SM(R92C_TXAGC_MCS06, power[RTWN_RIDX_HT_MCS(6)]) | in r92c_write_txpower()
262 SM(R92C_TXAGC_MCS07, power[RTWN_RIDX_HT_MCS(7)])); in r92c_write_txpower()
263 if (sc->ntxchains >= 2) { in r92c_write_txpower()
265 SM(R92C_TXAGC_MCS08, power[RTWN_RIDX_HT_MCS(8)]) | in r92c_write_txpower()
266 SM(R92C_TXAGC_MCS09, power[RTWN_RIDX_HT_MCS(9)]) | in r92c_write_txpower()
267 SM(R92C_TXAGC_MCS10, power[RTWN_RIDX_HT_MCS(10)]) | in r92c_write_txpower()
268 SM(R92C_TXAGC_MCS11, power[RTWN_RIDX_HT_MCS(11)])); in r92c_write_txpower()
270 SM(R92C_TXAGC_MCS12, power[RTWN_RIDX_HT_MCS(12)]) | in r92c_write_txpower()
271 SM(R92C_TXAGC_MCS13, power[RTWN_RIDX_HT_MCS(13)]) | in r92c_write_txpower()
272 SM(R92C_TXAGC_MCS14, power[RTWN_RIDX_HT_MCS(14)]) | in r92c_write_txpower()
273 SM(R92C_TXAGC_MCS15, power[RTWN_RIDX_HT_MCS(15)])); in r92c_write_txpower()
280 uint8_t power[RTWN_RIDX_COUNT]; in r92c_set_txpower() local
283 for (i = 0; i < sc->ntxchains; i++) { in r92c_set_txpower()
284 memset(power, 0, sizeof(power)); in r92c_set_txpower()
285 /* Compute per-rate Tx power values. */ in r92c_set_txpower()
286 rtwn_r92c_get_txpower(sc, i, c, power); in r92c_set_txpower()
287 /* Optionally print out the power table */ in r92c_set_txpower()
288 r92c_dump_txpower(sc, i, power); in r92c_set_txpower()
289 /* Write per-rate Tx power values to hardware. */ in r92c_set_txpower()
290 r92c_write_txpower(sc, i, power); in r92c_set_txpower()
295 * Only reconfigure the transmit power if there's a valid BSS node and
297 * configure the transmit power.
302 if (vap->iv_bss == NULL) in r92c_set_tx_power()
304 if (vap->iv_bss->ni_chan == IEEE80211_CHAN_ANYC) in r92c_set_tx_power()
308 r92c_set_txpower(sc, vap->iv_bss->ni_chan); in r92c_set_tx_power()
316 struct r92c_softc *rs = sc->sc_priv; in r92c_set_bw40()
339 (rs->rf_chnlbw[0] & ~0xfff) | chan); in r92c_set_bw40()
345 struct r92c_softc *rs = sc->sc_priv; in r92c_set_bw20()
357 (rs->rf_chnlbw[0] & ~0xfff) | chan | R92C_RF_CHNLBW_BW20); in r92c_set_bw20()
363 struct r92c_softc *rs = sc->sc_priv; in r92c_set_chan()
369 /* Set Tx power for this new channel. */ in r92c_set_chan()
372 for (i = 0; i < sc->nrxchains; i++) { in r92c_set_chan()
374 RW(rs->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan)); in r92c_set_chan()
395 struct rtwn_softc *sc = ic->ic_softc; in r92c_scan_start()
396 struct r92c_softc *rs = sc->sc_priv; in r92c_scan_start()
403 rs->rs_scan_start(ic); in r92c_scan_start()
409 struct rtwn_softc *sc = ic->ic_softc; in r92c_scan_end()
410 struct r92c_softc *rs = sc->sc_priv; in r92c_scan_end()
417 rs->rs_scan_end(ic); in r92c_scan_end()