Lines Matching full:power
58 uint8_t power[RTWN_RIDX_COUNT]) in r92c_dump_txpower()
69 power[RTWN_RIDX_CCK1], in r92c_dump_txpower()
70 power[RTWN_RIDX_CCK2], in r92c_dump_txpower()
71 power[RTWN_RIDX_CCK55], in r92c_dump_txpower()
72 power[RTWN_RIDX_CCK11]); in r92c_dump_txpower()
78 power[RTWN_RIDX_OFDM6], in r92c_dump_txpower()
79 power[RTWN_RIDX_OFDM9], in r92c_dump_txpower()
80 power[RTWN_RIDX_OFDM12], in r92c_dump_txpower()
81 power[RTWN_RIDX_OFDM18], in r92c_dump_txpower()
82 power[RTWN_RIDX_OFDM24], in r92c_dump_txpower()
83 power[RTWN_RIDX_OFDM36], in r92c_dump_txpower()
84 power[RTWN_RIDX_OFDM48], in r92c_dump_txpower()
85 power[RTWN_RIDX_OFDM54]); in r92c_dump_txpower()
93 power[RTWN_RIDX_HT_MCS(i * 8 + 0)], in r92c_dump_txpower()
94 power[RTWN_RIDX_HT_MCS(i * 8 + 1)], in r92c_dump_txpower()
95 power[RTWN_RIDX_HT_MCS(i * 8 + 2)], in r92c_dump_txpower()
96 power[RTWN_RIDX_HT_MCS(i * 8 + 3)], in r92c_dump_txpower()
97 power[RTWN_RIDX_HT_MCS(i * 8 + 4)], in r92c_dump_txpower()
98 power[RTWN_RIDX_HT_MCS(i * 8 + 5)], in r92c_dump_txpower()
99 power[RTWN_RIDX_HT_MCS(i * 8 + 6)], in r92c_dump_txpower()
100 power[RTWN_RIDX_HT_MCS(i * 8 + 7)]); in r92c_dump_txpower()
132 struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT]) in r92c_get_txpower()
152 * target power in dBm. in r92c_get_txpower()
160 power[ridx] = base[chain].pwr[0][ridx]; in r92c_get_txpower()
164 power[ridx] = base[chain].pwr[0][ridx]; in r92c_get_txpower()
170 if (power[ridx] > max) in r92c_get_txpower()
171 power[ridx] = max; in r92c_get_txpower()
174 power[ridx] = base[chain].pwr[group][ridx]; in r92c_get_txpower()
176 power[ridx] = base[chain].pwr[0][ridx]; in r92c_get_txpower()
179 /* Compute per-CCK rate Tx power. */ in r92c_get_txpower()
181 power[ridx] += rt->cck_tx_pwr[chain][group]; in r92c_get_txpower()
190 /* Compute per-OFDM rate Tx power. */ in r92c_get_txpower()
194 power[ridx] += ofdmpow; in r92c_get_txpower()
196 /* Compute per-MCS Tx power. */ in r92c_get_txpower()
202 power[ridx] += htpow; in r92c_get_txpower()
206 if (power[ridx] > R92C_MAX_TX_PWR) in r92c_get_txpower()
207 power[ridx] = R92C_MAX_TX_PWR; in r92c_get_txpower()
209 if (power[ridx] > ic->ic_txpowlimit) in r92c_get_txpower()
210 power[ridx] = ic->ic_txpowlimit; in r92c_get_txpower()
217 uint8_t power[RTWN_RIDX_COUNT]) in r92c_write_txpower()
221 /* Write per-CCK rate Tx power. */ in r92c_write_txpower()
224 reg = RW(reg, R92C_TXAGC_A_CCK1, power[RTWN_RIDX_CCK1]); in r92c_write_txpower()
227 reg = RW(reg, R92C_TXAGC_A_CCK2, power[RTWN_RIDX_CCK2]); in r92c_write_txpower()
228 reg = RW(reg, R92C_TXAGC_A_CCK55, power[RTWN_RIDX_CCK55]); in r92c_write_txpower()
229 reg = RW(reg, R92C_TXAGC_A_CCK11, power[RTWN_RIDX_CCK11]); in r92c_write_txpower()
233 reg = RW(reg, R92C_TXAGC_B_CCK1, power[RTWN_RIDX_CCK1]); in r92c_write_txpower()
234 reg = RW(reg, R92C_TXAGC_B_CCK2, power[RTWN_RIDX_CCK2]); in r92c_write_txpower()
235 reg = RW(reg, R92C_TXAGC_B_CCK55, power[RTWN_RIDX_CCK55]); in r92c_write_txpower()
238 reg = RW(reg, R92C_TXAGC_B_CCK11, power[RTWN_RIDX_CCK11]); in r92c_write_txpower()
241 /* Write per-OFDM rate Tx power. */ in r92c_write_txpower()
243 SM(R92C_TXAGC_RATE06, power[RTWN_RIDX_OFDM6]) | in r92c_write_txpower()
244 SM(R92C_TXAGC_RATE09, power[RTWN_RIDX_OFDM9]) | in r92c_write_txpower()
245 SM(R92C_TXAGC_RATE12, power[RTWN_RIDX_OFDM12]) | in r92c_write_txpower()
246 SM(R92C_TXAGC_RATE18, power[RTWN_RIDX_OFDM18])); in r92c_write_txpower()
248 SM(R92C_TXAGC_RATE24, power[RTWN_RIDX_OFDM24]) | in r92c_write_txpower()
249 SM(R92C_TXAGC_RATE36, power[RTWN_RIDX_OFDM36]) | in r92c_write_txpower()
250 SM(R92C_TXAGC_RATE48, power[RTWN_RIDX_OFDM48]) | in r92c_write_txpower()
251 SM(R92C_TXAGC_RATE54, power[RTWN_RIDX_OFDM54])); in r92c_write_txpower()
252 /* Write per-MCS Tx power. */ in r92c_write_txpower()
254 SM(R92C_TXAGC_MCS00, power[RTWN_RIDX_HT_MCS(0)]) | in r92c_write_txpower()
255 SM(R92C_TXAGC_MCS01, power[RTWN_RIDX_HT_MCS(1)]) | in r92c_write_txpower()
256 SM(R92C_TXAGC_MCS02, power[RTWN_RIDX_HT_MCS(2)]) | in r92c_write_txpower()
257 SM(R92C_TXAGC_MCS03, power[RTWN_RIDX_HT_MCS(3)])); in r92c_write_txpower()
259 SM(R92C_TXAGC_MCS04, power[RTWN_RIDX_HT_MCS(4)]) | in r92c_write_txpower()
260 SM(R92C_TXAGC_MCS05, power[RTWN_RIDX_HT_MCS(5)]) | in r92c_write_txpower()
261 SM(R92C_TXAGC_MCS06, power[RTWN_RIDX_HT_MCS(6)]) | in r92c_write_txpower()
262 SM(R92C_TXAGC_MCS07, power[RTWN_RIDX_HT_MCS(7)])); in r92c_write_txpower()
265 SM(R92C_TXAGC_MCS08, power[RTWN_RIDX_HT_MCS(8)]) | in r92c_write_txpower()
266 SM(R92C_TXAGC_MCS09, power[RTWN_RIDX_HT_MCS(9)]) | in r92c_write_txpower()
267 SM(R92C_TXAGC_MCS10, power[RTWN_RIDX_HT_MCS(10)]) | in r92c_write_txpower()
268 SM(R92C_TXAGC_MCS11, power[RTWN_RIDX_HT_MCS(11)])); in r92c_write_txpower()
270 SM(R92C_TXAGC_MCS12, power[RTWN_RIDX_HT_MCS(12)]) | in r92c_write_txpower()
271 SM(R92C_TXAGC_MCS13, power[RTWN_RIDX_HT_MCS(13)]) | in r92c_write_txpower()
272 SM(R92C_TXAGC_MCS14, power[RTWN_RIDX_HT_MCS(14)]) | in r92c_write_txpower()
273 SM(R92C_TXAGC_MCS15, power[RTWN_RIDX_HT_MCS(15)])); in r92c_write_txpower()
280 uint8_t power[RTWN_RIDX_COUNT]; in r92c_set_txpower() local
284 memset(power, 0, sizeof(power)); in r92c_set_txpower()
285 /* Compute per-rate Tx power values. */ in r92c_set_txpower()
286 rtwn_r92c_get_txpower(sc, i, c, power); in r92c_set_txpower()
287 /* Optionally print out the power table */ in r92c_set_txpower()
288 r92c_dump_txpower(sc, i, power); in r92c_set_txpower()
289 /* Write per-rate Tx power values to hardware. */ in r92c_set_txpower()
290 r92c_write_txpower(sc, i, power); in r92c_set_txpower()
295 * Only reconfigure the transmit power if there's a valid BSS node and
297 * configure the transmit power.
369 /* Set Tx power for this new channel. */ in r92c_set_chan()