71 	rtwn_bb_write(sc, R92C_FPGA0_IQK, 0);  in r88e_iq_calib_chain()
76 	rtwn_bb_write(sc, R92C_FPGA0_IQK, 0x80800000);  in r88e_iq_calib_chain()
79 	rtwn_bb_write(sc, R92C_TX_IQK, 0x01007c00);  in r88e_iq_calib_chain()
80 	rtwn_bb_write(sc, R92C_RX_IQK, 0x81004800);  in r88e_iq_calib_chain()
83 	rtwn_bb_write(sc, R92C_TX_IQK_TONE(0), 0x10008c1c);  in r88e_iq_calib_chain()
84 	rtwn_bb_write(sc, R92C_RX_IQK_TONE(0), 0x30008c1c);  in r88e_iq_calib_chain()
85 	rtwn_bb_write(sc, R92C_TX_IQK_PI(0), 0x82160804);  in r88e_iq_calib_chain()
86 	rtwn_bb_write(sc, R92C_RX_IQK_PI(0), 0x28160000);  in r88e_iq_calib_chain()
89 	rtwn_bb_write(sc, R92C_IQK_AGC_RSP, 0x0046a911);  in r88e_iq_calib_chain()
92 	rtwn_bb_write(sc, R92C_IQK_AGC_PTS, 0xf9000000);  in r88e_iq_calib_chain()
93 	rtwn_bb_write(sc, R92C_IQK_AGC_PTS, 0xf8000000);  in r88e_iq_calib_chain()
111 	rtwn_bb_write(sc, R92C_TX_IQK, 0x80007c00 | (tx[0] << 16) | tx[1]);  in r88e_iq_calib_chain()
114 	rtwn_bb_write(sc, R92C_FPGA0_IQK, 0);  in r88e_iq_calib_chain()
119 	rtwn_bb_write(sc, R92C_FPGA0_IQK, 0x80800000);  in r88e_iq_calib_chain()
122 	rtwn_bb_write(sc, R92C_RX_IQK, 0x01004800);  in r88e_iq_calib_chain()
125 	rtwn_bb_write(sc, R92C_TX_IQK_TONE(0), 0x30008c1c);  in r88e_iq_calib_chain()
126 	rtwn_bb_write(sc, R92C_RX_IQK_TONE(0), 0x10008c1c);  in r88e_iq_calib_chain()
127 	rtwn_bb_write(sc, R92C_TX_IQK_PI(0), 0x82160c05);  in r88e_iq_calib_chain()
128 	rtwn_bb_write(sc, R92C_RX_IQK_PI(0), 0x28160c05);  in r88e_iq_calib_chain()
131 	rtwn_bb_write(sc, R92C_IQK_AGC_RSP, 0x0046a911);  in r88e_iq_calib_chain()
134 	rtwn_bb_write(sc, R92C_IQK_AGC_PTS, 0xf9000000);  in r88e_iq_calib_chain()
135 	rtwn_bb_write(sc, R92C_IQK_AGC_PTS, 0xf8000000);  in r88e_iq_calib_chain()
179 	rtwn_bb_write(sc, reg_adda[0], 0x0b1b25a0);  in r88e_iq_calib_run()
181 		rtwn_bb_write(sc, reg_adda[i], 0x0bdb25a0);  in r88e_iq_calib_run()
185 		rtwn_bb_write(sc, R92C_HSSI_PARAM1(0),  in r88e_iq_calib_run()
187 		rtwn_bb_write(sc, R92C_HSSI_PARAM1(1),  in r88e_iq_calib_run()
209 	rtwn_bb_write(sc, R92C_OFDM0_TRXPATHENA, 0x03a05600);  in r88e_iq_calib_run()
210 	rtwn_bb_write(sc, R92C_OFDM0_TRMUXPAR, 0x000800e4);  in r88e_iq_calib_run()
211 	rtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(1), 0x22204000);  in r88e_iq_calib_run()
225 	rtwn_bb_write(sc, R92C_CONFIG_ANT(0), 0x0f600000);  in r88e_iq_calib_run()
227 	rtwn_bb_write(sc, R92C_FPGA0_IQK, 0x80800000);  in r88e_iq_calib_run()
228 	rtwn_bb_write(sc, R92C_TX_IQK, 0x01007c00);  in r88e_iq_calib_run()
229 	rtwn_bb_write(sc, R92C_RX_IQK, 0x01004800);  in r88e_iq_calib_run()
258 	rtwn_bb_write(sc, R92C_CCK0_AFESETTING, vals->cck0_afesetting);  in r88e_iq_calib_run()
259 	rtwn_bb_write(sc, R92C_OFDM0_TRXPATHENA, vals->ofdm0_trxpathena);  in r88e_iq_calib_run()
260 	rtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(0), vals->fpga0_rfifacesw0);  in r88e_iq_calib_run()
261 	rtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(1), vals->fpga0_rfifacesw1);  in r88e_iq_calib_run()
262 	rtwn_bb_write(sc, R92C_OFDM0_TRMUXPAR, vals->ofdm0_trmuxpar);  in r88e_iq_calib_run()
263 	rtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(0), vals->fpga0_rfifaceoe0);  in r88e_iq_calib_run()
264 	rtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(1), vals->fpga0_rfifaceoe1);  in r88e_iq_calib_run()
265 	rtwn_bb_write(sc, R92C_CONFIG_ANT(0), vals->config_ant0);  in r88e_iq_calib_run()
266 	rtwn_bb_write(sc, R92C_CONFIG_ANT(1), vals->config_ant1);  in r88e_iq_calib_run()
268 	rtwn_bb_write(sc, R92C_FPGA0_IQK, 0);  in r88e_iq_calib_run()
269 	rtwn_bb_write(sc, R92C_LSSI_PARAM(0), 0x00032ed3);  in r88e_iq_calib_run()
273 			rtwn_bb_write(sc, R92C_HSSI_PARAM1(0), hssi_param1);  in r88e_iq_calib_run()
274 			rtwn_bb_write(sc, R92C_HSSI_PARAM1(1), hssi_param1);  in r88e_iq_calib_run()
278 			rtwn_bb_write(sc, reg_adda[i], vals->adda[i]);  in r88e_iq_calib_run()