Lines Matching refs:rtwn_bb_setbits
208 rtwn_bb_setbits(sc, R92C_CCK0_AFESETTING, 0, 0x0f000000); in r88e_iq_calib_run()
212 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACESW(0), 0, 0x04000400); in r88e_iq_calib_run()
213 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(0), 0x400, 0); in r88e_iq_calib_run()
214 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(1), 0x400, 0); in r88e_iq_calib_run()
324 rtwn_bb_setbits(sc, R92C_OFDM0_TXIQIMBALANCE(0), 0x3ff, reg); in r88e_iq_calib_write_results()
325 rtwn_bb_setbits(sc, R92C_OFDM0_ECCATHRESHOLD, 0x80000000, in r88e_iq_calib_write_results()
332 rtwn_bb_setbits(sc, R92C_OFDM0_TXAFE(0), 0xf0000000, in r88e_iq_calib_write_results()
334 rtwn_bb_setbits(sc, R92C_OFDM0_TXIQIMBALANCE(0), 0x003f0000, in r88e_iq_calib_write_results()
336 rtwn_bb_setbits(sc, R92C_OFDM0_ECCATHRESHOLD, 0x20000000, in r88e_iq_calib_write_results()
342 rtwn_bb_setbits(sc, R92C_OFDM0_RXIQIMBALANCE(0), 0x3ff, in r88e_iq_calib_write_results()
344 rtwn_bb_setbits(sc, R92C_OFDM0_RXIQIMBALANCE(0), 0xfc00, in r88e_iq_calib_write_results()
346 rtwn_bb_setbits(sc, R92C_OFDM0_RXIQEXTANTA, 0xf0000000, in r88e_iq_calib_write_results()