Lines Matching +full:report +full:- +full:speed +full:- +full:hz
1 /*-
16 * 4. Neither the name of the author nor the names of any co-contributors
48 * exception of the FEAST chip made by SMC. The 8139 supports bus-master
50 * gains that bus-master DMA usually offers.
54 * on a longword (32-bit) boundary. This means we almost always have to
57 * is 32-bit aligned within the mbuf's data area. The presence of only
72 * On the bright side, the 8139 does have a built-in PHY, although
75 * space. The 8139 supports autonegotiation, as well as a 64-bit multicast
80 * the 8139 lets you directly access the on-board PHY registers. We need
151 "D-Link DFE-520TX (rev. C1) 10/100BaseTX" },
153 "D-Link DFE-530TX+ 10/100BaseTX" },
155 "D-Link DFE-690TXD 10/100BaseTX" },
159 "Corega FEther CB-TXD" },
161 "Corega FEtherII CB-TXD" },
163 "Peppercon AG ROL-F" },
165 "Planex FNW-3603-TX" },
167 "Planex FNW-3800-TX" },
169 "Compaq HNE-300" },
171 "LevelOne FPC-0106TX" },
173 "Edimax EP-4103DL CardBus" }
217 * MII bit-bang glue
259 nitems(rl_devs) - 1);
279 d = addr | sc->rl_eecmd_read; in rl_eeprom_putbyte()
355 * Read the MII serial port for the MII bit-bang module.
373 * Write the MII serial port for the MII bit-bang module.
395 if (sc->rl_type == RL_8139) { in rl_miibus_readreg()
424 device_printf(sc->rl_dev, "bad phy register\n"); in rl_miibus_readreg()
441 if (sc->rl_type == RL_8139) { in rl_miibus_writereg()
463 device_printf(sc->rl_dev, "bad phy register\n"); in rl_miibus_writereg()
483 mii = device_get_softc(sc->rl_miibus); in rl_miibus_statchg()
484 ifp = sc->rl_ifp; in rl_miibus_statchg()
489 sc->rl_flags &= ~RL_FLAG_LINK; in rl_miibus_statchg()
490 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == in rl_miibus_statchg()
492 switch (IFM_SUBTYPE(mii->mii_media_active)) { in rl_miibus_statchg()
495 sc->rl_flags |= RL_FLAG_LINK; in rl_miibus_statchg()
503 * Tx/Rx MACs for resolved speed, duplex and flow-control in rl_miibus_statchg()
518 hashes[1] |= (1 << (h - 32)); in rl_hash_maddr()
524 * Program the 64-bit multicast hash filter.
529 if_t ifp = sc->rl_ifp; in rl_rxfilter()
576 device_printf(sc->rl_dev, "reset never completed!\n"); in rl_reset()
602 if (vendor == t->rl_vid && devid == t->rl_did) { in rl_probe()
603 device_set_desc(dev, t->rl_name); in rl_probe()
626 ctx->rl_busaddr = segs[0].ds_addr; in rl_dmamap_cb()
650 sc->rl_dev = dev; in rl_attach()
652 sc->rl_twister_enable = 0; in rl_attach()
654 TUNABLE_INT_FETCH(tn, &sc->rl_twister_enable); in rl_attach()
655 ctx = device_get_sysctl_ctx(sc->rl_dev); in rl_attach()
656 children = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->rl_dev)); in rl_attach()
658 &sc->rl_twister_enable, 0, ""); in rl_attach()
660 mtx_init(&sc->rl_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, in rl_attach()
662 callout_init_mtx(&sc->rl_stat_callout, &sc->rl_mtx, 0); in rl_attach()
679 sc->rl_res_id = PCIR_BAR(0); in rl_attach()
680 sc->rl_res_type = SYS_RES_IOPORT; in rl_attach()
681 sc->rl_res = bus_alloc_resource_any(dev, sc->rl_res_type, in rl_attach()
682 &sc->rl_res_id, RF_ACTIVE); in rl_attach()
684 if (prefer_iomap == 0 || sc->rl_res == NULL) { in rl_attach()
685 sc->rl_res_id = PCIR_BAR(1); in rl_attach()
686 sc->rl_res_type = SYS_RES_MEMORY; in rl_attach()
687 sc->rl_res = bus_alloc_resource_any(dev, sc->rl_res_type, in rl_attach()
688 &sc->rl_res_id, RF_ACTIVE); in rl_attach()
690 if (sc->rl_res == NULL) { in rl_attach()
701 * media type or to set it to the 10 Meg speed. in rl_attach()
703 if ((rman_get_end(sc->rl_res) - rman_get_start(sc->rl_res)) == 0xFF) in rl_attach()
708 sc->rl_btag = rman_get_bustag(sc->rl_res); in rl_attach()
709 sc->rl_bhandle = rman_get_bushandle(sc->rl_res); in rl_attach()
713 sc->rl_irq[0] = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, in rl_attach()
716 if (sc->rl_irq[0] == NULL) { in rl_attach()
722 sc->rl_cfg0 = RL_8139_CFG0; in rl_attach()
723 sc->rl_cfg1 = RL_8139_CFG1; in rl_attach()
724 sc->rl_cfg2 = 0; in rl_attach()
725 sc->rl_cfg3 = RL_8139_CFG3; in rl_attach()
726 sc->rl_cfg4 = RL_8139_CFG4; in rl_attach()
727 sc->rl_cfg5 = RL_8139_CFG5; in rl_attach()
737 sc->rl_eecmd_read = RL_EECMD_READ_6BIT; in rl_attach()
740 sc->rl_eecmd_read = RL_EECMD_READ_8BIT; in rl_attach()
758 sc->rl_type = 0; in rl_attach()
759 while(t->rl_name != NULL) { in rl_attach()
760 if (rl_did == t->rl_did) { in rl_attach()
761 sc->rl_type = t->rl_basetype; in rl_attach()
767 if (sc->rl_type == 0) { in rl_attach()
770 sc->rl_type = RL_8139; in rl_attach()
782 ifp = sc->rl_ifp = if_alloc(IFT_ETHER); in rl_attach()
788 if (sc->rl_type == RL_8139) in rl_attach()
790 error = mii_attach(dev, &sc->rl_miibus, ifp, rl_ifmedia_upd, in rl_attach()
806 if (sc->rl_type == RL_8139 && pci_has_pm(sc->rl_dev)) { in rl_attach()
837 error = bus_setup_intr(dev, sc->rl_irq[0], INTR_TYPE_NET | INTR_MPSAFE, in rl_attach()
838 NULL, rl_intr, sc, &sc->rl_intrhand[0]); in rl_attach()
840 device_printf(sc->rl_dev, "couldn't set up irq\n"); in rl_attach()
865 ifp = sc->rl_ifp; in rl_detach()
867 KASSERT(mtx_initialized(&sc->rl_mtx), ("rl mutex not initialized")); in rl_detach()
878 callout_drain(&sc->rl_stat_callout); in rl_detach()
882 sc->suspended = 1; in rl_detach()
886 if (sc->rl_intrhand[0]) in rl_detach()
887 bus_teardown_intr(dev, sc->rl_irq[0], sc->rl_intrhand[0]); in rl_detach()
888 if (sc->rl_irq[0]) in rl_detach()
889 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->rl_irq[0]); in rl_detach()
890 if (sc->rl_res) in rl_detach()
891 bus_release_resource(dev, sc->rl_res_type, sc->rl_res_id, in rl_detach()
892 sc->rl_res); in rl_detach()
899 mtx_destroy(&sc->rl_mtx); in rl_detach()
913 error = bus_dma_tag_create(bus_get_dma_tag(sc->rl_dev), /* parent */ in rl_dma_alloc()
922 &sc->rl_parent_tag); in rl_dma_alloc()
924 device_printf(sc->rl_dev, in rl_dma_alloc()
929 error = bus_dma_tag_create(sc->rl_parent_tag, /* parent */ in rl_dma_alloc()
938 &sc->rl_cdata.rl_rx_tag); in rl_dma_alloc()
940 device_printf(sc->rl_dev, in rl_dma_alloc()
945 error = bus_dma_tag_create(sc->rl_parent_tag, /* parent */ in rl_dma_alloc()
954 &sc->rl_cdata.rl_tx_tag); in rl_dma_alloc()
956 device_printf(sc->rl_dev, "failed to create Tx DMA tag.\n"); in rl_dma_alloc()
963 error = bus_dmamem_alloc(sc->rl_cdata.rl_rx_tag, in rl_dma_alloc()
964 (void **)&sc->rl_cdata.rl_rx_buf, BUS_DMA_WAITOK | in rl_dma_alloc()
965 BUS_DMA_COHERENT | BUS_DMA_ZERO, &sc->rl_cdata.rl_rx_dmamap); in rl_dma_alloc()
967 device_printf(sc->rl_dev, in rl_dma_alloc()
972 error = bus_dmamap_load(sc->rl_cdata.rl_rx_tag, in rl_dma_alloc()
973 sc->rl_cdata.rl_rx_dmamap, sc->rl_cdata.rl_rx_buf, in rl_dma_alloc()
977 device_printf(sc->rl_dev, in rl_dma_alloc()
981 sc->rl_cdata.rl_rx_buf_paddr = ctx.rl_busaddr; in rl_dma_alloc()
985 sc->rl_cdata.rl_tx_chain[i] = NULL; in rl_dma_alloc()
986 sc->rl_cdata.rl_tx_dmamap[i] = NULL; in rl_dma_alloc()
987 error = bus_dmamap_create(sc->rl_cdata.rl_tx_tag, 0, in rl_dma_alloc()
988 &sc->rl_cdata.rl_tx_dmamap[i]); in rl_dma_alloc()
990 device_printf(sc->rl_dev, in rl_dma_alloc()
997 sc->rl_cdata.rl_rx_buf_ptr = sc->rl_cdata.rl_rx_buf; in rl_dma_alloc()
998 sc->rl_cdata.rl_rx_buf += RL_RX_8139_BUF_RESERVE; in rl_dma_alloc()
1010 if (sc->rl_cdata.rl_rx_tag != NULL) { in rl_dma_free()
1011 if (sc->rl_cdata.rl_rx_buf_paddr != 0) in rl_dma_free()
1012 bus_dmamap_unload(sc->rl_cdata.rl_rx_tag, in rl_dma_free()
1013 sc->rl_cdata.rl_rx_dmamap); in rl_dma_free()
1014 if (sc->rl_cdata.rl_rx_buf_ptr != NULL) in rl_dma_free()
1015 bus_dmamem_free(sc->rl_cdata.rl_rx_tag, in rl_dma_free()
1016 sc->rl_cdata.rl_rx_buf_ptr, in rl_dma_free()
1017 sc->rl_cdata.rl_rx_dmamap); in rl_dma_free()
1018 sc->rl_cdata.rl_rx_buf_ptr = NULL; in rl_dma_free()
1019 sc->rl_cdata.rl_rx_buf = NULL; in rl_dma_free()
1020 sc->rl_cdata.rl_rx_buf_paddr = 0; in rl_dma_free()
1021 bus_dma_tag_destroy(sc->rl_cdata.rl_rx_tag); in rl_dma_free()
1022 sc->rl_cdata.rl_tx_tag = NULL; in rl_dma_free()
1026 if (sc->rl_cdata.rl_tx_tag != NULL) { in rl_dma_free()
1028 if (sc->rl_cdata.rl_tx_dmamap[i] != NULL) { in rl_dma_free()
1030 sc->rl_cdata.rl_tx_tag, in rl_dma_free()
1031 sc->rl_cdata.rl_tx_dmamap[i]); in rl_dma_free()
1032 sc->rl_cdata.rl_tx_dmamap[i] = NULL; in rl_dma_free()
1035 bus_dma_tag_destroy(sc->rl_cdata.rl_tx_tag); in rl_dma_free()
1036 sc->rl_cdata.rl_tx_tag = NULL; in rl_dma_free()
1039 if (sc->rl_parent_tag != NULL) { in rl_dma_free()
1040 bus_dma_tag_destroy(sc->rl_parent_tag); in rl_dma_free()
1041 sc->rl_parent_tag = NULL; in rl_dma_free()
1056 cd = &sc->rl_cdata; in rl_list_tx_init()
1058 cd->rl_tx_chain[i] = NULL; in rl_list_tx_init()
1063 sc->rl_cdata.cur_tx = 0; in rl_list_tx_init()
1064 sc->rl_cdata.last_tx = 0; in rl_list_tx_init()
1075 bzero(sc->rl_cdata.rl_rx_buf_ptr, in rl_list_rx_init()
1077 bus_dmamap_sync(sc->rl_cdata.rl_tx_tag, sc->rl_cdata.rl_rx_dmamap, in rl_list_rx_init()
1087 * You know there's something wrong with a PCI bus-master chip design
1094 * is preceded by a 32-bit RX status word which specifies the length
1096 * the status word) is also 32-bit aligned. The frame length is in the
1101 * on a 32-bit boundary. To achieve this, we pass RL_ETHER_ALIGN (2 bytes)
1108 if_t ifp = sc->rl_ifp; in rl_rxeof()
1120 bus_dmamap_sync(sc->rl_cdata.rl_rx_tag, sc->rl_cdata.rl_rx_dmamap, in rl_rxeof()
1129 max_bytes = (RL_RXBUFLEN - cur_rx) + limit; in rl_rxeof()
1131 max_bytes = limit - cur_rx; in rl_rxeof()
1136 if (sc->rxcycles <= 0) in rl_rxeof()
1138 sc->rxcycles--; in rl_rxeof()
1141 rxbufpos = sc->rl_cdata.rl_rx_buf + cur_rx; in rl_rxeof()
1175 total_len -= ETHER_CRC_LEN; in rl_rxeof()
1184 rxbufpos = sc->rl_cdata.rl_rx_buf + in rl_rxeof()
1186 if (rxbufpos == (sc->rl_cdata.rl_rx_buf + RL_RXBUFLEN)) in rl_rxeof()
1187 rxbufpos = sc->rl_cdata.rl_rx_buf; in rl_rxeof()
1189 wrap = (sc->rl_cdata.rl_rx_buf + RL_RXBUFLEN) - rxbufpos; in rl_rxeof()
1194 m_copyback(m, wrap, total_len - wrap, in rl_rxeof()
1195 sc->rl_cdata.rl_rx_buf); in rl_rxeof()
1196 cur_rx = (total_len - wrap + ETHER_CRC_LEN); in rl_rxeof()
1203 /* Round up to 32-bit boundary. */ in rl_rxeof()
1205 CSR_WRITE_2(sc, RL_CURRXADDR, cur_rx - 16); in rl_rxeof()
1230 if_t ifp = sc->rl_ifp; in rl_txeof()
1249 bus_dmamap_sync(sc->rl_cdata.rl_tx_tag, RL_LAST_DMAMAP(sc), in rl_txeof()
1251 bus_dmamap_unload(sc->rl_cdata.rl_tx_tag, RL_LAST_DMAMAP(sc)); in rl_txeof()
1260 (sc->rl_txthresh < 2016)) in rl_txeof()
1261 sc->rl_txthresh += 32; in rl_txeof()
1270 oldthresh = sc->rl_txthresh; in rl_txeof()
1275 sc->rl_txthresh = oldthresh; in rl_txeof()
1278 RL_INC(sc->rl_cdata.last_tx); in rl_txeof()
1280 } while (sc->rl_cdata.last_tx != sc->rl_cdata.cur_tx); in rl_txeof()
1283 sc->rl_watchdog_timer = 0; in rl_txeof()
1302 * Tune the so-called twister registers of the RTL8139. These in rl_twister_update()
1307 switch (sc->rl_twister) in rl_twister_update()
1317 sc->rl_twister = FIND_ROW; in rl_twister_update()
1323 sc->rl_twister = DONE; in rl_twister_update()
1333 sc->rl_twist_row = 3; in rl_twister_update()
1335 sc->rl_twist_row = 2; in rl_twister_update()
1337 sc->rl_twist_row = 1; in rl_twister_update()
1339 sc->rl_twist_row = 0; in rl_twister_update()
1340 sc->rl_twist_col = 0; in rl_twister_update()
1341 sc->rl_twister = SET_PARAM; in rl_twister_update()
1344 if (sc->rl_twist_col == 0) in rl_twister_update()
1347 param[sc->rl_twist_row][sc->rl_twist_col]); in rl_twister_update()
1348 if (++sc->rl_twist_col == 4) { in rl_twister_update()
1349 if (sc->rl_twist_row == 3) in rl_twister_update()
1350 sc->rl_twister = RECHK_LONG; in rl_twister_update()
1352 sc->rl_twister = DONE; in rl_twister_update()
1362 sc->rl_twister = DONE; in rl_twister_update()
1365 sc->rl_twister = RETUNE; in rl_twister_update()
1374 sc->rl_twist_row--; in rl_twister_update()
1375 sc->rl_twist_col = 0; in rl_twister_update()
1376 sc->rl_twister = SET_PARAM; in rl_twister_update()
1395 * watchdog timeouts. This is a no-op in normal operations, but in rl_tick()
1404 mii = device_get_softc(sc->rl_miibus); in rl_tick()
1406 if ((sc->rl_flags & RL_FLAG_LINK) == 0) in rl_tick()
1407 rl_miibus_statchg(sc->rl_dev); in rl_tick()
1408 if (sc->rl_twister_enable) { in rl_tick()
1409 if (sc->rl_twister == DONE) in rl_tick()
1413 if (sc->rl_twister == DONE) in rl_tick()
1414 ticks = hz; in rl_tick()
1416 ticks = hz / 10; in rl_tick()
1419 ticks = hz; in rl_tick()
1422 callout_reset(&sc->rl_stat_callout, ticks, rl_tick, sc); in rl_tick()
1447 sc->rxcycles = count; in rl_poll_locked()
1479 if_t ifp = sc->rl_ifp; in rl_intr()
1485 if (sc->suspended) in rl_intr()
1502 for (count = 16; count > 0; count--) { in rl_intr()
1548 * Hardware doesn't auto-pad, so we have to make sure in rl_encap()
1551 if (m->m_pkthdr.len < RL_MIN_FRAMELEN) in rl_encap()
1552 padlen = RL_MIN_FRAMELEN - m->m_pkthdr.len; in rl_encap()
1554 * The RealTek is brain damaged and wants longword-aligned in rl_encap()
1558 if (m->m_next != NULL || (mtod(m, uintptr_t) & 3) != 0 || in rl_encap()
1571 * Make security-conscious people happy: zero out the in rl_encap()
1576 bzero(mtod(m, char *) + m->m_pkthdr.len, padlen); in rl_encap()
1577 m->m_pkthdr.len += padlen; in rl_encap()
1578 m->m_len = m->m_pkthdr.len; in rl_encap()
1581 error = bus_dmamap_load_mbuf_sg(sc->rl_cdata.rl_tx_tag, in rl_encap()
1592 bus_dmamap_sync(sc->rl_cdata.rl_tx_tag, RL_CUR_DMAMAP(sc), in rl_encap()
1621 IFF_DRV_RUNNING || (sc->rl_flags & RL_FLAG_LINK) == 0) in rl_start_locked()
1643 RL_TXTHRESH(sc->rl_txthresh) | in rl_start_locked()
1644 RL_CUR_TXMBUF(sc)->m_pkthdr.len); in rl_start_locked()
1646 RL_INC(sc->rl_cdata.cur_tx); in rl_start_locked()
1649 sc->rl_watchdog_timer = 5; in rl_start_locked()
1674 if_t ifp = sc->rl_ifp; in rl_init_locked()
1680 mii = device_get_softc(sc->rl_miibus); in rl_init_locked()
1691 if (sc->rl_twister_enable) { in rl_init_locked()
1698 sc->rl_twister = CHK_LINK; in rl_init_locked()
1708 bcopy(if_getlladdr(sc->rl_ifp), eaddr, ETHER_ADDR_LEN); in rl_init_locked()
1714 CSR_WRITE_4(sc, RL_RXADDR, sc->rl_cdata.rl_rx_buf_paddr + in rl_init_locked()
1745 sc->rl_txthresh = RL_TX_THRESH_INIT; in rl_init_locked()
1753 sc->rl_flags &= ~RL_FLAG_LINK; in rl_init_locked()
1756 CSR_WRITE_1(sc, sc->rl_cfg1, RL_CFG1_DRVLOAD|RL_CFG1_FULLDUPLEX); in rl_init_locked()
1761 callout_reset(&sc->rl_stat_callout, hz, rl_tick, sc); in rl_init_locked()
1773 mii = device_get_softc(sc->rl_miibus); in rl_ifmedia_upd()
1783 * Report current media status.
1791 mii = device_get_softc(sc->rl_miibus); in rl_ifmedia_sts()
1795 ifmr->ifm_active = mii->mii_media_active; in rl_ifmedia_sts()
1796 ifmr->ifm_status = mii->mii_media_status; in rl_ifmedia_sts()
1813 ((if_getflags(ifp) ^ sc->rl_if_flags) & in rl_ioctl()
1820 sc->rl_if_flags = if_getflags(ifp); in rl_ioctl()
1831 mii = device_get_softc(sc->rl_miibus); in rl_ioctl()
1832 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command); in rl_ioctl()
1835 mask = ifr->ifr_reqcap ^ if_getcapenable(ifp); in rl_ioctl()
1837 if (ifr->ifr_reqcap & IFCAP_POLLING && in rl_ioctl()
1850 if (!(ifr->ifr_reqcap & IFCAP_POLLING) && in rl_ioctl()
1885 if (sc->rl_watchdog_timer == 0 || --sc->rl_watchdog_timer >0) in rl_watchdog()
1888 device_printf(sc->rl_dev, "watchdog timeout\n"); in rl_watchdog()
1889 if_inc_counter(sc->rl_ifp, IFCOUNTER_OERRORS, 1); in rl_watchdog()
1893 if_setdrvflagbits(sc->rl_ifp, 0, IFF_DRV_RUNNING); in rl_watchdog()
1905 if_t ifp = sc->rl_ifp; in rl_stop()
1909 sc->rl_watchdog_timer = 0; in rl_stop()
1910 callout_stop(&sc->rl_stat_callout); in rl_stop()
1912 sc->rl_flags &= ~RL_FLAG_LINK; in rl_stop()
1923 device_printf(sc->rl_dev, "Unable to stop Tx/Rx MAC\n"); in rl_stop()
1929 if (sc->rl_cdata.rl_tx_chain[i] != NULL) { in rl_stop()
1930 bus_dmamap_sync(sc->rl_cdata.rl_tx_tag, in rl_stop()
1931 sc->rl_cdata.rl_tx_dmamap[i], in rl_stop()
1933 bus_dmamap_unload(sc->rl_cdata.rl_tx_tag, in rl_stop()
1934 sc->rl_cdata.rl_tx_dmamap[i]); in rl_stop()
1935 m_freem(sc->rl_cdata.rl_tx_chain[i]); in rl_stop()
1936 sc->rl_cdata.rl_tx_chain[i] = NULL; in rl_stop()
1958 sc->suspended = 1; in rl_suspend()
1966 * doesn't, re-enable busmastering, and restart the interface if
1976 ifp = sc->rl_ifp; in rl_resume()
1992 sc->suspended = 0; in rl_resume()
2017 if_setflagbits(sc->rl_ifp, 0, IFF_UP); in rl_shutdown()
2032 ifp = sc->rl_ifp; in rl_setwol()
2040 v = CSR_READ_1(sc, sc->rl_cfg1); in rl_setwol()
2044 CSR_WRITE_1(sc, sc->rl_cfg1, v); in rl_setwol()
2046 v = CSR_READ_1(sc, sc->rl_cfg3); in rl_setwol()
2050 CSR_WRITE_1(sc, sc->rl_cfg3, v); in rl_setwol()
2052 v = CSR_READ_1(sc, sc->rl_cfg5); in rl_setwol()
2061 CSR_WRITE_1(sc, sc->rl_cfg5, v); in rl_setwol()
2068 pci_enable_pme(sc->rl_dev); in rl_setwol()
2077 ifp = sc->rl_ifp; in rl_clrwol()
2084 v = CSR_READ_1(sc, sc->rl_cfg3); in rl_clrwol()
2086 CSR_WRITE_1(sc, sc->rl_cfg3, v); in rl_clrwol()
2091 v = CSR_READ_1(sc, sc->rl_cfg5); in rl_clrwol()
2094 CSR_WRITE_1(sc, sc->rl_cfg5, v); in rl_clrwol()