Lines Matching refs:RAL_WRITE

758 		RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff);  in rt2661_newstate()
1104 RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16); in rt2661_mcu_wakeup()
1106 RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7); in rt2661_mcu_wakeup()
1107 RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18); in rt2661_mcu_wakeup()
1108 RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20); in rt2661_mcu_wakeup()
1118 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); in rt2661_mcu_cmd_intr()
1130 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f); in rt2661_intr()
1131 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); in rt2661_intr()
1140 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1); in rt2661_intr()
1143 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2); in rt2661_intr()
1176 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); in rt2661_intr()
1177 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); in rt2661_intr()
1346 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT); in rt2661_tx_mgt()
1544 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac); in rt2661_tx_data()
1699 RAL_WRITE(sc, RT2661_PHY_CSR3, tmp); in rt2661_bbp_write()
1721 RAL_WRITE(sc, RT2661_PHY_CSR3, val); in rt2661_bbp_read()
1752 RAL_WRITE(sc, RT2661_PHY_CSR4, tmp); in rt2661_rf_write()
1766 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, in rt2661_tx_cmd()
1769 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd); in rt2661_tx_cmd()
1787 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); in rt2661_select_antenna()
1793 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); in rt2661_select_antenna()
1813 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); in rt2661_enable_mrr()
1828 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); in rt2661_set_txpreamble()
1850 RAL_WRITE(sc, RT2661_TXRX_CSR5, mask); in rt2661_set_basicrates()
1898 RAL_WRITE(sc, RT2661_PHY_CSR0, tmp); in rt2661_select_band()
1980 RAL_WRITE(sc, RT2661_MAC_CSR4, tmp); in rt2661_set_bssid()
1983 RAL_WRITE(sc, RT2661_MAC_CSR5, tmp); in rt2661_set_bssid()
1992 RAL_WRITE(sc, RT2661_MAC_CSR2, tmp); in rt2661_set_macaddr()
1995 RAL_WRITE(sc, RT2661_MAC_CSR3, tmp); in rt2661_set_macaddr()
2010 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); in rt2661_update_promisc()
2034 RAL_WRITE(sc, RT2661_AC_TXOP_CSR0, in rt2661_wme_update()
2037 RAL_WRITE(sc, RT2661_AC_TXOP_CSR1, in rt2661_wme_update()
2042 RAL_WRITE(sc, RT2661_CWMIN_CSR, in rt2661_wme_update()
2049 RAL_WRITE(sc, RT2661_CWMAX_CSR, in rt2661_wme_update()
2056 RAL_WRITE(sc, RT2661_AIFSN_CSR, in rt2661_wme_update()
2076 RAL_WRITE(sc, RT2661_MAC_CSR9, tmp); in rt2661_update_slot()
2241 RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr); in rt2661_init_locked()
2242 RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr); in rt2661_init_locked()
2243 RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr); in rt2661_init_locked()
2244 RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr); in rt2661_init_locked()
2247 RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr); in rt2661_init_locked()
2250 RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr); in rt2661_init_locked()
2253 RAL_WRITE(sc, RT2661_TX_RING_CSR0, in rt2661_init_locked()
2259 RAL_WRITE(sc, RT2661_TX_RING_CSR1, in rt2661_init_locked()
2265 RAL_WRITE(sc, RT2661_RX_RING_CSR, in rt2661_init_locked()
2271 RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa); in rt2661_init_locked()
2274 RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f); in rt2661_init_locked()
2277 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2); in rt2661_init_locked()
2281 RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val); in rt2661_init_locked()
2286 RAL_WRITE(sc, RT2661_MAC_CSR1, 3); in rt2661_init_locked()
2287 RAL_WRITE(sc, RT2661_MAC_CSR1, 0); in rt2661_init_locked()
2326 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); in rt2661_init_locked()
2332 RAL_WRITE(sc, RT2661_MAC_CSR1, 4); in rt2661_init_locked()
2335 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); in rt2661_init_locked()
2338 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); in rt2661_init_locked()
2339 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); in rt2661_init_locked()
2342 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1); in rt2661_init_locked()
2379 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16); in rt2661_stop_locked()
2383 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); in rt2661_stop_locked()
2386 RAL_WRITE(sc, RT2661_MAC_CSR1, 3); in rt2661_stop_locked()
2387 RAL_WRITE(sc, RT2661_MAC_CSR1, 0); in rt2661_stop_locked()
2390 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff); in rt2661_stop_locked()
2391 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); in rt2661_stop_locked()
2394 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); in rt2661_stop_locked()
2395 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff); in rt2661_stop_locked()
2450 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); in rt2661_load_microcode()
2453 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0); in rt2661_load_microcode()
2454 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); in rt2661_load_microcode()
2455 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0); in rt2661_load_microcode()
2458 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL); in rt2661_load_microcode()
2460 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); in rt2661_load_microcode()
2463 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0); in rt2661_load_microcode()
2556 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); in rt2661_radar_start()
2578 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); in rt2661_radar_start()
2648 RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8); in rt2661_enable_tsf_sync()
2662 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp); in rt2661_enable_tsf_sync()
2668 RAL_WRITE(sc, RT2661_TXRX_CSR9, in rt2661_enable_tsf()
2728 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff); in rt2661_scan_start()