Lines Matching refs:DB_ADDR_SHIFT
783 #define DB_ADDR_SHIFT(addr) ((addr) << DB_PWM_ADDR_OFFSET_SHIFT) macro
1598 uresp.db_offset = DB_ADDR_SHIFT(DQ_PWM_OFFSET_UCM_RDMA_CQ_CONS_32BIT); in qlnxr_copy_cq_uresp()
1839 DB_ADDR_SHIFT(DQ_PWM_OFFSET_UCM_RDMA_CQ_CONS_32BIT); in qlnxr_create_cq()
2133 DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_IWARP_RQ_PROD); in qlnxr_copy_rq_uresp()
2135 DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_FLAGS); in qlnxr_copy_rq_uresp()
2142 DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_ROCE_RQ_PROD); in qlnxr_copy_rq_uresp()
2161 uresp->sq_db_offset = DB_ADDR_SHIFT(DQ_PWM_OFFSET_XCM_RDMA_SQ_PROD); in qlnxr_copy_sq_uresp()
2676 DB_ADDR_SHIFT(DQ_PWM_OFFSET_XCM_RDMA_SQ_PROD); in qlnxr_set_roce_db_info()
2681 DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_ROCE_RQ_PROD); in qlnxr_set_roce_db_info()
2701 DB_ADDR_SHIFT(DQ_PWM_OFFSET_XCM_RDMA_SQ_PROD); in qlnxr_set_iwarp_db_info()
2706 DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_IWARP_RQ_PROD); in qlnxr_set_iwarp_db_info()
2710 DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_FLAGS); in qlnxr_set_iwarp_db_info()