Lines Matching full:pma
11186 …_E5 (0x3<<0) // FEC lane mapped to PMA lane 0.
11188 …_E5 (0x3<<2) // FEC lane mapped to PMA lane 1.
11190 …_E5 (0x3<<4) // FEC lane mapped to PMA lane 2.
11192 …_E5 (0x3<<6) // FEC lane mapped to PMA lane 3.
11224 …OCK_K2_E5 (0xf<<0) // Per PMA lane FEC synchroniz…
11243 …OCK_K2_E5 (0xf<<0) // Per PMA lane FEC synchroniz…
11445 …MD_PMA_K2_E5 (0x1<<1) // PMD/PMA present when 1.
11622 …//Access:RW DataWidth:0x20 // Vendor Specific Reg; Define Reduced-XLAUI PMA mode using 2 lanes.
11623 … (0x1<<0) // Enable Reduced-XLAUI PMA mode using 2 lanes.
11720 …MD_PMA_K2_E5 (0x1<<1) // PMD/PMA present when 1.
15675 … (0x1<<2) // Local link Status. When read as a one, it indicates that the PMA/PMD has determined …
15677 …ne, it indicates that the PMA/PMD has the ability to perform Auto-Negotiation. When read as a zer…
18357 … (0x1<<2) // Local link Status. When read as a one, it indicates that the PMA/PMD has determined …
18359 …ne, it indicates that the PMA/PMD has the ability to perform Auto-Negotiation. When read as a zer…
21039 … (0x1<<2) // Local link Status. When read as a one, it indicates that the PMA/PMD has determined …
21041 …ne, it indicates that the PMA/PMD has the ability to perform Auto-Negotiation. When read as a zer…
23721 … (0x1<<2) // Local link Status. When read as a one, it indicates that the PMA/PMD has determined …
23723 …ne, it indicates that the PMA/PMD has the ability to perform Auto-Negotiation. When read as a zer…
26259 … pcs_rate_o[1] : 0: PMA operates in 10b/20b mode Enables %5 circuit …
26552 …MA_TXCLK_SEL_O_1_K2_E5 (0x1<<1) // PMA TX Clock Select for…
26659 …PMA_LOAD_OVR_K2_E5 (0x1<<7) // ICA Method PMA Load signal Overrid…
26675 …UL //Access:RW DataWidth:0x8 // GCFSM pma_data_o override data. Bits applied to PMA are [8:15]
26677 … (0xf<<0) // GCFSM pma_data_o override data. Bits applied to PMA are [8:15]
26679 …n of a given bit causes the value stored in gcfsm_lane_pma_data_ovr_o to the associated PMA compone
26680 …n of a given bit causes the value stored in gcfsm_lane_pma_data_ovr_o to the associated PMA compone
26726 …L_LOAD_OVR_K2_E5 (0x1<<6) // ICA Method PMA Load signal Overrid…
26990 … (0x1<<7) // Inverts the polarity of superboost_en before assigning to PMA
27005 … (0x3<<3) // Override the value of rx_att_gain output to PMA when rx_att_gain_au…
27007 … (0x1<<5) // Override the value of rx_superbst_ena output to PMA when superbst_autoc…
27190 … (0x1<<2) // Override enable for CDFE output eye_ena270. When 1, AHB value is passed to PMA
27192 … (0x1<<3) // Override enable for CDFE output eye_ena90. When 1, AHB value is passed to PMA
27194 … (0x1<<4) // Override enable for CDFE output phd_ena. When 1, AHB value is passed to PMA
27198 … (0x1<<6) // Override enable for CDFE output eye_sgn_rst. When 1, AHB value is passed to PMA
27402 … (0x3<<3) // Bit stripping on rxdata from PMA to PCS 2�b00: no bi…
27409 … (0x3<<2) // Bit stuffing on txdata from PCS to PMA, bit stripping on rxdata from PMA to…
27439 … 0x0014ecUL //Access:RW DataWidth:0x8 // Delays the beacon_ena propagation to PMA
27441 …YED_COUNT_NUMBER_O_11_8_K2_E5 (0xf<<0) // Delays the beacon_ena propagation to PMA
27468 …ENA_O_K2_E5 (0x1<<6) // override enable for tx_lowpwr_idle_ena output to PMA
27470 …_O_K2_E5 (0x1<<7) // override value for tx_lowpwr_idle_ena output to PMA
28054 …estbus select for comp_offset and tap_offset 1: Raw output from i_dfe_tap_dc_offset 0: Input to pma
28375 …_PIPE_RST_IDDQ_SD_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28377 …_PIPE_RST_PD_DFE_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28379 …_PIPE_RST_PD_DFE_BIAS_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28381 …_PIPE_RST_PD_LNREG_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28383 …_PIPE_RST_PD_LNREGH_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28385 …_PIPE_RST_PD_P2S_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28387 …_PIPE_RST_PD_RA_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28389 …_PIPE_RST_PD_S2P_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28392 …_PIPE_RST_PD_SLV_BIAS_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28394 …_PIPE_RST_PD_TXDRV_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28396 …_PIPE_RST_PD_TXREG_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28398 …_PIPE_RST_PD_VCO_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28400 …_PIPE_RST_PD_VCO_BUF_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28402 …_PIPE_RST_RESET_CDR_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28404 …_PIPE_RST_RESET_CDR_GCRX_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28406 …_PIPE_RST_RESET_DFE_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28409 …_PIPE_RST_RESET_LNREG_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28411 …_PIPE_RST_RESET_LNREGH_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28413 …_PIPE_RST_RESET_P2S_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28415 …_PIPE_RST_RESET_RA_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28417 …_PIPE_RST_RESET_S2P_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28419 …_PIPE_RST_RESET_VCO_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28421 …_PIPE_RST_TXREG_BLEED_ENA_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28423 …_PIPE_RST_TX_LOWPWR_IDLE_ENA_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28426 …_PIPE_RST_CDR_EN_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28428 …_PIPE_RST_RXBCLK_EN_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28430 …_PIPE_RST_RX_GATE_EN_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28432 …_PIPE_RST_RESET_TX_CLKDIV_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28435 …_PIPE_P0_IDDQ_SD_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28437 …_PIPE_P0_PD_DFE_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28439 …_PIPE_P0_PD_DFE_BIAS_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28441 …_PIPE_P0_PD_LNREG_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28443 …_PIPE_P0_PD_LNREGH_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28445 …_PIPE_P0_PD_P2S_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28447 …_PIPE_P0_PD_RA_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28449 …_PIPE_P0_PD_S2P_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28452 …_PIPE_P0_PD_SLV_BIAS_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28454 …_PIPE_P0_PD_TXDRV_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28456 …_PIPE_P0_PD_TXREG_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28458 …_PIPE_P0_PD_VCO_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28460 …_PIPE_P0_PD_VCO_BUF_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28462 …_PIPE_P0_RESET_CDR_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28464 …_PIPE_P0_RESET_CDR_GCRX_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28466 …_PIPE_P0_RESET_DFE_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28469 …_PIPE_P0_RESET_LNREG_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28471 …_PIPE_P0_RESET_LNREGH_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28473 …_PIPE_P0_RESET_P2S_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28475 …_PIPE_P0_RESET_RA_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28477 …_PIPE_P0_RESET_S2P_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28479 …_PIPE_P0_RESET_VCO_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28481 …_PIPE_P0_TXREG_BLEED_ENA_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28483 …_PIPE_P0_TX_LOWPWR_IDLE_ENA_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28486 …_PIPE_P0_CDR_EN_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28488 …_PIPE_P0_RXBCLK_EN_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28490 …_PIPE_P0_RX_GATE_EN_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28492 …_PIPE_P0_RESET_TX_CLKDIV_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28495 …_PIPE_P1_IDDQ_SD_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28497 …_PIPE_P1_PD_DFE_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28499 …_PIPE_P1_PD_DFE_BIAS_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28501 …_PIPE_P1_PD_LNREG_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28503 …_PIPE_P1_PD_LNREGH_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28505 …_PIPE_P1_PD_P2S_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28507 …_PIPE_P1_PD_RA_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28509 …_PIPE_P1_PD_S2P_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28512 …_PIPE_P1_PD_SLV_BIAS_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28514 …_PIPE_P1_PD_TXDRV_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28516 …_PIPE_P1_PD_TXREG_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28518 …_PIPE_P1_PD_VCO_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28520 …_PIPE_P1_PD_VCO_BUF_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28522 …_PIPE_P1_RESET_CDR_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28524 …_PIPE_P1_RESET_CDR_GCRX_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28526 …_PIPE_P1_RESET_DFE_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28529 …_PIPE_P1_RESET_LNREG_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28531 …_PIPE_P1_RESET_LNREGH_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28533 …_PIPE_P1_RESET_P2S_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28535 …_PIPE_P1_RESET_RA_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28537 …_PIPE_P1_RESET_S2P_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28539 …_PIPE_P1_RESET_VCO_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28541 …_PIPE_P1_TXREG_BLEED_ENA_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28543 …_PIPE_P1_TX_LOWPWR_IDLE_ENA_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28546 …_PIPE_P1_CDR_EN_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28548 …_PIPE_P1_RXBCLK_EN_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28550 …_PIPE_P1_RX_GATE_EN_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28552 …_PIPE_P1_RESET_TX_CLKDIV_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28555 …_PIPE_P2_IDDQ_SD_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28557 …_PIPE_P2_PD_DFE_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28559 …_PIPE_P2_PD_DFE_BIAS_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28561 …_PIPE_P2_PD_LNREG_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28563 …_PIPE_P2_PD_LNREGH_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28565 …_PIPE_P2_PD_P2S_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28567 …_PIPE_P2_PD_RA_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28569 …_PIPE_P2_PD_S2P_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28572 …_PIPE_P2_PD_SLV_BIAS_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28574 …_PIPE_P2_PD_TXDRV_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28576 …_PIPE_P2_PD_TXREG_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28578 …_PIPE_P2_PD_VCO_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28580 …_PIPE_P2_PD_VCO_BUF_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28582 …_PIPE_P2_RESET_CDR_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28584 …_PIPE_P2_RESET_CDR_GCRX_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28586 …_PIPE_P2_RESET_DFE_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28589 …_PIPE_P2_RESET_LNREG_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28591 …_PIPE_P2_RESET_LNREGH_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28593 …_PIPE_P2_RESET_P2S_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28595 …_PIPE_P2_RESET_RA_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28597 …_PIPE_P2_RESET_S2P_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28599 …_PIPE_P2_RESET_VCO_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28601 …_PIPE_P2_TXREG_BLEED_ENA_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28603 …_PIPE_P2_TX_LOWPWR_IDLE_ENA_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28606 …_PIPE_P2_CDR_EN_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28608 …_PIPE_P2_RXBCLK_EN_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28610 …_PIPE_P2_RX_GATE_EN_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28612 …_PIPE_P2_RESET_TX_CLKDIV_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28615 …PROG_MULT_DELAY_IDDQ_RESET_1_4_0_K2_E5 (0x1f<<0) // MFSM's PMA pd/reset input cont…
28619 …PROG_MULT_DELAY_IDDQ_RESET_2_4_0_K2_E5 (0x1f<<0) // MFSM's PMA pd/reset input cont…
28709 …_PIPE_P1_0_PD_LNREGH_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28711 …_PIPE_P1_0_PD_VCO_BUF_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28713 …_PIPE_P1_0_RESET_CDR_GCRX_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28715 …_PIPE_P1_0_RX_GATE_EN_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28717 …_PIPE_P1_0_RESET_LNREG_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28719 …_PIPE_P1_0_RESET_P2S_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28721 …_PIPE_P1_0_RESET_S2P_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28723 …_PIPE_P1_0_RESET_CDR_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28726 …_PIPE_P1_0_RESET_DFE_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28728 …_PIPE_P1_0_RESET_VCO_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28730 …_PIPE_P1_0_RESET_RA_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28732 …_PIPE_P1_0_RESET_LNREGH_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28734 …_PIPE_P1_0_PD_DFE_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28736 …_PIPE_P1_0_PD_LNREG_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28738 …_PIPE_P1_0_PD_P2S_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28740 …_PIPE_P1_0_PD_RA_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28743 …_PIPE_P1_0_PD_S2P_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28745 …_PIPE_P1_0_PD_SLV_BIAS_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28747 …_PIPE_P1_0_PD_TXDRV_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28749 …_PIPE_P1_0_PD_VCO_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28751 …_PIPE_P1_0_PD_DFE_BIAS_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28753 …_PIPE_P1_0_IDDQ_SD_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28755 …_PIPE_P1_0_CDR_EN_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28757 …_PIPE_P1_0_RXBCLK_EN_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28760 …_PIPE_P1_0_TX_LOWPWR_IDLE_ENA_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28762 …_PIPE_P1_0_TXREG_BLEED_ENA_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28764 …_PIPE_P1_0_PD_TXREG_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28766 …_PIPE_P1_0_RESET_TX_CLKDIV_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28769 …_PIPE_P1_1_PD_LNREGH_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28771 …_PIPE_P1_1_PD_VCO_BUF_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28773 …_PIPE_P1_1_RESET_CDR_GCRX_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28775 …_PIPE_P1_1_RX_GATE_EN_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28777 …_PIPE_P1_1_RESET_LNREG_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28779 …_PIPE_P1_1_RESET_P2S_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28781 …_PIPE_P1_1_RESET_S2P_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28783 …_PIPE_P1_1_RESET_CDR_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28786 …_PIPE_P1_1_RESET_DFE_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28788 …_PIPE_P1_1_RESET_VCO_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28790 …_PIPE_P1_1_RESET_RA_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28792 …_PIPE_P1_1_RESET_LNREGH_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28794 …_PIPE_P1_1_PD_DFE_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28796 …_PIPE_P1_1_PD_LNREG_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28798 …_PIPE_P1_1_PD_P2S_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28800 …_PIPE_P1_1_PD_RA_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28803 …_PIPE_P1_1_PD_S2P_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28805 …_PIPE_P1_1_PD_SLV_BIAS_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28807 …_PIPE_P1_1_PD_TXDRV_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28809 …_PIPE_P1_1_PD_VCO_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28811 …_PIPE_P1_1_PD_DFE_BIAS_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28813 …_PIPE_P1_1_IDDQ_SD_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28815 …_PIPE_P1_1_CDR_EN_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28817 …_PIPE_P1_1_RESET_TX_CLKDIV_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28820 …_PIPE_P1_1_RXBCLK_EN_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28822 …_PIPE_P1_1_TX_LOWPWR_IDLE_ENA_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28824 …_PIPE_P1_1_TXREG_BLEED_ENA_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28826 …_PIPE_P1_1_PD_TXREG_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28829 …_PIPE_P1_2_PD_LNREGH_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28831 …_PIPE_P1_2_PD_VCO_BUF_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28833 …_PIPE_P1_2_RESET_CDR_GCRX_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28835 …_PIPE_P1_2_RX_GATE_EN_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28837 …_PIPE_P1_2_RESET_LNREG_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28839 …_PIPE_P1_2_RESET_P2S_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28841 …_PIPE_P1_2_RESET_S2P_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28843 …_PIPE_P1_2_RESET_TX_CLKDIV_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28846 …_PIPE_P1_2_RESET_CDR_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28848 …_PIPE_P1_2_RESET_DFE_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28850 …_PIPE_P1_2_RESET_VCO_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28852 …_PIPE_P1_2_RESET_RA_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28854 …_PIPE_P1_2_RESET_LNREGH_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28856 …_PIPE_P1_2_PD_DFE_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28858 …_PIPE_P1_2_PD_LNREG_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28860 …_PIPE_P1_2_PD_P2S_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28863 …_PIPE_P1_2_PD_RA_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28865 …_PIPE_P1_2_PD_S2P_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28867 …_PIPE_P1_2_PD_SLV_BIAS_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28869 …_PIPE_P1_2_PD_TXDRV_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28871 …_PIPE_P1_2_PD_VCO_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
28873 …_PIPE_P1_2_PD_DFE_BIAS_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
28875 …_PIPE_P1_2_IDDQ_SD_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
28877 …_PIPE_P1_2_CDR_EN_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
28880 …_PIPE_P1_2_RXBCLK_EN_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
28882 …_PIPE_P1_2_TX_LOWPWR_IDLE_ENA_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
28884 …_PIPE_P1_2_TXREG_BLEED_ENA_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
28886 …_PIPE_P1_2_PD_TXREG_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
28888 … 0x002fbcUL //Access:RW DataWidth:0x8 // MFSM's PMA pd/reset input cont…
28889 … 0x002fc0UL //Access:RW DataWidth:0x8 // MFSM's PMA pd/reset input cont…
28890 … 0x002fc4UL //Access:RW DataWidth:0x8 // MFSM's PMA pd/reset input cont…
28891 … 0x002fc8UL //Access:RW DataWidth:0x8 // MFSM's PMA pd/reset input cont…
28893 …G_MULT_REF_CLK_WAIT_O_K2_E5 (0x7<<0) // MFSM's PMA pd/reset input cont…
29223 … pcs_rate_o[1] : 0: PMA operates in 10b/20b mode Enables %5 circuit …
29798 … pcs_rate_o[1] : 0: PMA operates in 10b/20b mode Enables %5 circuit …
29823 … pcs_rate_o[1] : 0: PMA operates in 10b/20b mode Enables %5 circuit …
30258 …A_TXCLK_SEL_O_1_K2_E5 (0x1<<1) // PMA TX Clock Select for…
30265 …PMA. 2'b01/2'b10: lnX_ck_txb_o is divided by 2 version of the tx byte clock fr…
30369 …MA_LOAD_OVR_K2_E5 (0x1<<7) // ICA Method PMA Load signal Overrid…
30385 …UL //Access:RW DataWidth:0x8 // GCFSM pma_data_o override data. Bits applied to PMA are [8:15]
30387 … (0xf<<0) // GCFSM pma_data_o override data. Bits applied to PMA are [8:15]
30389 …n of a given bit causes the value stored in gcfsm_lane_pma_data_ovr_o to the associated PMA compone
30390 …n of a given bit causes the value stored in gcfsm_lane_pma_data_ovr_o to the associated PMA compone
30435 …_LOAD_OVR_K2_E5 (0x1<<6) // ICA Method PMA Load signal Overrid…
30742 … (0x1<<7) // Inverts the polarity of superboost_en before assigning to PMA
30757 … (0x3<<3) // Override the value of rx_att_gain output to PMA when rx_att_gain_au…
30759 … (0x1<<5) // Override the value of rx_superbst_ena output to PMA when superbst_autoc…
30970 … (0x1<<2) // Override enable for CDFE output eye_ena270. When 1, AHB value is passed to PMA
30972 … (0x1<<3) // Override enable for CDFE output eye_ena90. When 1, AHB value is passed to PMA
30974 … (0x1<<4) // Override enable for CDFE output phd_ena. When 1, AHB value is passed to PMA
30978 … (0x1<<6) // Override enable for CDFE output eye_sgn_rst. When 1, AHB value is passed to PMA
31182 … (0x3<<3) // Bit stripping on rxdata from PMA to PCS 2�b00: no bi…
31189 … (0x3<<2) // Bit stuffing on txdata from PCS to PMA, bit stripping on rxdata from PMA to…
31200 …PMA, PCS and SoC logic enable bit. 1: in NORM state, lnX_ck_txb_o is switched to the per lane tran…
31203 …fter the lnX_ck_txb_o is switched to the per lane transmit byte clock from PMA. The lnX_ok_o will …
31266 … 0x000cecUL //Access:RW DataWidth:0x8 // Delays the beacon_ena propagation to PMA
31268 …ED_COUNT_NUMBER_11_8_O_K2_E5 (0xf<<0) // Delays the beacon_ena propagation to PMA
31295 …NA_O_K2_E5 (0x1<<6) // override enable for tx_lowpwr_idle_ena output to PMA
31297 …O_K2_E5 (0x1<<7) // override value for tx_lowpwr_idle_ena output to PMA
31338 …A_TXCLK_SEL_O_1_K2_E5 (0x1<<1) // PMA TX Clock Select for…
31345 …PMA. 2'b01/2'b10: lnX_ck_txb_o is divided by 2 version of the tx byte clock fr…
31449 …MA_LOAD_OVR_K2_E5 (0x1<<7) // ICA Method PMA Load signal Overrid…
31465 …UL //Access:RW DataWidth:0x8 // GCFSM pma_data_o override data. Bits applied to PMA are [8:15]
31467 … (0xf<<0) // GCFSM pma_data_o override data. Bits applied to PMA are [8:15]
31469 …n of a given bit causes the value stored in gcfsm_lane_pma_data_ovr_o to the associated PMA compone
31470 …n of a given bit causes the value stored in gcfsm_lane_pma_data_ovr_o to the associated PMA compone
31515 …_LOAD_OVR_K2_E5 (0x1<<6) // ICA Method PMA Load signal Overrid…
31822 … (0x1<<7) // Inverts the polarity of superboost_en before assigning to PMA
31837 … (0x3<<3) // Override the value of rx_att_gain output to PMA when rx_att_gain_au…
31839 … (0x1<<5) // Override the value of rx_superbst_ena output to PMA when superbst_autoc…
32050 … (0x1<<2) // Override enable for CDFE output eye_ena270. When 1, AHB value is passed to PMA
32052 … (0x1<<3) // Override enable for CDFE output eye_ena90. When 1, AHB value is passed to PMA
32054 … (0x1<<4) // Override enable for CDFE output phd_ena. When 1, AHB value is passed to PMA
32058 … (0x1<<6) // Override enable for CDFE output eye_sgn_rst. When 1, AHB value is passed to PMA
32262 … (0x3<<3) // Bit stripping on rxdata from PMA to PCS 2�b00: no bi…
32269 … (0x3<<2) // Bit stuffing on txdata from PCS to PMA, bit stripping on rxdata from PMA to…
32280 …PMA, PCS and SoC logic enable bit. 1: in NORM state, lnX_ck_txb_o is switched to the per lane tran…
32283 …fter the lnX_ck_txb_o is switched to the per lane transmit byte clock from PMA. The lnX_ok_o will …
32346 … 0x0014ecUL //Access:RW DataWidth:0x8 // Delays the beacon_ena propagation to PMA
32348 …ED_COUNT_NUMBER_11_8_O_K2_E5 (0xf<<0) // Delays the beacon_ena propagation to PMA
32375 …NA_O_K2_E5 (0x1<<6) // override enable for tx_lowpwr_idle_ena output to PMA
32377 …O_K2_E5 (0x1<<7) // override value for tx_lowpwr_idle_ena output to PMA
32418 …A_TXCLK_SEL_O_1_K2_E5 (0x1<<1) // PMA TX Clock Select for…
32425 …PMA. 2'b01/2'b10: lnX_ck_txb_o is divided by 2 version of the tx byte clock fr…
32529 …MA_LOAD_OVR_K2_E5 (0x1<<7) // ICA Method PMA Load signal Overrid…
32545 …UL //Access:RW DataWidth:0x8 // GCFSM pma_data_o override data. Bits applied to PMA are [8:15]
32547 … (0xf<<0) // GCFSM pma_data_o override data. Bits applied to PMA are [8:15]
32549 …n of a given bit causes the value stored in gcfsm_lane_pma_data_ovr_o to the associated PMA compone
32550 …n of a given bit causes the value stored in gcfsm_lane_pma_data_ovr_o to the associated PMA compone
32595 …_LOAD_OVR_K2_E5 (0x1<<6) // ICA Method PMA Load signal Overrid…
32902 … (0x1<<7) // Inverts the polarity of superboost_en before assigning to PMA
32917 … (0x3<<3) // Override the value of rx_att_gain output to PMA when rx_att_gain_au…
32919 … (0x1<<5) // Override the value of rx_superbst_ena output to PMA when superbst_autoc…
33130 … (0x1<<2) // Override enable for CDFE output eye_ena270. When 1, AHB value is passed to PMA
33132 … (0x1<<3) // Override enable for CDFE output eye_ena90. When 1, AHB value is passed to PMA
33134 … (0x1<<4) // Override enable for CDFE output phd_ena. When 1, AHB value is passed to PMA
33138 … (0x1<<6) // Override enable for CDFE output eye_sgn_rst. When 1, AHB value is passed to PMA
33342 … (0x3<<3) // Bit stripping on rxdata from PMA to PCS 2�b00: no bi…
33349 … (0x3<<2) // Bit stuffing on txdata from PCS to PMA, bit stripping on rxdata from PMA to…
33360 …PMA, PCS and SoC logic enable bit. 1: in NORM state, lnX_ck_txb_o is switched to the per lane tran…
33363 …fter the lnX_ck_txb_o is switched to the per lane transmit byte clock from PMA. The lnX_ok_o will …
33426 … 0x001cecUL //Access:RW DataWidth:0x8 // Delays the beacon_ena propagation to PMA
33428 …ED_COUNT_NUMBER_11_8_O_K2_E5 (0xf<<0) // Delays the beacon_ena propagation to PMA
33455 …NA_O_K2_E5 (0x1<<6) // override enable for tx_lowpwr_idle_ena output to PMA
33457 …O_K2_E5 (0x1<<7) // override value for tx_lowpwr_idle_ena output to PMA
33498 …A_TXCLK_SEL_O_1_K2_E5 (0x1<<1) // PMA TX Clock Select for…
33505 …PMA. 2'b01/2'b10: lnX_ck_txb_o is divided by 2 version of the tx byte clock fr…
33609 …MA_LOAD_OVR_K2_E5 (0x1<<7) // ICA Method PMA Load signal Overrid…
33625 …UL //Access:RW DataWidth:0x8 // GCFSM pma_data_o override data. Bits applied to PMA are [8:15]
33627 … (0xf<<0) // GCFSM pma_data_o override data. Bits applied to PMA are [8:15]
33629 …n of a given bit causes the value stored in gcfsm_lane_pma_data_ovr_o to the associated PMA compone
33630 …n of a given bit causes the value stored in gcfsm_lane_pma_data_ovr_o to the associated PMA compone
33675 …_LOAD_OVR_K2_E5 (0x1<<6) // ICA Method PMA Load signal Overrid…
33982 … (0x1<<7) // Inverts the polarity of superboost_en before assigning to PMA
33997 … (0x3<<3) // Override the value of rx_att_gain output to PMA when rx_att_gain_au…
33999 … (0x1<<5) // Override the value of rx_superbst_ena output to PMA when superbst_autoc…
34210 … (0x1<<2) // Override enable for CDFE output eye_ena270. When 1, AHB value is passed to PMA
34212 … (0x1<<3) // Override enable for CDFE output eye_ena90. When 1, AHB value is passed to PMA
34214 … (0x1<<4) // Override enable for CDFE output phd_ena. When 1, AHB value is passed to PMA
34218 … (0x1<<6) // Override enable for CDFE output eye_sgn_rst. When 1, AHB value is passed to PMA
34422 … (0x3<<3) // Bit stripping on rxdata from PMA to PCS 2�b00: no bi…
34429 … (0x3<<2) // Bit stuffing on txdata from PCS to PMA, bit stripping on rxdata from PMA to…
34440 …PMA, PCS and SoC logic enable bit. 1: in NORM state, lnX_ck_txb_o is switched to the per lane tran…
34443 …fter the lnX_ck_txb_o is switched to the per lane transmit byte clock from PMA. The lnX_ok_o will …
34506 … 0x0024ecUL //Access:RW DataWidth:0x8 // Delays the beacon_ena propagation to PMA
34508 …ED_COUNT_NUMBER_11_8_O_K2_E5 (0xf<<0) // Delays the beacon_ena propagation to PMA
34535 …NA_O_K2_E5 (0x1<<6) // override enable for tx_lowpwr_idle_ena output to PMA
34537 …O_K2_E5 (0x1<<7) // override value for tx_lowpwr_idle_ena output to PMA
35336 …estbus select for comp_offset and tap_offset 1: Raw output from i_dfe_tap_dc_offset 0: Input to pma
35708 …PIPE_RST_IDDQ_SD_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
35710 …PIPE_RST_PD_DFE_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
35712 …PIPE_RST_PD_DFE_BIAS_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
35714 …PIPE_RST_PD_LNREG_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
35716 …PIPE_RST_PD_LNREGH_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
35718 …PIPE_RST_PD_P2S_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
35720 …PIPE_RST_PD_RA_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
35722 …PIPE_RST_PD_S2P_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
35725 …PIPE_RST_PD_SLV_BIAS_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
35727 …PIPE_RST_PD_TXDRV_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
35729 …PIPE_RST_PD_TXREG_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
35731 …PIPE_RST_PD_VCO_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
35733 …PIPE_RST_PD_VCO_BUF_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
35735 …PIPE_RST_RESET_CDR_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
35737 …PIPE_RST_RESET_CDR_GCRX_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
35739 …PIPE_RST_RESET_DFE_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
35742 …PIPE_RST_RESET_LNREG_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
35744 …PIPE_RST_RESET_LNREGH_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
35746 …PIPE_RST_RESET_P2S_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
35748 …PIPE_RST_RESET_RA_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
35750 …PIPE_RST_RESET_S2P_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
35752 …PIPE_RST_RESET_VCO_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
35754 …PIPE_RST_TXREG_BLEED_ENA_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
35756 …PIPE_RST_TX_LOWPWR_IDLE_ENA_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
35759 …PIPE_RST_CDR_EN_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
35761 …PIPE_RST_RXBCLK_EN_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
35763 …PIPE_RST_RX_GATE_EN_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
35765 …PIPE_RST_RESET_TX_CLKDIV_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
35768 …PIPE_P0_IDDQ_SD_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
35770 …PIPE_P0_PD_DFE_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
35772 …PIPE_P0_PD_DFE_BIAS_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
35774 …PIPE_P0_PD_LNREG_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
35776 …PIPE_P0_PD_LNREGH_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
35778 …PIPE_P0_PD_P2S_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
35780 …PIPE_P0_PD_RA_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
35782 …PIPE_P0_PD_S2P_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
35785 …PIPE_P0_PD_SLV_BIAS_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
35787 …PIPE_P0_PD_TXDRV_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
35789 …PIPE_P0_PD_TXREG_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
35791 …PIPE_P0_PD_VCO_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
35793 …PIPE_P0_PD_VCO_BUF_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
35795 …PIPE_P0_RESET_CDR_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
35797 …PIPE_P0_RESET_CDR_GCRX_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
35799 …PIPE_P0_RESET_DFE_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
35802 …PIPE_P0_RESET_LNREG_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
35804 …PIPE_P0_RESET_LNREGH_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
35806 …PIPE_P0_RESET_P2S_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
35808 …PIPE_P0_RESET_RA_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
35810 …PIPE_P0_RESET_S2P_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
35812 …PIPE_P0_RESET_VCO_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
35814 …PIPE_P0_TXREG_BLEED_ENA_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
35816 …PIPE_P0_TX_LOWPWR_IDLE_ENA_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
35819 …PIPE_P0_CDR_EN_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
35821 …PIPE_P0_RXBCLK_EN_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
35823 …PIPE_P0_RX_GATE_EN_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
35825 …PIPE_P0_RESET_TX_CLKDIV_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
35828 …PIPE_P1_IDDQ_SD_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
35830 …PIPE_P1_PD_DFE_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
35832 …PIPE_P1_PD_DFE_BIAS_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
35834 …PIPE_P1_PD_LNREG_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
35836 …PIPE_P1_PD_LNREGH_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
35838 …PIPE_P1_PD_P2S_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
35840 …PIPE_P1_PD_RA_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
35842 …PIPE_P1_PD_S2P_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
35845 …PIPE_P1_PD_SLV_BIAS_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
35847 …PIPE_P1_PD_TXDRV_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
35849 …PIPE_P1_PD_TXREG_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
35851 …PIPE_P1_PD_VCO_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
35853 …PIPE_P1_PD_VCO_BUF_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
35855 …PIPE_P1_RESET_CDR_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
35857 …PIPE_P1_RESET_CDR_GCRX_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
35859 …PIPE_P1_RESET_DFE_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
35862 …PIPE_P1_RESET_LNREG_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
35864 …PIPE_P1_RESET_LNREGH_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
35866 …PIPE_P1_RESET_P2S_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
35868 …PIPE_P1_RESET_RA_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
35870 …PIPE_P1_RESET_S2P_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
35872 …PIPE_P1_RESET_VCO_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
35874 …PIPE_P1_TXREG_BLEED_ENA_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
35876 …PIPE_P1_TX_LOWPWR_IDLE_ENA_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
35879 …PIPE_P1_CDR_EN_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
35881 …PIPE_P1_RXBCLK_EN_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
35883 …PIPE_P1_RX_GATE_EN_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
35885 …PIPE_P1_RESET_TX_CLKDIV_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
35888 …PIPE_P2_IDDQ_SD_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
35890 …PIPE_P2_PD_DFE_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
35892 …PIPE_P2_PD_DFE_BIAS_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
35894 …PIPE_P2_PD_LNREG_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
35896 …PIPE_P2_PD_LNREGH_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
35898 …PIPE_P2_PD_P2S_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
35900 …PIPE_P2_PD_RA_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
35902 …PIPE_P2_PD_S2P_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
35905 …PIPE_P2_PD_SLV_BIAS_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
35907 …PIPE_P2_PD_TXDRV_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
35909 …PIPE_P2_PD_TXREG_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
35911 …PIPE_P2_PD_VCO_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
35913 …PIPE_P2_PD_VCO_BUF_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
35915 …PIPE_P2_RESET_CDR_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
35917 …PIPE_P2_RESET_CDR_GCRX_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
35919 …PIPE_P2_RESET_DFE_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
35922 …PIPE_P2_RESET_LNREG_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
35924 …PIPE_P2_RESET_LNREGH_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
35926 …PIPE_P2_RESET_P2S_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
35928 …PIPE_P2_RESET_RA_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
35930 …PIPE_P2_RESET_S2P_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
35932 …PIPE_P2_RESET_VCO_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
35934 …PIPE_P2_TXREG_BLEED_ENA_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
35936 …PIPE_P2_TX_LOWPWR_IDLE_ENA_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
35939 …PIPE_P2_CDR_EN_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
35941 …PIPE_P2_RXBCLK_EN_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
35943 …PIPE_P2_RX_GATE_EN_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
35945 …PIPE_P2_RESET_TX_CLKDIV_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
35948 …ROG_MULT_DELAY_IDDQ_RESET_1_4_0_K2_E5 (0x1f<<0) // MFSM's PMA pd/reset input cont…
35951 …ROG_MULT_DELAY_IDDQ_RESET_2_4_0_K2_E5 (0x1f<<0) // MFSM's PMA pd/reset input cont…
36169 …PIPE_P1_0_PD_LNREGH_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
36171 …PIPE_P1_0_PD_VCO_BUF_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
36173 …PIPE_P1_0_RESET_CDR_GCRX_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
36175 …PIPE_P1_0_RX_GATE_EN_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
36177 …PIPE_P1_0_RESET_LNREG_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
36179 …PIPE_P1_0_RESET_P2S_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
36181 …PIPE_P1_0_RESET_S2P_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
36183 …PIPE_P1_0_RESET_CDR_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
36186 …PIPE_P1_0_RESET_DFE_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
36188 …PIPE_P1_0_RESET_VCO_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
36190 …PIPE_P1_0_RESET_RA_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
36192 …PIPE_P1_0_RESET_LNREGH_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
36194 …PIPE_P1_0_PD_DFE_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
36196 …PIPE_P1_0_PD_LNREG_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
36198 …PIPE_P1_0_PD_P2S_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
36200 …PIPE_P1_0_PD_RA_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
36203 …PIPE_P1_0_PD_S2P_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
36205 …PIPE_P1_0_PD_SLV_BIAS_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
36207 …PIPE_P1_0_PD_TXDRV_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
36209 …PIPE_P1_0_PD_VCO_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
36211 …PIPE_P1_0_PD_DFE_BIAS_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
36213 …PIPE_P1_0_IDDQ_SD_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
36215 …PIPE_P1_0_CDR_EN_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
36217 …PIPE_P1_0_RXBCLK_EN_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
36220 …PIPE_P1_0_TX_LOWPWR_IDLE_ENA_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
36222 …PIPE_P1_0_TXREG_BLEED_ENA_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
36224 …PIPE_P1_0_PD_TXREG_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
36226 …PIPE_P1_0_RESET_TX_CLKDIV_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
36229 …PIPE_P1_1_PD_LNREGH_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
36231 …PIPE_P1_1_PD_VCO_BUF_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
36233 …PIPE_P1_1_RESET_CDR_GCRX_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
36235 …PIPE_P1_1_RX_GATE_EN_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
36237 …PIPE_P1_1_RESET_LNREG_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
36239 …PIPE_P1_1_RESET_P2S_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
36241 …PIPE_P1_1_RESET_S2P_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
36243 …PIPE_P1_1_RESET_CDR_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
36246 …PIPE_P1_1_RESET_DFE_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
36248 …PIPE_P1_1_RESET_VCO_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
36250 …PIPE_P1_1_RESET_RA_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
36252 …PIPE_P1_1_RESET_LNREGH_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
36254 …PIPE_P1_1_PD_DFE_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
36256 …PIPE_P1_1_PD_LNREG_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
36258 …PIPE_P1_1_PD_P2S_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
36260 …PIPE_P1_1_PD_RA_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
36263 …PIPE_P1_1_PD_S2P_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
36265 …PIPE_P1_1_PD_SLV_BIAS_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
36267 …PIPE_P1_1_PD_TXDRV_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
36269 …PIPE_P1_1_PD_VCO_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
36271 …PIPE_P1_1_PD_DFE_BIAS_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
36273 …PIPE_P1_1_IDDQ_SD_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
36275 …PIPE_P1_1_CDR_EN_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
36277 …PIPE_P1_1_RESET_TX_CLKDIV_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
36280 …PIPE_P1_1_RXBCLK_EN_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
36282 …PIPE_P1_1_TX_LOWPWR_IDLE_ENA_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
36284 …PIPE_P1_1_TXREG_BLEED_ENA_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
36286 …PIPE_P1_1_PD_TXREG_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
36289 …PIPE_P1_2_PD_LNREGH_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
36291 …PIPE_P1_2_PD_VCO_BUF_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
36293 …PIPE_P1_2_RESET_CDR_GCRX_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
36295 …PIPE_P1_2_RX_GATE_EN_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
36297 …PIPE_P1_2_RESET_LNREG_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
36299 …PIPE_P1_2_RESET_P2S_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
36301 …PIPE_P1_2_RESET_S2P_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
36303 …PIPE_P1_2_RESET_TX_CLKDIV_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
36306 …PIPE_P1_2_RESET_CDR_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
36308 …PIPE_P1_2_RESET_DFE_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
36310 …PIPE_P1_2_RESET_VCO_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
36312 …PIPE_P1_2_RESET_RA_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
36314 …PIPE_P1_2_RESET_LNREGH_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
36316 …PIPE_P1_2_PD_DFE_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
36318 …PIPE_P1_2_PD_LNREG_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
36320 …PIPE_P1_2_PD_P2S_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
36323 …PIPE_P1_2_PD_RA_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
36325 …PIPE_P1_2_PD_S2P_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
36327 …PIPE_P1_2_PD_SLV_BIAS_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
36329 …PIPE_P1_2_PD_TXDRV_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
36331 …PIPE_P1_2_PD_VCO_O_K2_E5 (0x1<<4) // MFSM's PMA pd/reset input cont…
36333 …PIPE_P1_2_PD_DFE_BIAS_O_K2_E5 (0x1<<5) // MFSM's PMA pd/reset input cont…
36335 …PIPE_P1_2_IDDQ_SD_O_K2_E5 (0x1<<6) // MFSM's PMA pd/reset input cont…
36337 …PIPE_P1_2_CDR_EN_O_K2_E5 (0x1<<7) // MFSM's PMA pd/reset input cont…
36340 …PIPE_P1_2_RXBCLK_EN_O_K2_E5 (0x1<<0) // MFSM's PMA pd/reset input cont…
36342 …PIPE_P1_2_TX_LOWPWR_IDLE_ENA_O_K2_E5 (0x1<<1) // MFSM's PMA pd/reset input cont…
36344 …PIPE_P1_2_TXREG_BLEED_ENA_O_K2_E5 (0x1<<2) // MFSM's PMA pd/reset input cont…
36346 …PIPE_P1_2_PD_TXREG_O_K2_E5 (0x1<<3) // MFSM's PMA pd/reset input cont…
36348 … 0x002fbcUL //Access:RW DataWidth:0x8 // MFSM's PMA pd/reset input cont…
36349 … 0x002fc0UL //Access:RW DataWidth:0x8 // MFSM's PMA pd/reset input cont…
36350 … 0x002fc4UL //Access:RW DataWidth:0x8 // MFSM's PMA pd/reset input cont…
36351 … 0x002fc8UL //Access:RW DataWidth:0x8 // MFSM's PMA pd/reset input cont…
36353 …_MULT_REF_CLK_WAIT_O_K2_E5 (0x7<<0) // MFSM's PMA pd/reset input cont…
65907 … (0x1<<3) // Lane IDDQ mode enable. Powers down entire PMA lane when asserted.