Lines Matching +full:01 +full:uf
3399 …ng the 'all clear' code. The read value is always '0'. - 00: no change - 01: per clear - 10: no…
3448 …f DLLP errors to be inserted. - 00b: ACK/NAK DLLP's transmission block - 01b: Update FC DLLP's t…
3507 … (0x1<<20) // ACS upstream forwarding enable. Writable only when [UF] is 1.
3840 …nly valid value when FRAMING_ERR =1. Received Unexpected Framing Token - 01h: When non- STP/SDP/…
3853 …ternal state machine of Power Management Slave controller. - 00h: IDLE - 01h: L0 - 02h: L0S - …
3879 …(0x3<<24) // DLCMSM. Indicates the current DLCMSM. - 00b: DL_INACTIVE - 01b: DL_FC_INIT - 11b:…
3911 …eceived first malformed TLP. This pointer is validated by MFTLP_STATUS. - 01h: AtomicOp address a…
3939 …rval Time. Indicates interval time of RxEqEval assertion. - 00: 500ns - 01: 1us - 10: 2us - 1…
6727 … rate. If RATE_SHADOW_SEL==00b, this register is RSVD. If RATE_SHADOW_SEL==01b, this register is f…
6729 … rate. If RATE_SHADOW_SEL==00b, this register is RSVD. If RATE_SHADOW_SEL==01b, this register is f…
6740 …_SHADOW_SEL==00b, this register is for Gen3 data rate. If RATE_SHADOW_SEL==01b, this register is f…
6746 …01: No Tx equalization, no Rx equalization - 10: Tx equalization in phase 2/3, Rx equalization in…
6748 …_SHADOW_SEL==00b, this register is for Gen3 data rate. If RATE_SHADOW_SEL==01b, this register is f…
6928 …_SHADOW_SEL==00b, this register is for Gen3 data rate. If RATE_SHADOW_SEL==01b, this register is f…
6930 …_SHADOW_SEL==00b, this register is for Gen3 data rate. If RATE_SHADOW_SEL==01b, this register is f…
6932 …_SHADOW_SEL==00b, this register is for Gen3 data rate. If RATE_SHADOW_SEL==01b, this register is f…
6934 …_SHADOW_SEL==00b, this register is for Gen3 data rate. If RATE_SHADOW_SEL==01b, this register is f…
6936 …_SHADOW_SEL==00b, this register is for Gen3 data rate. If RATE_SHADOW_SEL==01b, this register is f…
6952 …_SHADOW_SEL==00b, this register is for Gen3 data rate. If RATE_SHADOW_SEL==01b, this register is f…
6954 …_SHADOW_SEL==00b, this register is for Gen3 data rate. If RATE_SHADOW_SEL==01b, this register is f…
6956 …_SHADOW_SEL==00b, this register is for Gen3 data rate. If RATE_SHADOW_SEL==01b, this register is f…
6958 …_SHADOW_SEL==00b, this register is for Gen3 data rate. If RATE_SHADOW_SEL==01b, this register is f…
7058 …ster is same as tl_status_0, except that it corresponds to split completion table entry for tag 01.
10370 …out any filtering implemented (data should bypass filtering machine).; (b) 01 - Filter on prior to…
10372 …NOTE: NA if need to filter connection id prior to trigger event (filter_en=01 OR filter_en=11) as …
27985 … (0x7<<3) // AFE rx_bias setting. Used when rxvcodiv is 01 or 10
35267 … (0x7<<3) // AFE rx_bias setting. Used when rxvcodiv is 01 or 10
36661 …p Core. This is a strap input for the XMAC_MP core. 00 - Single Port Mode; 01 - Dual Port Mode; 1x…
36662 …e side. This is a strap input for the XMAC_MP core. 00 - Single Port Mode; 01 - Dual Port Mode; 10…
36669 …TIMER_VAL.SW_TIMER_VAL of timer 1 reach zero); bit4-5=resolution (00-10us; 01-100us; 10-1ms; 11- 1…
36670 …TIMER_VAL.SW_TIMER_VAL of timer 2 reach zero); bit4-5=resolution (00-10us; 01-100us; 10-1ms; 11- 1…
36671 …TIMER_VAL.SW_TIMER_VAL of timer 3 reach zero); bit4-5=resolution (00-10us; 01-100us; 10-1ms; 11- 1…
36672 …TIMER_VAL.SW_TIMER_VAL of timer 4 reach zero); bit4-5=resolution (00-10us; 01-100us; 10-1ms; 11- 1…
36673 …TIMER_VAL.SW_TIMER_VAL of timer 5 reach zero); bit4-5=resolution (00-10us; 01-100us; 10-1ms; 11- 1…
36674 …TIMER_VAL.SW_TIMER_VAL of timer 6 reach zero); bit4-5=resolution (00-10us; 01-100us; 10-1ms; 11- 1…
36675 …TIMER_VAL.SW_TIMER_VAL of timer 7 reach zero); bit4-5=resolution (00-10us; 01-100us; 10-1ms; 11- 1…
36676 …TIMER_VAL.SW_TIMER_VAL of timer 8 reach zero); bit4-5=resolution (00-10us; 01-100us; 10-1ms; 11- 1…
37045 …/Access:RW DataWidth:0x2 // 00: connect SDA interface to BSC_SDA0 IO. 01: connect SDA interfa…
37243 …ss:RW DataWidth:0x3 // Write request ATC Flags[1:0]: 00 - Do nothing; 01 - Search only; 10 - …
37244 …ess:RW DataWidth:0x3 // Read request ATC Flags[1:0]: 00 - Do nothing; 01 - Search only; 10 - …
37250 … (0x3<<9) // ST hint. 00 - Bidirectional shared data structure; 01 - Device writes/read…
37662 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37663 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37664 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37665 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37666 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37667 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37668 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37669 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37670 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37671 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37672 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37673 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37674 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37675 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37676 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37677 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37678 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37679 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37680 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37681 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37682 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37683 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37684 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37685 … the value which was configured in the trigger_state_set_cnstr_datai. (b) 01: indirect: use the r…
37739 …hout any filtering implemented (data should bypass filtering machine). (b) 01 - Filter on prior (i…
37789 …01: indirect: use the recorded value 0 from of fsm triggering machine (trigger_indirect0_recorded_…
37790 …01: indirect: use the recorded value 0 from of fsm triggering machine (trigger_indirect0_recorded_…
37791 …01: indirect: use the recorded value 0 from of fsm triggering machine (trigger_indirect0_recorded_…
37792 …01: indirect: use the recorded value 0 from of fsm triggering machine (trigger_indirect0_recorded_…
37801 …/ Recording mode prior to trigger event: (a) 00 - record from time=0; (b) 01 - record rcrd_on_win…
37803 …g event. NOTE: (1) applicable only when rcrd_on_window_pre_trgr_evnt_mode=01; (2) valid values ar…
37901 …UL //Access:RW DataWidth:0x2 // 50ohm Driver Current Control 00 = 5mA 01 = 10mA 10 = 15mA 11 …
37907 …utput Stage Bias Control [1:0] LDO Output Voltage Level Control 00 = 1.05V 01 = 1.00V 10 = 0.95V 1…
38003 …01 = phase error stats 10 : period stats 11 : Feedback phase error stats [23:22] Pwm_rate[1:0] Set…
38006 …01 = phase error stats 10 : period stats 11 : Feedback phase error stats [23:22] Pwm_rate[1:0] Set…
38036 …01 = phase error stats 10 : period stats 11 : Feedback phase error stats [23:22] Pwm_rate[1:0] Set…
38038 …01 = phase error stats 10 : period stats 11 : Feedback phase error stats [23:22] Pwm_rate[1:0] Set…
38049 …pleting a new MDIO transaction. [27:26] -> COMMAND 00 -> clause 45 address 01 -> Write 10 -> claus…
38050 …pleting a new MDIO transaction. [27:26] -> COMMAND 00 -> clause 45 address 01 -> Write 10 -> claus…
38100 …01 = flock, PLL frequency locking indicator; 10 = resetb, PLL digital control reset; 11 = 1 [53:50…
38104 …01 = flock, PLL frequency locking indicator; 10 = resetb, PLL digital control reset; 11 = 1 [53:50…
38108 …01 = flock, PLL frequency locking indicator; 10 = resetb, PLL digital control reset; 11 = 1 [53:50…
38275 …01 = flock, PLL frequency locking indicator; 10 = resetb, PLL digital control reset; 11 = 1 [53:50…
38278 …01 = flock, PLL frequency locking indicator; 10 = resetb, PLL digital control reset; 11 = 1 [53:50…
38281 …01 = flock, PLL frequency locking indicator; 10 = resetb, PLL digital control reset; 11 = 1 [53:50…
38532 … (0x3<<6) // 00 : OBFF state that was received from the CPU is applicable. 01 : Forces the CPMU to…
39619 …'; used to set the core mode of operation: 00: Enable 10Mbps Ethernet mode 01: Enable 100Mbps Ethe…
39681 … (0x3<<0) // MAC Speed. 00: 10Mbps Ethernet Mode enabled 01: 100Mbps Ethernet Mo…
44005 … (0x3<<1) // 00: Map to NWM port 0 01: Map to NWM port 1 …
44025 … (0x3<<1) // 00: Map to NWM port 0 01: Map to NWM port 1 …
44045 … (0x3<<1) // 00: Map to NWM port 0 01: Map to NWM port 1 …
44077 … (0x3<<1) // 00: Map to NWM port 0 01: Map to NWM port 1 …
49242 …x2aaf7cUL //Access:RW DataWidth:0x2 // Extand tag mode 00 default mode 01 BB mode 10 Read mode
49770 …ataWidth:0x2 // Number of timers per connection group: 00 - 128 timers, 01 - 64 timers, 10 - 32…
49771 …RW DataWidth:0x2 // Number of timers per task group: 00 - 128 timers, 01 - 64 timers, 10 - 32…
49772 …can feature is disabled, i.e. every scan pulse all the groups are scanned. 01 - each group is sele…
49773 …can feature is disabled, i.e. every scan pulse all the groups are scanned. 01 - each group is sele…
49776 …age; bit2: 0 - low priority, 1 - high priority; bit[1:0]: 00 - do nothing, 01 - search only, 10 - …
49777 …age; bit2: 0 - low priority, 1 - high priority; bit[1:0]: 00 - do nothing, 01 - search only, 10 - …
49778 …age; bit2: 0 - low priority, 1 - high priority; bit[1:0]: 00 - do nothing, 01 - search only, 10 - …
49779 …tes; bit2: 0 - low priority, 1 - high priority; bit[1:0]: 00 - do nothing, 01 - search only, 10 - …
49780 … the expiration command is sent to. The client out decoding is : 00 - XCM, 01 - TCM, 10 - UCM, 11 …
49781 … the expiration command is sent to. The client out decoding is : 00 - XCM, 01 - TCM, 10 - UCM, 11 …
49782 … the expiration command is sent to. The client out decoding is : 00 - XCM, 01 - TCM, 10 - UCM, 11 …
49783 … the expiration command is sent to. The client out decoding is : 00 - XCM, 01 - TCM, 10 - UCM, 11 …
49784 … the expiration command is sent to. The client out decoding is : 00 - XCM, 01 - TCM, 10 - UCM, 11 …
49785 … the expiration command is sent to. The client out decoding is : 00 - XCM, 01 - TCM, 10 - UCM, 11 …
49786 … all expiration command is sent to. The client out decoding is : 00 - XCM, 01 - TCM, 10 - UCM, 11 …
49787 … all expiration command is sent to. The client out decoding is : 00 - XCM, 01 - TCM, 10 - UCM, 11 …
49788 … 00 - No threshold; Command to the host is set without checking threshold, 01 - Threshold accordin…
49789 … 00 - No threshold; Command to the host is set without checking threshold, 01 - Threshold accordin…
49790 … 00 - No threshold; Command to the host is set without checking threshold, 01 - Threshold accordin…
49791 … 00 - No threshold; Command to the host is set without checking threshold, 01 - Threshold accordin…
49792 … 00 - No threshold; Command to the host is set without checking threshold, 01 - Threshold accordin…
49793 … 00 - No threshold; Command to the host is set without checking threshold, 01 - Threshold accordin…
50116 …licy for the I/O Link List: 00: Pop LCIDs from the Head of the List (FIFO) 01: Pop LCIDs from the …
50118 …licy for the INA Link List: 00: Pop LCIDs from the Head of the List (FIFO) 01: Pop LCIDs from the …
50459 …licy for the I/O Link List: 00: Pop LCIDs from the Head of the List (FIFO) 01: Pop LCIDs from the …
50461 …licy for the INA Link List: 00: Pop LCIDs from the Head of the List (FIFO) 01: Pop LCIDs from the …
55587 … (0xf<<4) // length in 32b units from the same 01 .
55689 … (0x3f<<6) // length in 32b units from the dup 01 .
56149 … (0xf<<4) // length in 32b units from the same 01 .
56251 … (0x3f<<6) // length in 32b units from the dup 01 .
56627 … (0xf<<4) // length in 32b units from the same 01 .
56729 … (0x3f<<6) // length in 32b units from the dup 01 .
59719 …vertisement packets (ICMP over IPv6 with ICMP type = 136 and dst_mac = 0x33:33:00:00:00:01) to MCP.
59721 …dvertisement packets (ICMP over IPv6 with ICMP type= 134 and dst_mac = 0x33:33:00:00:00:01) to MCP.
59821 …sement packets (ICMP over IPv6 with ICMP type = 136 and dst_mac = 0x33:33:00:00:00:01) to the host.
59823 …sement packets (ICMP over IPv6 with ICMP type = 134 and dst_mac = 0x33:33:00:00:00:01) to the host.
59889 … 1's for comparison. A value of 7 selects the MAC address range 01-80-C2-00-00-00 to 01-80-C2-00-…
60009 …l 1's for comparison. A value of 7 selects the MAC address range 01-80-C2-00-00-00 to 01-80-C2-00-…
60693 …vertisement packets (ICMP over IPv6 with ICMP type = 136 and dst_mac = 0x33:33:00:00:00:01) to MCP.
60695 …dvertisement packets (ICMP over IPv6 with ICMP type= 134 and dst_mac = 0x33:33:00:00:00:01) to MCP.
60769 …ent packets (ICMP over IPv6 with ICMP type = 136 and dst_mac = 0x33:33:00:00:00:01) to the network.
60771 …ent packets (ICMP over IPv6 with ICMP type = 134 and dst_mac = 0x33:33:00:00:00:01) to the network.
60834 …ent packets (ICMP over IPv6 with ICMP type = 136 and dst_mac = 0x33:33:00:00:00:01) to the network.
60836 …ent packets (ICMP over IPv6 with ICMP type = 134 and dst_mac = 0x33:33:00:00:00:01) to the network.
65077 … (0xf<<4) // length in 32b units from the same 01 .
65179 … (0x3f<<6) // length in 32b units from the dup 01 .
65429 … (0xf<<4) // length in 32b units from the same 01 .
65531 … (0x3f<<6) // length in 32b units from the dup 01 .
65890 …0x3<<4) // Divider control for SOC 1 clock for both CMUs. 00 = Divide by 1 01,10 = Divide by 2 11 …
65898 …0x3<<9) // Divider control for SOC 1 clock for both CMUs. 00 = Divide by 1 01,10 = Divide by 2 11 …
65975 …nfiguration registers that are connected to regulators 00: Using constants 01: Using flow1 10: Usi…
66695 …to �1�. Otherwise, these pins are ignored. 00 Preconfiguration 0 selected. 01 Preconfiguration 1 s…
66710 …to �1�. Otherwise, these pins are ignored. 00 Preconfiguration 0 selected. 01 Preconfiguration 1 s…
66725 …to �1�. Otherwise, these pins are ignored. 00 Preconfiguration 0 selected. 01 Preconfiguration 1 s…
66740 …to �1�. Otherwise, these pins are ignored. 00 Preconfiguration 0 selected. 01 Preconfiguration 1 s…
66755 …to �1�. Otherwise, these pins are ignored. 00 Preconfiguration 0 selected. 01 Preconfiguration 1 s…
66757 …01 Increment. 10 Decrement. 11 Reserved. Bits 5:4. Postcursor coefficient update. 00 Hold. 01 Incr…
66777 …01 Increment 10 Decrement 11 Reserved. Bits 5:4. Post-cursor coefficient status. 00 Not updated 01…
66779 …to �1�. Otherwise, these pins are ignored. 00 Preconfiguration 0 selected. 01 Preconfiguration 1 s…
66781 …01 Increment. 10 Decrement. 11 Reserved. Bits 5:4. Postcursor coefficient update. 00 Hold. 01 Incr…
66801 …01 Increment 10 Decrement 11 Reserved. Bits 5:4. Post-cursor coefficient status. 00 Not updated 01…
66803 …to �1�. Otherwise, these pins are ignored. 00 Preconfiguration 0 selected. 01 Preconfiguration 1 s…
66805 …01 Increment. 10 Decrement. 11 Reserved. Bits 5:4. Postcursor coefficient update. 00 Hold. 01 Incr…
66825 …01 Increment 10 Decrement 11 Reserved. Bits 5:4. Post-cursor coefficient status. 00 Not updated 01…
66827 …to �1�. Otherwise, these pins are ignored. 00 Preconfiguration 0 selected. 01 Preconfiguration 1 s…
66829 …01 Increment. 10 Decrement. 11 Reserved. Bits 5:4. Postcursor coefficient update. 00 Hold. 01 Incr…
66849 …01 Increment 10 Decrement 11 Reserved. Bits 5:4. Post-cursor coefficient status. 00 Not updated 01…
71555 … (0x3<<16) // Status of current IMC Transaction. 00: No_Op 01: Successful Completi…
71559 … (0x3<<28) // Setting these bits starts a I2C Operation 00: No_Op 01: Read 10: Write 11: …
73130 …achines; The values read from this register mean the following; 00 = IDLE; 01 = PEND; 10 = MASK; 1…
73668 …achines; The values read from this register mean the following; 00 = IDLE; 01 = PEND; 10 = MASK; 1…
74230 …achines; The values read from this register mean the following; 00 = IDLE; 01 = PEND; 10 = MASK; 1…
74771 …achines; The values read from this register mean the following; 00 = IDLE; 01 = PEND; 10 = MASK; 1…
75342 …achines; The values read from this register mean the following; 00 = IDLE; 01 = PEND; 10 = MASK; 1…
75884 …achines; The values read from this register mean the following; 00 = IDLE; 01 = PEND; 10 = MASK; 1…
84642 …he mode of the SDM DMA write to passive buffer. 00 - Use mask vector mode. 01 - Use write on sleep…
84696 … 0x140101cUL //Access:RW DataWidth:0x2 // 00 - No stall. 01 - Only SEMI's Stroms…
84749 …icates mode-0, which means all four words are provided by the fast debug. "01" - indicates mode-1,…
86065 …he mode of the SDM DMA write to passive buffer. 00 - Use mask vector mode. 01 - Use write on sleep…
86119 … 0x150101cUL //Access:RW DataWidth:0x2 // 00 - No stall. 01 - Only SEMI's Stroms…
86172 …icates mode-0, which means all four words are provided by the fast debug. "01" - indicates mode-1,…
87487 …he mode of the SDM DMA write to passive buffer. 00 - Use mask vector mode. 01 - Use write on sleep…
87540 … 0x160101cUL //Access:RW DataWidth:0x2 // 00 - No stall. 01 - Only SEMI's Stroms…
87591 …icates mode-0, which means all four words are provided by the fast debug. "01" - indicates mode-1,…
88906 …he mode of the SDM DMA write to passive buffer. 00 - Use mask vector mode. 01 - Use write on sleep…
88959 … 0x170101cUL //Access:RW DataWidth:0x2 // 00 - No stall. 01 - Only SEMI's Stroms…
89010 …icates mode-0, which means all four words are provided by the fast debug. "01" - indicates mode-1,…
90388 …he mode of the SDM DMA write to passive buffer. 00 - Use mask vector mode. 01 - Use write on sleep…
90441 … 0x180101cUL //Access:RW DataWidth:0x2 // 00 - No stall. 01 - Only SEMI's Stroms…
90492 …icates mode-0, which means all four words are provided by the fast debug. "01" - indicates mode-1,…
91807 …he mode of the SDM DMA write to passive buffer. 00 - Use mask vector mode. 01 - Use write on sleep…
91860 … 0x190101cUL //Access:RW DataWidth:0x2 // 00 - No stall. 01 - Only SEMI's Stroms…
91911 …icates mode-0, which means all four words are provided by the fast debug. "01" - indicates mode-1,…