767 	struct ecore_lldp_config_params lldp_params;  in qlnx_lldp_configure()  local
778 	bzero(&lldp_params, sizeof(struct ecore_lldp_config_params));  in qlnx_lldp_configure()
781 	lldp_params.agent = ECORE_LLDP_NEAREST_BRIDGE;  in qlnx_lldp_configure()
782 	lldp_params.tx_interval = 30; //Default value used as suggested by MFW  in qlnx_lldp_configure()
783 	lldp_params.tx_hold = 4; //Default value used as suggested by MFW  in qlnx_lldp_configure()
784 	lldp_params.tx_credit = 5; //Default value used as suggested by MFW  in qlnx_lldp_configure()
785 	lldp_params.rx_enable = enable ? 1 : 0;  in qlnx_lldp_configure()
786 	lldp_params.tx_enable = enable ? 1 : 0;  in qlnx_lldp_configure()
788 	lldp_params.chassis_id_tlv[0] = 0;  in qlnx_lldp_configure()
789 	lldp_params.chassis_id_tlv[0] |= (QLNX_LLDP_TYPE_CHASSIS_ID << 1);  in qlnx_lldp_configure()
790 	lldp_params.chassis_id_tlv[0] |=  in qlnx_lldp_configure()
793 	lldp_params.chassis_id_tlv[0] |= (QLNX_LLDP_CHASSIS_ID_SUBTYPE_MAC << 16);  in qlnx_lldp_configure()
794 	lldp_params.chassis_id_tlv[0] |= lldp_mac[0] << 24;  in qlnx_lldp_configure()
795 	lldp_params.chassis_id_tlv[1] = lldp_mac[1] | (lldp_mac[2] << 8) |  in qlnx_lldp_configure()
797 	lldp_params.chassis_id_tlv[2] = lldp_mac[5];  in qlnx_lldp_configure()
799 	lldp_params.port_id_tlv[0] = 0;  in qlnx_lldp_configure()
800 	lldp_params.port_id_tlv[0] |= (QLNX_LLDP_TYPE_PORT_ID << 1);  in qlnx_lldp_configure()
801 	lldp_params.port_id_tlv[0] |=  in qlnx_lldp_configure()
804 	lldp_params.port_id_tlv[0] |= (QLNX_LLDP_PORT_ID_SUBTYPE_MAC << 16);  in qlnx_lldp_configure()
805 	lldp_params.port_id_tlv[0] |= lldp_mac[0] << 24;  in qlnx_lldp_configure()
806 	lldp_params.port_id_tlv[1] = lldp_mac[1] | (lldp_mac[2] << 8) |  in qlnx_lldp_configure()
808 	lldp_params.port_id_tlv[2] = lldp_mac[5];  in qlnx_lldp_configure()
810 	ret = ecore_lldp_set_params(p_hwfn, p_ptt, &lldp_params);  in qlnx_lldp_configure()