Lines Matching +full:0 +full:xffffff
42 #define ISCSI_DEFAULT_HEADER_DIGEST (0)
43 #define ISCSI_DEFAULT_DATA_DIGEST (0)
46 #define ISCSI_DEFAULT_MAX_PDU_LENGTH (0x2000)
47 #define ISCSI_DEFAULT_FIRST_BURST_LENGTH (0x10000)
48 #define ISCSI_DEFAULT_MAX_BURST_LENGTH (0x40000)
52 #define ISCSI_MIN_VAL_MAX_PDU_LENGTH (0x200)
53 #define ISCSI_MAX_VAL_MAX_PDU_LENGTH (0xffffff)
54 #define ISCSI_MIN_VAL_BURST_LENGTH (0x200)
55 #define ISCSI_MAX_VAL_BURST_LENGTH (0xffffff)
57 #define ISCSI_MAX_VAL_MAX_OUTSTANDING_R2T (0xff) // 0x10000 according to RFC
61 #define ISCSI_WQE_NUM_SGES_SLOWIO (0xf)
64 #define ISCSI_ITT_ALL_ONES (0xffffffff)
65 #define ISCSI_TTT_ALL_ONES (0xffffffff)
70 #define ISCSI_INITIATOR_MODE 0
74 #define ISCSI_OPCODE_NOP_OUT (0)
83 #define ISCSI_OPCODE_NOP_IN (0x20)
84 #define ISCSI_OPCODE_SCSI_RESPONSE (0x21)
85 #define ISCSI_OPCODE_TMF_RESPONSE (0x22)
86 #define ISCSI_OPCODE_LOGIN_RESPONSE (0x23)
87 #define ISCSI_OPCODE_TEXT_RESPONSE (0x24)
88 #define ISCSI_OPCODE_DATA_IN (0x25)
89 #define ISCSI_OPCODE_LOGOUT_RESPONSE (0x26)
90 #define ISCSI_OPCODE_R2T (0x31)
91 #define ISCSI_OPCODE_ASYNC_MSG (0x32)
92 #define ISCSI_OPCODE_REJECT (0x3f)
95 #define ISCSI_STAGE_SECURITY_NEGOTIATION (0)
100 #define CQE_ERROR_BITMAP_DATA_DIGEST (0x08)
101 #define CQE_ERROR_BITMAP_RCV_ON_INVALID_CONN (0x10)
102 #define CQE_ERROR_BITMAP_DATA_TRUNCATED (0x20)
119 #define CQE_ERROR_BITMAP_DIF_ERR_BITS_MASK 0x7 /* Mark task with DIF error (3 bit): [0]-CRC…
120 #define CQE_ERROR_BITMAP_DIF_ERR_BITS_SHIFT 0
121 #define CQE_ERROR_BITMAP_DATA_DIGEST_ERR_MASK 0x1 /* Mark task with data digest error (1 bit) …
123 #define CQE_ERROR_BITMAP_RCV_ON_INVALID_CONN_MASK 0x1 /* Mark receive on invalid connection */
125 #define CQE_ERROR_BITMAP_DATA_TRUNCATED_ERR_MASK 0x1 /* Target Mode - Mark middle task error, dat…
127 #define CQE_ERROR_BITMAP_UNDER_RUN_ERR_MASK 0x1
129 #define CQE_ERROR_BITMAP_RESERVED2_MASK 0x1
162 #define DIF_ON_IMMEDIATE_PARAMS_VALIDATE_GUARD_MASK 0x1
163 #define DIF_ON_IMMEDIATE_PARAMS_VALIDATE_GUARD_SHIFT 0
164 #define DIF_ON_IMMEDIATE_PARAMS_VALIDATE_APP_TAG_MASK 0x1
166 #define DIF_ON_IMMEDIATE_PARAMS_VALIDATE_REF_TAG_MASK 0x1
168 #define DIF_ON_IMMEDIATE_PARAMS_FORWARD_GUARD_MASK 0x1
170 #define DIF_ON_IMMEDIATE_PARAMS_FORWARD_APP_TAG_MASK 0x1
172 #define DIF_ON_IMMEDIATE_PARAMS_FORWARD_REF_TAG_MASK 0x1
174 #define DIF_ON_IMMEDIATE_PARAMS_INTERVAL_SIZE_MASK 0x1 /* 0=512B, 1=4KB */
176 #define DIF_ON_IMMEDIATE_PARAMS_NETWORK_INTERFACE_MASK 0x1 /* 0=None, 1=DIF */
178 #define DIF_ON_IMMEDIATE_PARAMS_HOST_INTERFACE_MASK 0x3 /* 0=None, 1=DIF, 2=DIX */
180 #define DIF_ON_IMMEDIATE_PARAMS_REF_TAG_MASK_MASK 0xF /* mask for refernce tag handli…
182 #define DIF_ON_IMMEDIATE_PARAMS_FORWARD_APP_TAG_WITH_MASK_MASK 0x1 /* Forward application tag with…
184 #define DIF_ON_IMMEDIATE_PARAMS_FORWARD_REF_TAG_WITH_MASK_MASK 0x1 /* Forward reference tag with m…
187 #define DIF_ON_IMMEDIATE_PARAMS_RESERVED_MASK 0x1
188 #define DIF_ON_IMMEDIATE_PARAMS_RESERVED_SHIFT 0
189 #define DIF_ON_IMMEDIATE_PARAMS_IGNORE_APP_TAG_MASK 0x1
191 #define DIF_ON_IMMEDIATE_PARAMS_INITIAL_REF_TAG_IS_VALID_MASK 0x1
193 #define DIF_ON_IMMEDIATE_PARAMS_HOST_GUARD_TYPE_MASK 0x1 /* 0 = IP checksum, 1 = CRC */
195 #define DIF_ON_IMMEDIATE_PARAMS_PROTECTION_TYPE_MASK 0x3 /* 1/2/3 - Protection Type */
197 #define DIF_ON_IMMEDIATE_PARAMS_CRC_SEED_MASK 0x1 /* 0=0x0000, 1=0xffff */
199 #define DIF_ON_IMMEDIATE_PARAMS_KEEP_REF_TAG_CONST_MASK 0x1 /* Keep reference tag constant …
228 #define ISCSI_DIF_FLAGS_PROT_INTERVAL_SIZE_LOG_MASK 0xF /* Protection log interval (9=512 10=1024 …
229 #define ISCSI_DIF_FLAGS_PROT_INTERVAL_SIZE_LOG_SHIFT 0
230 …ne ISCSI_DIF_FLAGS_DIF_TO_PEER_MASK 0x1 /* If DIF protection is configured against tar…
232 …ISCSI_DIF_FLAGS_HOST_INTERFACE_MASK 0x7 /* If DIF/DIX protection is configured against th…
243 …__le32 exp_r2t_sn /* Initiator mode - Expected R2T PDU index in sequence. [variable, initialized 0…
248 #define YSTORM_ISCSI_TASK_STATE_LOCAL_COMP_MASK 0x1 /* local_completion */
249 #define YSTORM_ISCSI_TASK_STATE_LOCAL_COMP_SHIFT 0
250 #define YSTORM_ISCSI_TASK_STATE_SLOW_IO_MASK 0x1 /* Equals 1 if SGL is predicted and 0 othe…
252 #define YSTORM_ISCSI_TASK_STATE_SET_DIF_OFFSET_MASK 0x1 /* Indication for Ystorm that TDIFs offset…
254 #define YSTORM_ISCSI_TASK_STATE_RESERVED0_MASK 0x1F
280 #define ISCSI_COMMON_HDR_OPCODE_MASK 0x3F /* Opcode */
281 #define ISCSI_COMMON_HDR_OPCODE_SHIFT 0
282 #define ISCSI_COMMON_HDR_IMM_MASK 0x1 /* Immediate */
284 #define ISCSI_COMMON_HDR_RSRV_MASK 0x1 /* first bit of iSCSI PDU header */
287 #define ISCSI_COMMON_HDR_DATA_SEG_LEN_MASK 0xFFFFFF /* DataSegmentLength */
288 #define ISCSI_COMMON_HDR_DATA_SEG_LEN_SHIFT 0
289 #define ISCSI_COMMON_HDR_TOTAL_AHS_LEN_MASK 0xFF /* TotalAHSLength */
307 #define ISCSI_CMD_HDR_ATTR_MASK 0x7 /* attributes */
308 #define ISCSI_CMD_HDR_ATTR_SHIFT 0
309 #define ISCSI_CMD_HDR_RSRV_MASK 0x3 /* reserved */
311 #define ISCSI_CMD_HDR_WRITE_MASK 0x1 /* write */
313 #define ISCSI_CMD_HDR_READ_MASK 0x1 /* read */
315 #define ISCSI_CMD_HDR_FINAL_MASK 0x1 /* final */
318 #define ISCSI_CMD_HDR_OPCODE_MASK 0x3F /* Opcode */
319 #define ISCSI_CMD_HDR_OPCODE_SHIFT 0
320 #define ISCSI_CMD_HDR_IMM_MASK 0x1 /* Immediate delivery */
322 #define ISCSI_CMD_HDR_RSRV1_MASK 0x1 /* first bit of iSCSI PDU header */
325 #define ISCSI_CMD_HDR_DATA_SEG_LEN_MASK 0xFFFFFF /* DataSegmentLength */
326 #define ISCSI_CMD_HDR_DATA_SEG_LEN_SHIFT 0
327 #define ISCSI_CMD_HDR_TOTAL_AHS_LEN_MASK 0xFF /* TotalAHSLength */
344 #define ISCSI_EXT_CDB_CMD_HDR_ATTR_MASK 0x7 /* attributes */
345 #define ISCSI_EXT_CDB_CMD_HDR_ATTR_SHIFT 0
346 #define ISCSI_EXT_CDB_CMD_HDR_RSRV_MASK 0x3 /* reserved */
348 #define ISCSI_EXT_CDB_CMD_HDR_WRITE_MASK 0x1 /* write */
350 #define ISCSI_EXT_CDB_CMD_HDR_READ_MASK 0x1 /* read */
352 #define ISCSI_EXT_CDB_CMD_HDR_FINAL_MASK 0x1 /* final */
356 #define ISCSI_EXT_CDB_CMD_HDR_DATA_SEG_LEN_MASK 0xFFFFFF /* DataSegmentLength */
357 #define ISCSI_EXT_CDB_CMD_HDR_DATA_SEG_LEN_SHIFT 0
358 #define ISCSI_EXT_CDB_CMD_HDR_CDB_SIZE_MASK 0xFF /* The Extended CDB size in bytes. Maximum Ex…
376 #define ISCSI_LOGIN_REQ_HDR_NSG_MASK 0x3 /* Next Stage (NSG) */
377 #define ISCSI_LOGIN_REQ_HDR_NSG_SHIFT 0
378 #define ISCSI_LOGIN_REQ_HDR_CSG_MASK 0x3 /* Current stage (CSG) */
380 #define ISCSI_LOGIN_REQ_HDR_RSRV_MASK 0x3 /* reserved */
382 #define ISCSI_LOGIN_REQ_HDR_C_MASK 0x1 /* C (Continue) bit */
384 #define ISCSI_LOGIN_REQ_HDR_T_MASK 0x1 /* T (Transit) bit */
388 #define ISCSI_LOGIN_REQ_HDR_DATA_SEG_LEN_MASK 0xFFFFFF /* DataSegmentLength */
389 #define ISCSI_LOGIN_REQ_HDR_DATA_SEG_LEN_SHIFT 0
390 #define ISCSI_LOGIN_REQ_HDR_TOTAL_AHS_LEN_MASK 0xFF /* TotalAHSLength */
428 #define ISCSI_DATA_OUT_HDR_RSRV_MASK 0x7F /* reserved */
429 #define ISCSI_DATA_OUT_HDR_RSRV_SHIFT 0
430 #define ISCSI_DATA_OUT_HDR_FINAL_MASK 0x1 /* final */
453 #define ISCSI_DATA_IN_HDR_STATUS_MASK 0x1 /* Status */
454 #define ISCSI_DATA_IN_HDR_STATUS_SHIFT 0
455 #define ISCSI_DATA_IN_HDR_UNDERFLOW_MASK 0x1 /* Residual Underflow */
457 #define ISCSI_DATA_IN_HDR_OVERFLOW_MASK 0x1 /* Residual Overflow */
459 #define ISCSI_DATA_IN_HDR_RSRV_MASK 0x7 /* reserved - 0 */
461 #define ISCSI_DATA_IN_HDR_ACK_MASK 0x1 /* Acknowledge */
463 #define ISCSI_DATA_IN_HDR_FINAL_MASK 0x1 /* final */
504 #define ISCSI_NOP_OUT_HDR_RSRV_MASK 0x7F /* reserved */
505 #define ISCSI_NOP_OUT_HDR_RSRV_SHIFT 0
506 #define ISCSI_NOP_OUT_HDR_CONST1_MASK 0x1 /* const1 */
528 #define ISCSI_NOP_IN_HDR_RSRV_MASK 0x7F /* reserved */
529 #define ISCSI_NOP_IN_HDR_RSRV_SHIFT 0
530 #define ISCSI_NOP_IN_HDR_CONST1_MASK 0x1 /* const1 */
534 #define ISCSI_NOP_IN_HDR_DATA_SEG_LEN_MASK 0xFFFFFF /* DataSegmentLength */
535 #define ISCSI_NOP_IN_HDR_DATA_SEG_LEN_SHIFT 0
536 #define ISCSI_NOP_IN_HDR_TOTAL_AHS_LEN_MASK 0xFF /* TotalAHSLength */
557 #define ISCSI_LOGIN_RESPONSE_HDR_NSG_MASK 0x3 /* Next Stage (NSG) */
558 #define ISCSI_LOGIN_RESPONSE_HDR_NSG_SHIFT 0
559 #define ISCSI_LOGIN_RESPONSE_HDR_CSG_MASK 0x3 /* Current stage (CSG) */
561 #define ISCSI_LOGIN_RESPONSE_HDR_RSRV_MASK 0x3 /* reserved */
563 #define ISCSI_LOGIN_RESPONSE_HDR_C_MASK 0x1 /* C (Continue) bit */
565 #define ISCSI_LOGIN_RESPONSE_HDR_T_MASK 0x1 /* T (Transit) bit */
569 #define ISCSI_LOGIN_RESPONSE_HDR_DATA_SEG_LEN_MASK 0xFFFFFF /* DataSegmentLength */
570 #define ISCSI_LOGIN_RESPONSE_HDR_DATA_SEG_LEN_SHIFT 0
571 #define ISCSI_LOGIN_RESPONSE_HDR_TOTAL_AHS_LEN_MASK 0xFF /* TotalAHSLength */
597 #define ISCSI_LOGOUT_RESPONSE_HDR_DATA_SEG_LEN_MASK 0xFFFFFF /* DataSegmentLength */
598 #define ISCSI_LOGOUT_RESPONSE_HDR_DATA_SEG_LEN_SHIFT 0
599 #define ISCSI_LOGOUT_RESPONSE_HDR_TOTAL_AHS_LEN_MASK 0xFF /* TotalAHSLength */
620 #define ISCSI_TEXT_REQUEST_HDR_RSRV_MASK 0x3F /* reserved */
621 #define ISCSI_TEXT_REQUEST_HDR_RSRV_SHIFT 0
622 #define ISCSI_TEXT_REQUEST_HDR_C_MASK 0x1 /* C (Continue) bit */
624 #define ISCSI_TEXT_REQUEST_HDR_F_MASK 0x1 /* F (Final) bit */
628 #define ISCSI_TEXT_REQUEST_HDR_DATA_SEG_LEN_MASK 0xFFFFFF /* DataSegmentLength */
629 #define ISCSI_TEXT_REQUEST_HDR_DATA_SEG_LEN_SHIFT 0
630 #define ISCSI_TEXT_REQUEST_HDR_TOTAL_AHS_LEN_MASK 0xFF /* TotalAHSLength */
634 __le32 ttt /* Referenced Task Tag or 0xffffffff */;
647 #define ISCSI_TEXT_RESPONSE_HDR_RSRV_MASK 0x3F /* reserved */
648 #define ISCSI_TEXT_RESPONSE_HDR_RSRV_SHIFT 0
649 #define ISCSI_TEXT_RESPONSE_HDR_C_MASK 0x1 /* C (Continue) bit */
651 #define ISCSI_TEXT_RESPONSE_HDR_F_MASK 0x1 /* F (Final) bit */
655 #define ISCSI_TEXT_RESPONSE_HDR_DATA_SEG_LEN_MASK 0xFFFFFF /* DataSegmentLength */
656 #define ISCSI_TEXT_RESPONSE_HDR_DATA_SEG_LEN_SHIFT 0
657 #define ISCSI_TEXT_RESPONSE_HDR_TOTAL_AHS_LEN_MASK 0xFF /* TotalAHSLength */
677 #define ISCSI_TMF_REQUEST_HDR_DATA_SEG_LEN_MASK 0xFFFFFF /* DataSegmentLength */
678 #define ISCSI_TMF_REQUEST_HDR_DATA_SEG_LEN_SHIFT 0
679 #define ISCSI_TMF_REQUEST_HDR_TOTAL_AHS_LEN_MASK 0xFF /* TotalAHSLength */
683 __le32 rtt /* Referenced Task Tag or 0xffffffff */;
698 #define ISCSI_TMF_RESPONSE_HDR_DATA_SEG_LEN_MASK 0xFFFFFF /* DataSegmentLength */
699 #define ISCSI_TMF_RESPONSE_HDR_DATA_SEG_LEN_SHIFT 0
700 #define ISCSI_TMF_RESPONSE_HDR_TOTAL_AHS_LEN_MASK 0xFF /* TotalAHSLength */
721 #define ISCSI_RESPONSE_HDR_DATA_SEG_LEN_MASK 0xFFFFFF /* DataSegmentLength */
722 #define ISCSI_RESPONSE_HDR_DATA_SEG_LEN_SHIFT 0
723 #define ISCSI_RESPONSE_HDR_TOTAL_AHS_LEN_MASK 0xFF /* TotalAHSLength */
727 __le32 snack_tag /* Currently ERL>0 is not supported */;
746 #define ISCSI_REJECT_HDR_DATA_SEG_LEN_MASK 0xFFFFFF /* DataSegmentLength */
747 #define ISCSI_REJECT_HDR_DATA_SEG_LEN_SHIFT 0
748 #define ISCSI_REJECT_HDR_TOTAL_AHS_LEN_MASK 0xFF /* TotalAHSLength */
767 #define ISCSI_ASYNC_MSG_HDR_RSRV_MASK 0x7F /* reserved */
768 #define ISCSI_ASYNC_MSG_HDR_RSRV_SHIFT 0
769 #define ISCSI_ASYNC_MSG_HDR_CONST1_MASK 0x1 /* const1 */
773 #define ISCSI_ASYNC_MSG_HDR_DATA_SEG_LEN_MASK 0xFFFFFF /* DataSegmentLength */
774 #define ISCSI_ASYNC_MSG_HDR_DATA_SEG_LEN_SHIFT 0
775 #define ISCSI_ASYNC_MSG_HDR_TOTAL_AHS_LEN_MASK 0xFF /* TotalAHSLength */
778 __le32 all_ones /* should be 0xffffffff */;
834 #define E4_YSTORM_ISCSI_TASK_AG_CTX_NIBBLE0_MASK 0xF /* connection_type */
835 #define E4_YSTORM_ISCSI_TASK_AG_CTX_NIBBLE0_SHIFT 0
836 #define E4_YSTORM_ISCSI_TASK_AG_CTX_BIT0_MASK 0x1 /* exist_in_qm0 */
838 #define E4_YSTORM_ISCSI_TASK_AG_CTX_BIT1_MASK 0x1 /* exist_in_qm1 */
840 #define E4_YSTORM_ISCSI_TASK_AG_CTX_VALID_MASK 0x1 /* bit2 */
842 #define E4_YSTORM_ISCSI_TASK_AG_CTX_TTT_VALID_MASK 0x1 /* bit3 */
845 #define E4_YSTORM_ISCSI_TASK_AG_CTX_CF0_MASK 0x3 /* cf0 */
846 #define E4_YSTORM_ISCSI_TASK_AG_CTX_CF0_SHIFT 0
847 #define E4_YSTORM_ISCSI_TASK_AG_CTX_CF1_MASK 0x3 /* cf1 */
849 #define E4_YSTORM_ISCSI_TASK_AG_CTX_CF2SPECIAL_MASK 0x3 /* cf2special */
851 #define E4_YSTORM_ISCSI_TASK_AG_CTX_CF0EN_MASK 0x1 /* cf0en */
853 #define E4_YSTORM_ISCSI_TASK_AG_CTX_CF1EN_MASK 0x1 /* cf1en */
856 #define E4_YSTORM_ISCSI_TASK_AG_CTX_BIT4_MASK 0x1 /* bit4 */
857 #define E4_YSTORM_ISCSI_TASK_AG_CTX_BIT4_SHIFT 0
858 #define E4_YSTORM_ISCSI_TASK_AG_CTX_RULE0EN_MASK 0x1 /* rule0en */
860 #define E4_YSTORM_ISCSI_TASK_AG_CTX_RULE1EN_MASK 0x1 /* rule1en */
862 #define E4_YSTORM_ISCSI_TASK_AG_CTX_RULE2EN_MASK 0x1 /* rule2en */
864 #define E4_YSTORM_ISCSI_TASK_AG_CTX_RULE3EN_MASK 0x1 /* rule3en */
866 #define E4_YSTORM_ISCSI_TASK_AG_CTX_RULE4EN_MASK 0x1 /* rule4en */
868 #define E4_YSTORM_ISCSI_TASK_AG_CTX_RULE5EN_MASK 0x1 /* rule5en */
870 #define E4_YSTORM_ISCSI_TASK_AG_CTX_RULE6EN_MASK 0x1 /* rule6en */
885 #define E4_MSTORM_ISCSI_TASK_AG_CTX_CONNECTION_TYPE_MASK 0xF /* connection_type */
886 #define E4_MSTORM_ISCSI_TASK_AG_CTX_CONNECTION_TYPE_SHIFT 0
887 #define E4_MSTORM_ISCSI_TASK_AG_CTX_EXIST_IN_QM0_MASK 0x1 /* exist_in_qm0 */
889 #define E4_MSTORM_ISCSI_TASK_AG_CTX_BIT1_MASK 0x1 /* exist_in_qm1 */
891 #define E4_MSTORM_ISCSI_TASK_AG_CTX_VALID_MASK 0x1 /* bit2 */
893 #define E4_MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_FLAG_MASK 0x1 /* bit3 */
896 #define E4_MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_CF_MASK 0x3 /* cf0 */
897 #define E4_MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_CF_SHIFT 0
898 #define E4_MSTORM_ISCSI_TASK_AG_CTX_CF1_MASK 0x3 /* cf1 */
900 #define E4_MSTORM_ISCSI_TASK_AG_CTX_CF2_MASK 0x3 /* cf2 */
902 #define E4_MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_CF_EN_MASK 0x1 /* cf0en */
904 #define E4_MSTORM_ISCSI_TASK_AG_CTX_CF1EN_MASK 0x1 /* cf1en */
907 #define E4_MSTORM_ISCSI_TASK_AG_CTX_CF2EN_MASK 0x1 /* cf2en */
908 #define E4_MSTORM_ISCSI_TASK_AG_CTX_CF2EN_SHIFT 0
909 #define E4_MSTORM_ISCSI_TASK_AG_CTX_RULE0EN_MASK 0x1 /* rule0en */
911 #define E4_MSTORM_ISCSI_TASK_AG_CTX_RULE1EN_MASK 0x1 /* rule1en */
913 #define E4_MSTORM_ISCSI_TASK_AG_CTX_RULE2EN_MASK 0x1 /* rule2en */
915 #define E4_MSTORM_ISCSI_TASK_AG_CTX_RULE3EN_MASK 0x1 /* rule3en */
917 #define E4_MSTORM_ISCSI_TASK_AG_CTX_RULE4EN_MASK 0x1 /* rule4en */
919 #define E4_MSTORM_ISCSI_TASK_AG_CTX_RULE5EN_MASK 0x1 /* rule5en */
921 #define E4_MSTORM_ISCSI_TASK_AG_CTX_RULE6EN_MASK 0x1 /* rule6en */
936 #define E4_USTORM_ISCSI_TASK_AG_CTX_CONNECTION_TYPE_MASK 0xF /* connection_type */
937 #define E4_USTORM_ISCSI_TASK_AG_CTX_CONNECTION_TYPE_SHIFT 0
938 #define E4_USTORM_ISCSI_TASK_AG_CTX_EXIST_IN_QM0_MASK 0x1 /* exist_in_qm0 */
940 #define E4_USTORM_ISCSI_TASK_AG_CTX_BIT1_MASK 0x1 /* exist_in_qm1 */
942 #define E4_USTORM_ISCSI_TASK_AG_CTX_HQ_SCANNED_CF_MASK 0x3 /* timer0cf */
945 #define E4_USTORM_ISCSI_TASK_AG_CTX_RESERVED1_MASK 0x3 /* timer1cf */
946 #define E4_USTORM_ISCSI_TASK_AG_CTX_RESERVED1_SHIFT 0
947 #define E4_USTORM_ISCSI_TASK_AG_CTX_R2T2RECV_MASK 0x3 /* timer2cf */
949 #define E4_USTORM_ISCSI_TASK_AG_CTX_CF3_MASK 0x3 /* timer_stop_all */
951 #define E4_USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_CF_MASK 0x3 /* cf4 */
954 #define E4_USTORM_ISCSI_TASK_AG_CTX_HQ_SCANNED_CF_EN_MASK 0x1 /* cf0en */
955 #define E4_USTORM_ISCSI_TASK_AG_CTX_HQ_SCANNED_CF_EN_SHIFT 0
956 #define E4_USTORM_ISCSI_TASK_AG_CTX_DISABLE_DATA_ACKED_MASK 0x1 /* cf1en */
958 #define E4_USTORM_ISCSI_TASK_AG_CTX_R2T2RECV_EN_MASK 0x1 /* cf2en */
960 #define E4_USTORM_ISCSI_TASK_AG_CTX_CF3EN_MASK 0x1 /* cf3en */
962 #define E4_USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_CF_EN_MASK 0x1 /* cf4en */
964 #define E4_USTORM_ISCSI_TASK_AG_CTX_CMP_DATA_TOTAL_EXP_EN_MASK 0x1 /* rule0en */
966 #define E4_USTORM_ISCSI_TASK_AG_CTX_RULE1EN_MASK 0x1 /* rule1en */
968 #define E4_USTORM_ISCSI_TASK_AG_CTX_CMP_CONT_RCV_EXP_EN_MASK 0x1 /* rule2en */
971 #define E4_USTORM_ISCSI_TASK_AG_CTX_RULE3EN_MASK 0x1 /* rule3en */
972 #define E4_USTORM_ISCSI_TASK_AG_CTX_RULE3EN_SHIFT 0
973 #define E4_USTORM_ISCSI_TASK_AG_CTX_RULE4EN_MASK 0x1 /* rule4en */
975 #define E4_USTORM_ISCSI_TASK_AG_CTX_RULE5EN_MASK 0x1 /* rule5en */
977 #define E4_USTORM_ISCSI_TASK_AG_CTX_RULE6EN_MASK 0x1 /* rule6en */
979 #define E4_USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_TYPE_MASK 0xF /* nibble1 */
1016 #define ISCSI_REG1_NUM_SGES_MASK 0xF /* Written to R2tQE */
1017 #define ISCSI_REG1_NUM_SGES_SHIFT 0
1018 #define ISCSI_REG1_RESERVED1_MASK 0xFFFFFFF /* reserved */
1038 #define USTORM_ISCSI_TASK_ST_CTX_AHS_EXIST_MASK 0x1 /* Initiator Mode - Mark AHS exist…
1039 #define USTORM_ISCSI_TASK_ST_CTX_AHS_EXIST_SHIFT 0
1040 #define USTORM_ISCSI_TASK_ST_CTX_RESERVED1_MASK 0x7F
1050 #define USTORM_ISCSI_TASK_ST_CTX_DATA_DIGEST_ERROR_MASK 0x1 /* Mark task with data digest erro…
1051 #define USTORM_ISCSI_TASK_ST_CTX_DATA_DIGEST_ERROR_SHIFT 0
1052 #define USTORM_ISCSI_TASK_ST_CTX_DATA_TRUNCATED_ERROR_MASK 0x1 /* Target Mode - Mark middle task …
1054 #define USTORM_ISCSI_TASK_ST_CTX_UNDER_RUN_ERROR_MASK 0x1
1056 #define USTORM_ISCSI_TASK_ST_CTX_RESERVED8_MASK 0x1F
1059 #define USTORM_ISCSI_TASK_ST_CTX_CQE_WRITE_MASK 0x3 /* mark task cqe write (for cleanu…
1060 #define USTORM_ISCSI_TASK_ST_CTX_CQE_WRITE_SHIFT 0
1061 #define USTORM_ISCSI_TASK_ST_CTX_LOCAL_COMP_MASK 0x1 /* local completion bit */
1063 #define USTORM_ISCSI_TASK_ST_CTX_Q0_R2TQE_WRITE_MASK 0x1 /* write R2TQE from Q0 flow */
1065 #define USTORM_ISCSI_TASK_ST_CTX_TOTAL_DATA_ACKED_DONE_MASK 0x1 /* Mark total data acked or disabl…
1067 #define USTORM_ISCSI_TASK_ST_CTX_HQ_SCANNED_DONE_MASK 0x1 /* Mark HQ scanned or disabled */
1069 #define USTORM_ISCSI_TASK_ST_CTX_R2T2RECV_DONE_MASK 0x1 /* Mark HQ scanned or disabled */
1071 #define USTORM_ISCSI_TASK_ST_CTX_RESERVED0_MASK 0x1
1099 #define E5_YSTORM_ISCSI_TASK_AG_CTX_NIBBLE0_MASK 0xF /* connection_type */
1100 #define E5_YSTORM_ISCSI_TASK_AG_CTX_NIBBLE0_SHIFT 0
1101 #define E5_YSTORM_ISCSI_TASK_AG_CTX_BIT0_MASK 0x1 /* exist_in_qm0 */
1103 #define E5_YSTORM_ISCSI_TASK_AG_CTX_BIT1_MASK 0x1 /* exist_in_qm1 */
1105 #define E5_YSTORM_ISCSI_TASK_AG_CTX_VALID_MASK 0x1 /* bit2 */
1107 #define E5_YSTORM_ISCSI_TASK_AG_CTX_BIT3_MASK 0x1 /* bit3 */
1110 #define E5_YSTORM_ISCSI_TASK_AG_CTX_CF0_MASK 0x3 /* cf0 */
1111 #define E5_YSTORM_ISCSI_TASK_AG_CTX_CF0_SHIFT 0
1112 #define E5_YSTORM_ISCSI_TASK_AG_CTX_CF1_MASK 0x3 /* cf1 */
1114 #define E5_YSTORM_ISCSI_TASK_AG_CTX_CF2SPECIAL_MASK 0x3 /* cf2special */
1116 #define E5_YSTORM_ISCSI_TASK_AG_CTX_CF0EN_MASK 0x1 /* cf0en */
1118 #define E5_YSTORM_ISCSI_TASK_AG_CTX_CF1EN_MASK 0x1 /* cf1en */
1121 #define E5_YSTORM_ISCSI_TASK_AG_CTX_BIT4_MASK 0x1 /* bit4 */
1122 #define E5_YSTORM_ISCSI_TASK_AG_CTX_BIT4_SHIFT 0
1123 #define E5_YSTORM_ISCSI_TASK_AG_CTX_RULE0EN_MASK 0x1 /* rule0en */
1125 #define E5_YSTORM_ISCSI_TASK_AG_CTX_RULE1EN_MASK 0x1 /* rule1en */
1127 #define E5_YSTORM_ISCSI_TASK_AG_CTX_RULE2EN_MASK 0x1 /* rule2en */
1129 #define E5_YSTORM_ISCSI_TASK_AG_CTX_RULE3EN_MASK 0x1 /* rule3en */
1131 #define E5_YSTORM_ISCSI_TASK_AG_CTX_RULE4EN_MASK 0x1 /* rule4en */
1133 #define E5_YSTORM_ISCSI_TASK_AG_CTX_RULE5EN_MASK 0x1 /* rule5en */
1135 #define E5_YSTORM_ISCSI_TASK_AG_CTX_RULE6EN_MASK 0x1 /* rule6en */
1138 #define E5_YSTORM_ISCSI_TASK_AG_CTX_E4_RESERVED1_MASK 0x1 /* bit5 */
1139 #define E5_YSTORM_ISCSI_TASK_AG_CTX_E4_RESERVED1_SHIFT 0
1140 #define E5_YSTORM_ISCSI_TASK_AG_CTX_E4_RESERVED2_MASK 0x3 /* cf3 */
1142 #define E5_YSTORM_ISCSI_TASK_AG_CTX_E4_RESERVED3_MASK 0x3 /* cf4 */
1144 #define E5_YSTORM_ISCSI_TASK_AG_CTX_E4_RESERVED4_MASK 0x1 /* cf3en */
1146 #define E5_YSTORM_ISCSI_TASK_AG_CTX_E4_RESERVED5_MASK 0x1 /* cf4en */
1148 #define E5_YSTORM_ISCSI_TASK_AG_CTX_E4_RESERVED6_MASK 0x1 /* rule7en */
1163 #define E5_MSTORM_ISCSI_TASK_AG_CTX_CONNECTION_TYPE_MASK 0xF /* connection_type */
1164 #define E5_MSTORM_ISCSI_TASK_AG_CTX_CONNECTION_TYPE_SHIFT 0
1165 #define E5_MSTORM_ISCSI_TASK_AG_CTX_EXIST_IN_QM0_MASK 0x1 /* exist_in_qm0 */
1167 #define E5_MSTORM_ISCSI_TASK_AG_CTX_BIT1_MASK 0x1 /* exist_in_qm1 */
1169 #define E5_MSTORM_ISCSI_TASK_AG_CTX_VALID_MASK 0x1 /* bit2 */
1171 #define E5_MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_FLAG_MASK 0x1 /* bit3 */
1174 #define E5_MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_CF_MASK 0x3 /* cf0 */
1175 #define E5_MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_CF_SHIFT 0
1176 #define E5_MSTORM_ISCSI_TASK_AG_CTX_CF1_MASK 0x3 /* cf1 */
1178 #define E5_MSTORM_ISCSI_TASK_AG_CTX_CF2_MASK 0x3 /* cf2 */
1180 #define E5_MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_CF_EN_MASK 0x1 /* cf0en */
1182 #define E5_MSTORM_ISCSI_TASK_AG_CTX_CF1EN_MASK 0x1 /* cf1en */
1185 #define E5_MSTORM_ISCSI_TASK_AG_CTX_CF2EN_MASK 0x1 /* cf2en */
1186 #define E5_MSTORM_ISCSI_TASK_AG_CTX_CF2EN_SHIFT 0
1187 #define E5_MSTORM_ISCSI_TASK_AG_CTX_RULE0EN_MASK 0x1 /* rule0en */
1189 #define E5_MSTORM_ISCSI_TASK_AG_CTX_RULE1EN_MASK 0x1 /* rule1en */
1191 #define E5_MSTORM_ISCSI_TASK_AG_CTX_RULE2EN_MASK 0x1 /* rule2en */
1193 #define E5_MSTORM_ISCSI_TASK_AG_CTX_RULE3EN_MASK 0x1 /* rule3en */
1195 #define E5_MSTORM_ISCSI_TASK_AG_CTX_RULE4EN_MASK 0x1 /* rule4en */
1197 #define E5_MSTORM_ISCSI_TASK_AG_CTX_RULE5EN_MASK 0x1 /* rule5en */
1199 #define E5_MSTORM_ISCSI_TASK_AG_CTX_RULE6EN_MASK 0x1 /* rule6en */
1202 #define E5_MSTORM_ISCSI_TASK_AG_CTX_E4_RESERVED1_MASK 0x1 /* bit4 */
1203 #define E5_MSTORM_ISCSI_TASK_AG_CTX_E4_RESERVED1_SHIFT 0
1204 #define E5_MSTORM_ISCSI_TASK_AG_CTX_E4_RESERVED2_MASK 0x3 /* cf3 */
1206 #define E5_MSTORM_ISCSI_TASK_AG_CTX_E4_RESERVED3_MASK 0x3 /* cf4 */
1208 #define E5_MSTORM_ISCSI_TASK_AG_CTX_E4_RESERVED4_MASK 0x1 /* cf3en */
1210 #define E5_MSTORM_ISCSI_TASK_AG_CTX_E4_RESERVED5_MASK 0x1 /* cf4en */
1212 #define E5_MSTORM_ISCSI_TASK_AG_CTX_E4_RESERVED6_MASK 0x1 /* rule7en */
1227 #define E5_USTORM_ISCSI_TASK_AG_CTX_CONNECTION_TYPE_MASK 0xF /* connection_type */
1228 #define E5_USTORM_ISCSI_TASK_AG_CTX_CONNECTION_TYPE_SHIFT 0
1229 #define E5_USTORM_ISCSI_TASK_AG_CTX_EXIST_IN_QM0_MASK 0x1 /* exist_in_qm0 */
1231 #define E5_USTORM_ISCSI_TASK_AG_CTX_BIT1_MASK 0x1 /* exist_in_qm1 */
1233 #define E5_USTORM_ISCSI_TASK_AG_CTX_HQ_SCANNED_CF_MASK 0x3 /* timer0cf */
1236 #define E5_USTORM_ISCSI_TASK_AG_CTX_RESERVED1_MASK 0x3 /* timer1cf */
1237 #define E5_USTORM_ISCSI_TASK_AG_CTX_RESERVED1_SHIFT 0
1238 #define E5_USTORM_ISCSI_TASK_AG_CTX_R2T2RECV_MASK 0x3 /* timer2cf */
1240 #define E5_USTORM_ISCSI_TASK_AG_CTX_CF3_MASK 0x3 /* timer_stop_all */
1242 #define E5_USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_CF_MASK 0x3 /* dif_error_cf */
1245 #define E5_USTORM_ISCSI_TASK_AG_CTX_HQ_SCANNED_CF_EN_MASK 0x1 /* cf0en */
1246 #define E5_USTORM_ISCSI_TASK_AG_CTX_HQ_SCANNED_CF_EN_SHIFT 0
1247 #define E5_USTORM_ISCSI_TASK_AG_CTX_DISABLE_DATA_ACKED_MASK 0x1 /* cf1en */
1249 #define E5_USTORM_ISCSI_TASK_AG_CTX_R2T2RECV_EN_MASK 0x1 /* cf2en */
1251 #define E5_USTORM_ISCSI_TASK_AG_CTX_CF3EN_MASK 0x1 /* cf3en */
1253 #define E5_USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_CF_EN_MASK 0x1 /* cf4en */
1255 #define E5_USTORM_ISCSI_TASK_AG_CTX_CMP_DATA_TOTAL_EXP_EN_MASK 0x1 /* rule0en */
1257 #define E5_USTORM_ISCSI_TASK_AG_CTX_RULE1EN_MASK 0x1 /* rule1en */
1259 #define E5_USTORM_ISCSI_TASK_AG_CTX_CMP_CONT_RCV_EXP_EN_MASK 0x1 /* rule2en */
1262 #define E5_USTORM_ISCSI_TASK_AG_CTX_RULE3EN_MASK 0x1 /* rule3en */
1263 #define E5_USTORM_ISCSI_TASK_AG_CTX_RULE3EN_SHIFT 0
1264 #define E5_USTORM_ISCSI_TASK_AG_CTX_RULE4EN_MASK 0x1 /* rule4en */
1266 #define E5_USTORM_ISCSI_TASK_AG_CTX_RULE5EN_MASK 0x1 /* rule5en */
1268 #define E5_USTORM_ISCSI_TASK_AG_CTX_RULE6EN_MASK 0x1 /* rule6en */
1270 #define E5_USTORM_ISCSI_TASK_AG_CTX_E4_RESERVED1_MASK 0x1 /* bit2 */
1272 #define E5_USTORM_ISCSI_TASK_AG_CTX_E4_RESERVED2_MASK 0x1 /* bit3 */
1274 #define E5_USTORM_ISCSI_TASK_AG_CTX_E4_RESERVED3_MASK 0x1 /* bit4 */
1276 #define E5_USTORM_ISCSI_TASK_AG_CTX_E4_RESERVED4_MASK 0x1 /* rule7en */
1279 #define E5_USTORM_ISCSI_TASK_AG_CTX_E4_RESERVED5_MASK 0x3 /* cf5 */
1280 #define E5_USTORM_ISCSI_TASK_AG_CTX_E4_RESERVED5_SHIFT 0
1281 #define E5_USTORM_ISCSI_TASK_AG_CTX_E4_RESERVED6_MASK 0x1 /* cf5en */
1283 #define E5_USTORM_ISCSI_TASK_AG_CTX_E4_RESERVED7_MASK 0x1 /* rule8en */
1285 #define E5_USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_TYPE_MASK 0xF /* dif_error_type */
1332 #define ISCSI_CONN_OFFLOAD_PARAMS_TCP_ON_CHIP_1B_MASK 0x1 /* TCP connect/terminate option. 0 - TC…
1333 #define ISCSI_CONN_OFFLOAD_PARAMS_TCP_ON_CHIP_1B_SHIFT 0
1334 #define ISCSI_CONN_OFFLOAD_PARAMS_TARGET_MODE_MASK 0x1 /* iSCSI connect mode: 0-iSCSI Initiato…
1336 #define ISCSI_CONN_OFFLOAD_PARAMS_RESTRICTED_MODE_MASK 0x1 /* Restricted mode: 0 - un-restricted (…
1338 #define ISCSI_CONN_OFFLOAD_PARAMS_RESERVED1_MASK 0x1F /* reserved */
1368 #define ISCSI_SLOW_PATH_HDR_RESERVED0_MASK 0xF
1369 #define ISCSI_SLOW_PATH_HDR_RESERVED0_SHIFT 0
1370 #define ISCSI_SLOW_PATH_HDR_LAYER_CODE_MASK 0x7 /* protocol layer (L2,L3,L4,L5) */
1372 #define ISCSI_SLOW_PATH_HDR_RESERVED1_MASK 0x1
1385 #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_HD_EN_MASK 0x1 /* Is header digest enabled */
1386 #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_HD_EN_SHIFT 0
1387 #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_DD_EN_MASK 0x1 /* Is data digest enabled */
1389 #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_INITIAL_R2T_MASK 0x1 /* Initial R2T */
1391 #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_IMMEDIATE_DATA_MASK 0x1 /* Immediate data */
1393 #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_DIF_BLOCK_SIZE_MASK 0x1 /* 0 - 512B, 1 - 4K */
1395 #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_DIF_ON_HOST_EN_MASK 0x1 /* 0 - no DIF, 1 - could be enable…
1397 …ne ISCSI_CONN_UPDATE_RAMROD_PARAMS_DIF_ON_IMM_EN_MASK 0x1 /* Support DIF on immediate, 1-Yes, 0-…
1399 #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_LUN_MAPPER_EN_MASK 0x1 /* valid only if dif_on_imm_en=1 D…
1433 u8 caused_conn_err /* Equals 1 if this TID caused the connection error, otherwise equals 0. */;
1497 #define ISCSI_DEBUG_MODES_ASSERT_IF_RX_CONN_ERROR_MASK 0x1 /* Assert on Rx connection e…
1498 #define ISCSI_DEBUG_MODES_ASSERT_IF_RX_CONN_ERROR_SHIFT 0
1499 #define ISCSI_DEBUG_MODES_ASSERT_IF_RECV_RESET_MASK 0x1 /* Assert if TCP RESET arriv…
1501 #define ISCSI_DEBUG_MODES_ASSERT_IF_RECV_FIN_MASK 0x1 /* Assert if TCP FIN arrived…
1503 #define ISCSI_DEBUG_MODES_ASSERT_IF_RECV_CLEANUP_MASK 0x1 /* Assert if cleanup flow */
1505 #define ISCSI_DEBUG_MODES_ASSERT_IF_RECV_REJECT_OR_ASYNC_MASK 0x1 /* Assert if REJECT PDU or A…
1507 #define ISCSI_DEBUG_MODES_ASSERT_IF_RECV_NOP_MASK 0x1 /* Assert if NOP IN PDU or N…
1509 #define ISCSI_DEBUG_MODES_ASSERT_IF_DIF_OR_DATA_DIGEST_ERROR_MASK 0x1 /* Assert if DIF or data dig…
1511 #define ISCSI_DEBUG_MODES_ASSERT_IF_HQ_CORRUPT_MASK 0x1 /* Assert if HQ corruption d…
1520 ISCSI_EVENT_TYPE_INIT_FUNC=0 /* iSCSI response after init Ramrod */,
1548 ISCSI_STATUS_NONE=0,
1570 …ISCSI_CONN_ERROR_UNVALID_NOPIN_DSL /* iSCSI connection error - NOPIN dsl > 0 and ITT = 0xffffffff …
1571 …ISCSI_CONN_ERROR_PROTOCOL_ERR_R2T_CARRIES_NO_DATA /* iSCSI connection error - R2T dsl > 0 (Initiat…
1579 …A_TRNS_LEN_0 /* iSCSI connection error - R2T desired data transfer length = 0 (Initiator only) */,
1586 …ISCSI_CONN_ERROR_PROTOCOL_ERR_DSL_NOT_ZERO /* iSCSI connection error - TMF or LOGOUT PDUs dsl > 0 …
1587 …ISCSI_CONN_ERROR_PROTOCOL_ERR_INVALID_DSL /* iSCSI connection error - CMD PDU dsl>0 while immediat…
1603 ISCSI_RAMROD_CMD_ID_UNUSED=0,
1702 #define ISCSI_SPE_FUNC_INIT_COUNTERS_EN_MASK 0x1 /* Enable counters - function and connection coun…
1703 #define ISCSI_SPE_FUNC_INIT_COUNTERS_EN_SHIFT 0
1704 #define ISCSI_SPE_FUNC_INIT_RESERVED0_MASK 0x7F /* reserved */
1747 #define ISCSI_UHQE_PDU_PAYLOAD_LEN_MASK 0xFFFFF /* iSCSI payload (doesnt include padding or dig…
1748 #define ISCSI_UHQE_PDU_PAYLOAD_LEN_SHIFT 0
1749 #define ISCSI_UHQE_LOCAL_COMP_MASK 0x1 /* local compleiton flag */
1751 #define ISCSI_UHQE_TOGGLE_BIT_MASK 0x1 /* toggle bit to protect from uHQ full */
1753 #define ISCSI_UHQE_PURE_PAYLOAD_MASK 0x1 /* indicates whether pdu_payload_len contains pure …
1755 #define ISCSI_UHQE_LOGIN_RESPONSE_PDU_MASK 0x1 /* indicates login pdu */
1757 #define ISCSI_UHQE_TASK_ID_HI_MASK 0xFF /* most significant byte of task_id */
1760 #define ISCSI_UHQE_BUFFER_OFFSET_MASK 0xFFFFFF /* absolute offset in task */
1761 #define ISCSI_UHQE_BUFFER_OFFSET_SHIFT 0
1762 #define ISCSI_UHQE_TASK_ID_LO_MASK 0xFF /* least significant byte of task_id */
1773 #define ISCSI_WQE_WQE_TYPE_MASK 0x7 /* Wqe type [use iscsi_wqe_type] */
1774 #define ISCSI_WQE_WQE_TYPE_SHIFT 0
1775 #define ISCSI_WQE_NUM_SGES_MASK 0xF /* The driver will give a hint about sizes of SGEs for better …
1777 #define ISCSI_WQE_RESPONSE_MASK 0x1 /* 1 if this Wqe triggers a response and advances stat_sn, 0 o…
1781 #define ISCSI_WQE_CONT_LEN_MASK 0xFFFFFF /* expected/desired data transfer length */
1782 #define ISCSI_WQE_CONT_LEN_SHIFT 0
1783 #define ISCSI_WQE_CDB_SIZE_MASK 0xFF /* Initiator mode only: equals SCSI command CDB size if exten…
1813 #define ISCSI_XHQE_FINAL_MASK 0x1 /* The Final(F) for this PDU */
1814 #define ISCSI_XHQE_FINAL_SHIFT 0
1815 #define ISCSI_XHQE_STATUS_BIT_MASK 0x1 /* Whether this PDU is Data-In PDU with status_bit = 1 */
1817 #define ISCSI_XHQE_NUM_SGES_MASK 0xF /* If Predicted IO equals Min(8, number of SGEs in SGL), ot…
1819 #define ISCSI_XHQE_RESERVED0_MASK 0x3 /* reserved */
1898 #define E4_TSTORM_ISCSI_TASK_AG_CTX_NIBBLE0_MASK 0xF /* connection_type */
1899 #define E4_TSTORM_ISCSI_TASK_AG_CTX_NIBBLE0_SHIFT 0
1900 #define E4_TSTORM_ISCSI_TASK_AG_CTX_BIT0_MASK 0x1 /* exist_in_qm0 */
1902 #define E4_TSTORM_ISCSI_TASK_AG_CTX_BIT1_MASK 0x1 /* exist_in_qm1 */
1904 #define E4_TSTORM_ISCSI_TASK_AG_CTX_BIT2_MASK 0x1 /* bit2 */
1906 #define E4_TSTORM_ISCSI_TASK_AG_CTX_BIT3_MASK 0x1 /* bit3 */
1909 #define E4_TSTORM_ISCSI_TASK_AG_CTX_BIT4_MASK 0x1 /* bit4 */
1910 #define E4_TSTORM_ISCSI_TASK_AG_CTX_BIT4_SHIFT 0
1911 #define E4_TSTORM_ISCSI_TASK_AG_CTX_BIT5_MASK 0x1 /* bit5 */
1913 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF0_MASK 0x3 /* timer0cf */
1915 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF1_MASK 0x3 /* timer1cf */
1917 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF2_MASK 0x3 /* timer2cf */
1920 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF3_MASK 0x3 /* timer_stop_all */
1921 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF3_SHIFT 0
1922 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF4_MASK 0x3 /* cf4 */
1924 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF5_MASK 0x3 /* cf5 */
1926 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF6_MASK 0x3 /* cf6 */
1929 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF7_MASK 0x3 /* cf7 */
1930 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF7_SHIFT 0
1931 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF0EN_MASK 0x1 /* cf0en */
1933 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF1EN_MASK 0x1 /* cf1en */
1935 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF2EN_MASK 0x1 /* cf2en */
1937 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF3EN_MASK 0x1 /* cf3en */
1939 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF4EN_MASK 0x1 /* cf4en */
1941 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF5EN_MASK 0x1 /* cf5en */
1944 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF6EN_MASK 0x1 /* cf6en */
1945 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF6EN_SHIFT 0
1946 #define E4_TSTORM_ISCSI_TASK_AG_CTX_CF7EN_MASK 0x1 /* cf7en */
1948 #define E4_TSTORM_ISCSI_TASK_AG_CTX_RULE0EN_MASK 0x1 /* rule0en */
1950 #define E4_TSTORM_ISCSI_TASK_AG_CTX_RULE1EN_MASK 0x1 /* rule1en */
1952 #define E4_TSTORM_ISCSI_TASK_AG_CTX_RULE2EN_MASK 0x1 /* rule2en */
1954 #define E4_TSTORM_ISCSI_TASK_AG_CTX_RULE3EN_MASK 0x1 /* rule3en */
1956 #define E4_TSTORM_ISCSI_TASK_AG_CTX_RULE4EN_MASK 0x1 /* rule4en */
1958 #define E4_TSTORM_ISCSI_TASK_AG_CTX_RULE5EN_MASK 0x1 /* rule5en */
1978 #define E5_TSTORM_ISCSI_TASK_AG_CTX_NIBBLE0_MASK 0xF /* connection_type */
1979 #define E5_TSTORM_ISCSI_TASK_AG_CTX_NIBBLE0_SHIFT 0
1980 #define E5_TSTORM_ISCSI_TASK_AG_CTX_BIT0_MASK 0x1 /* exist_in_qm0 */
1982 #define E5_TSTORM_ISCSI_TASK_AG_CTX_BIT1_MASK 0x1 /* exist_in_qm1 */
1984 #define E5_TSTORM_ISCSI_TASK_AG_CTX_BIT2_MASK 0x1 /* bit2 */
1986 #define E5_TSTORM_ISCSI_TASK_AG_CTX_BIT3_MASK 0x1 /* bit3 */
1989 #define E5_TSTORM_ISCSI_TASK_AG_CTX_BIT4_MASK 0x1 /* bit4 */
1990 #define E5_TSTORM_ISCSI_TASK_AG_CTX_BIT4_SHIFT 0
1991 #define E5_TSTORM_ISCSI_TASK_AG_CTX_BIT5_MASK 0x1 /* bit5 */
1993 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF0_MASK 0x3 /* timer0cf */
1995 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF1_MASK 0x3 /* timer1cf */
1997 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF2_MASK 0x3 /* timer2cf */
2000 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF3_MASK 0x3 /* timer_stop_all */
2001 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF3_SHIFT 0
2002 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF4_MASK 0x3 /* cf4 */
2004 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF5_MASK 0x3 /* cf5 */
2006 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF6_MASK 0x3 /* cf6 */
2009 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF7_MASK 0x3 /* cf7 */
2010 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF7_SHIFT 0
2011 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF0EN_MASK 0x1 /* cf0en */
2013 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF1EN_MASK 0x1 /* cf1en */
2015 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF2EN_MASK 0x1 /* cf2en */
2017 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF3EN_MASK 0x1 /* cf3en */
2019 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF4EN_MASK 0x1 /* cf4en */
2021 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF5EN_MASK 0x1 /* cf5en */
2024 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF6EN_MASK 0x1 /* cf6en */
2025 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF6EN_SHIFT 0
2026 #define E5_TSTORM_ISCSI_TASK_AG_CTX_CF7EN_MASK 0x1 /* cf7en */
2028 #define E5_TSTORM_ISCSI_TASK_AG_CTX_RULE0EN_MASK 0x1 /* rule0en */
2030 #define E5_TSTORM_ISCSI_TASK_AG_CTX_RULE1EN_MASK 0x1 /* rule1en */
2032 #define E5_TSTORM_ISCSI_TASK_AG_CTX_RULE2EN_MASK 0x1 /* rule2en */
2034 #define E5_TSTORM_ISCSI_TASK_AG_CTX_RULE3EN_MASK 0x1 /* rule3en */
2036 #define E5_TSTORM_ISCSI_TASK_AG_CTX_RULE4EN_MASK 0x1 /* rule4en */
2038 #define E5_TSTORM_ISCSI_TASK_AG_CTX_RULE5EN_MASK 0x1 /* rule5en */
2058 #define ISCSI_DB_DATA_DEST_MASK 0x3 /* destination of doorbell (use enum db_dest) */
2059 #define ISCSI_DB_DATA_DEST_SHIFT 0
2060 #define ISCSI_DB_DATA_AGG_CMD_MASK 0x3 /* aggregative command to CM (use enum db_agg_cmd_sel) …
2062 #define ISCSI_DB_DATA_BYPASS_EN_MASK 0x1 /* enable QM bypass */
2064 #define ISCSI_DB_DATA_RESERVED_MASK 0x1
2066 #define ISCSI_DB_DATA_AGG_VAL_SEL_MASK 0x3 /* aggregative value selection */