Lines Matching +full:mux +full:- +full:mask
1 /*-
52 ((sc)->cmd_rcgr + (sc)->cfg_offset + QCOM_CLK_RCG2_CFG_REG)
54 ((sc)->cmd_rcgr + QCOM_CLK_RCG2_CMD_REG)
56 ((sc)->cmd_rcgr + (sc)->cfg_offset + QCOM_CLK_RCG2_M_REG)
58 ((sc)->cmd_rcgr + (sc)->cfg_offset + QCOM_CLK_RCG2_N_REG)
60 ((sc)->cmd_rcgr + (sc)->cfg_offset + QCOM_CLK_RCG2_D_REG)
88 CLKDEV_READ_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_update_config_locked()
91 CLKDEV_WRITE_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_update_config_locked()
99 CLKDEV_READ_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_update_config_locked()
108 CLKDEV_READ_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_update_config_locked()
110 DPRINTF(clknode_get_device(sc->clknode), "%s: failed; reg=0x%08x\n", in qcom_clk_rcg2_update_config_locked()
138 * The inverse of calc_rate() - calculate the required input frequency
162 uint32_t mode = 0, mask; in qcom_clk_rcg2_recalc() local
167 CLKDEV_DEVICE_LOCK(clknode_get_device(sc->clknode)); in qcom_clk_rcg2_recalc()
168 CLKDEV_READ_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_recalc()
171 if (sc->mnd_width != 0) { in qcom_clk_rcg2_recalc()
172 mask = (1U << sc->mnd_width) - 1; in qcom_clk_rcg2_recalc()
173 CLKDEV_READ_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_recalc()
175 CLKDEV_READ_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_recalc()
177 m = m & mask; in qcom_clk_rcg2_recalc()
179 n = n & mask; in qcom_clk_rcg2_recalc()
184 CLKDEV_DEVICE_UNLOCK(clknode_get_device(sc->clknode)); in qcom_clk_rcg2_recalc()
187 mask = (1U << sc->hid_width) - 1; in qcom_clk_rcg2_recalc()
188 hid_div = (cfg >> QCOM_CLK_RCG2_CFG_SRC_DIV_SHIFT) & mask; in qcom_clk_rcg2_recalc()
197 * configure the mn:d divisor, pre-divisor, and parent.
203 uint32_t mask, reg; in qcom_clk_rcg2_set_config_locked() local
206 if (sc->mnd_width != 0 && f->n != 0) { in qcom_clk_rcg2_set_config_locked()
207 mask = (1U << sc->mnd_width) - 1; in qcom_clk_rcg2_set_config_locked()
209 CLKDEV_READ_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_config_locked()
211 reg &= ~mask; in qcom_clk_rcg2_set_config_locked()
212 reg |= (f->m & mask); in qcom_clk_rcg2_set_config_locked()
213 CLKDEV_WRITE_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_config_locked()
216 CLKDEV_READ_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_config_locked()
218 reg &= ~mask; in qcom_clk_rcg2_set_config_locked()
219 reg |= ((~(f->n - f->m)) & mask); in qcom_clk_rcg2_set_config_locked()
220 CLKDEV_WRITE_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_config_locked()
223 CLKDEV_READ_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_config_locked()
225 reg &= ~mask; in qcom_clk_rcg2_set_config_locked()
226 reg |= ((~f->n) & mask); in qcom_clk_rcg2_set_config_locked()
227 CLKDEV_WRITE_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_config_locked()
231 mask = (1U << sc->hid_width) - 1; in qcom_clk_rcg2_set_config_locked()
233 * Mask out register fields we're going to modify along with in qcom_clk_rcg2_set_config_locked()
234 * the pre-divisor. in qcom_clk_rcg2_set_config_locked()
236 mask |= QCOM_CLK_RCG2_CFG_SRC_SEL_MASK in qcom_clk_rcg2_set_config_locked()
240 CLKDEV_READ_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_config_locked()
242 reg &= ~mask; in qcom_clk_rcg2_set_config_locked()
244 /* Configure pre-divisor */ in qcom_clk_rcg2_set_config_locked()
245 reg = reg | ((f->pre_div) << QCOM_CLK_RCG2_CFG_SRC_DIV_SHIFT); in qcom_clk_rcg2_set_config_locked()
251 /* Configure dual-edge if needed */ in qcom_clk_rcg2_set_config_locked()
252 if (sc->mnd_width != 0 && f->n != 0 && (f->m != f->n)) in qcom_clk_rcg2_set_config_locked()
255 CLKDEV_WRITE_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_config_locked()
270 * Read the mux setting to set the right parent. in qcom_clk_rcg2_init()
274 CLKDEV_DEVICE_LOCK(clknode_get_device(sc->clknode)); in qcom_clk_rcg2_init()
276 CLKDEV_READ_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_init()
283 /* mux settings */ in qcom_clk_rcg2_init()
284 CLKDEV_READ_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_init()
286 CLKDEV_DEVICE_UNLOCK(clknode_get_device(sc->clknode)); in qcom_clk_rcg2_init()
290 DPRINTF(clknode_get_device(sc->clknode), in qcom_clk_rcg2_init()
291 "%s: mux index %u, enabled=%d\n", in qcom_clk_rcg2_init()
329 CLKDEV_READ_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_parent_index_locked()
334 CLKDEV_WRITE_4(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_parent_index_locked()
342 * fin - the parent frequency, if exists
343 * fout - starts as the requested frequency, ends with the configured
344 * or dry-run frequency
345 * Flags - CLK_SET_DRYRUN, CLK_SET_ROUND_UP, CLK_SET_ROUND_DOWN
346 * retval - 0, ERANGE
368 f = qcom_clk_freq_tbl_lookup(sc->freq_tbl, *fout); in qcom_clk_rcg2_set_freq()
370 device_printf(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
388 if (strcmp(parent_names[i], f->parent) == 0) in qcom_clk_rcg2_set_freq()
392 device_printf(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
404 if ((sc->flags & QCOM_CLK_RCG2_FLAGS_SET_RATE_PARENT) == 0) { in qcom_clk_rcg2_set_freq()
406 *fout = f->freq; in qcom_clk_rcg2_set_freq()
410 if (sc->safe_pre_parent_idx > -1) { in qcom_clk_rcg2_set_freq()
411 DPRINTF(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
414 sc->safe_pre_parent_idx); in qcom_clk_rcg2_set_freq()
415 CLKDEV_DEVICE_LOCK(clknode_get_device(sc->clknode)); in qcom_clk_rcg2_set_freq()
417 sc->safe_pre_parent_idx); in qcom_clk_rcg2_set_freq()
418 DPRINTF(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
421 CLKDEV_DEVICE_UNLOCK(clknode_get_device(sc->clknode)); in qcom_clk_rcg2_set_freq()
422 DPRINTF(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
427 CLKDEV_DEVICE_UNLOCK(clknode_get_device(sc->clknode)); in qcom_clk_rcg2_set_freq()
428 DPRINTF(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
430 clknode_set_parent_by_idx(sc->clknode, in qcom_clk_rcg2_set_freq()
431 sc->safe_pre_parent_idx); in qcom_clk_rcg2_set_freq()
434 CLKDEV_DEVICE_LOCK(clknode_get_device(sc->clknode)); in qcom_clk_rcg2_set_freq()
437 CLKDEV_DEVICE_UNLOCK(clknode_get_device(sc->clknode)); in qcom_clk_rcg2_set_freq()
438 device_printf(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
443 CLKDEV_DEVICE_UNLOCK(clknode_get_device(sc->clknode)); in qcom_clk_rcg2_set_freq()
444 clknode_set_parent_by_idx(sc->clknode, i); in qcom_clk_rcg2_set_freq()
445 *fout = f->freq; in qcom_clk_rcg2_set_freq()
458 p_clk = clknode_find_by_name(f->parent); in qcom_clk_rcg2_set_freq()
460 device_printf(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
462 __func__, f->parent); in qcom_clk_rcg2_set_freq()
470 p_freq = qcom_clk_rcg2_calc_input_freq(f->freq, f->m, f->n, in qcom_clk_rcg2_set_freq()
471 f->pre_div); in qcom_clk_rcg2_set_freq()
472 DPRINTF(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
476 f->parent, in qcom_clk_rcg2_set_freq()
477 f->freq, in qcom_clk_rcg2_set_freq()
481 * To ensure glitch-free operation on some clocks, set it to in qcom_clk_rcg2_set_freq()
486 * If we're doing a dry-run then we don't need to re-parent the in qcom_clk_rcg2_set_freq()
490 (sc->safe_pre_parent_idx > -1)) { in qcom_clk_rcg2_set_freq()
491 DPRINTF(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
494 sc->safe_pre_parent_idx); in qcom_clk_rcg2_set_freq()
495 CLKDEV_DEVICE_LOCK(clknode_get_device(sc->clknode)); in qcom_clk_rcg2_set_freq()
497 sc->safe_pre_parent_idx); in qcom_clk_rcg2_set_freq()
498 DPRINTF(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
501 CLKDEV_DEVICE_UNLOCK(clknode_get_device(sc->clknode)); in qcom_clk_rcg2_set_freq()
502 DPRINTF(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
507 CLKDEV_DEVICE_UNLOCK(clknode_get_device(sc->clknode)); in qcom_clk_rcg2_set_freq()
508 DPRINTF(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
510 clknode_set_parent_by_idx(sc->clknode, in qcom_clk_rcg2_set_freq()
511 sc->safe_pre_parent_idx); in qcom_clk_rcg2_set_freq()
515 * Set the parent frequency before we change our mux and divisor in qcom_clk_rcg2_set_freq()
519 device_printf(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
522 f->parent); in qcom_clk_rcg2_set_freq()
545 device_printf(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
549 f->parent, in qcom_clk_rcg2_set_freq()
558 device_printf(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
566 DPRINTF(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
571 f->freq, in qcom_clk_rcg2_set_freq()
572 f->parent, in qcom_clk_rcg2_set_freq()
578 * a mux method on this node. in qcom_clk_rcg2_set_freq()
585 CLKDEV_DEVICE_LOCK(clknode_get_device(sc->clknode)); in qcom_clk_rcg2_set_freq()
588 CLKDEV_DEVICE_UNLOCK(clknode_get_device(sc->clknode)); in qcom_clk_rcg2_set_freq()
589 device_printf(clknode_get_device(sc->clknode), in qcom_clk_rcg2_set_freq()
594 CLKDEV_DEVICE_UNLOCK(clknode_get_device(sc->clknode)); in qcom_clk_rcg2_set_freq()
595 clknode_set_parent_by_idx(sc->clknode, i); in qcom_clk_rcg2_set_freq()
603 * this to return when we're done - and again, if it's a dryrun, in qcom_clk_rcg2_set_freq()
607 *fout = qcom_clk_rcg2_calc_rate(p_freq, (f->n == 0 ? 0 : 1), in qcom_clk_rcg2_set_freq()
608 f->m, f->n, f->pre_div); in qcom_clk_rcg2_set_freq()
637 if (clkdef->flags & QCOM_CLK_RCG2_FLAGS_CRITICAL) in qcom_clk_rcg2_register()
638 clkdef->clkdef.flags |= CLK_NODE_CANNOT_STOP; in qcom_clk_rcg2_register()
640 clk = clknode_create(clkdom, &qcom_clk_rcg2_class, &clkdef->clkdef); in qcom_clk_rcg2_register()
645 sc->clknode = clk; in qcom_clk_rcg2_register()
647 sc->cmd_rcgr = clkdef->cmd_rcgr; in qcom_clk_rcg2_register()
648 sc->hid_width = clkdef->hid_width; in qcom_clk_rcg2_register()
649 sc->mnd_width = clkdef->mnd_width; in qcom_clk_rcg2_register()
650 sc->safe_src_idx = clkdef->safe_src_idx; in qcom_clk_rcg2_register()
651 sc->safe_pre_parent_idx = clkdef->safe_pre_parent_idx; in qcom_clk_rcg2_register()
652 sc->cfg_offset = clkdef->cfg_offset; in qcom_clk_rcg2_register()
653 sc->flags = clkdef->flags; in qcom_clk_rcg2_register()
654 sc->freq_tbl = clkdef->freq_tbl; in qcom_clk_rcg2_register()