526 			struct qat_bank *qb = &sc->sc_etr_banks[i];  in qat_detach()  local
528 			if (qb->qb_ih_cookie != NULL)  in qat_detach()
529 				(void)bus_teardown_intr(dev, qb->qb_ih,  in qat_detach()
530 				    qb->qb_ih_cookie);  in qat_detach()
531 			if (qb->qb_ih != NULL)  in qat_detach()
533 				    i + 1, qb->qb_ih);  in qat_detach()
656 		struct qat_bank *qb = &sc->sc_etr_banks[i - 1];  in qat_setup_msix_intr()  local
659 		qb->qb_ih = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,  in qat_setup_msix_intr()
661 		if (qb->qb_ih == NULL) {  in qat_setup_msix_intr()
666 		error = bus_setup_intr(dev, qb->qb_ih,  in qat_setup_msix_intr()
667 		    INTR_TYPE_NET | INTR_MPSAFE, NULL, qat_etr_bank_intr, qb,  in qat_setup_msix_intr()
668 		    &qb->qb_ih_cookie);  in qat_setup_msix_intr()
673 		error = bus_bind_intr(dev, qb->qb_ih, (i - 1) % mp_ncpus);  in qat_setup_msix_intr()
727 	struct qat_bank *qb = &sc->sc_etr_banks[bank];  in qat_etr_bank_init()  local
732 	mtx_init(&qb->qb_bank_mtx, "qb bank", NULL, MTX_DEF);  in qat_etr_bank_init()
734 	qb->qb_sc = sc;  in qat_etr_bank_init()
735 	qb->qb_bank = bank;  in qat_etr_bank_init()
736 	qb->qb_coalescing_time = COALESCING_TIME_INTERVAL_DEFAULT;  in qat_etr_bank_init()
740 		struct qat_ring *qr = &qb->qb_et_rings[i];  in qat_etr_bank_init()
752 			    qb->qb_et_rings[i - tx_rx_gap].qr_inflight;  in qat_etr_bank_init()
774 	struct qat_bank *qb;  in qat_etr_bank_deinit()  local
778 	qb = &sc->sc_etr_banks[bank];  in qat_etr_bank_deinit()
781 			qr = &qb->qb_et_rings[i];  in qat_etr_bank_deinit()
893 	struct qat_bank *qb;  in qat_etr_setup_ring()  local
904 	qb = &sc->sc_etr_banks[bank];  in qat_etr_setup_ring()
908 	if (qb->qb_allocated_rings & (1 << ring))  in qat_etr_setup_ring()
910 	qr = &qb->qb_et_rings[ring];  in qat_etr_setup_ring()
911 	qb->qb_allocated_rings |= 1 << ring;  in qat_etr_setup_ring()
960 		qat_arb_update(sc, qb);  in qat_etr_setup_ring()
969 		qb->qb_intr_mask |= qr->qr_ring_mask;  in qat_etr_setup_ring()
970 		intr_mask = qb->qb_intr_mask;  in qat_etr_setup_ring()
974 		    ETR_INT_COL_CTL_ENABLE | qb->qb_coalescing_time);  in qat_etr_setup_ring()
1027 qat_etr_ring_intr(struct qat_softc *sc, struct qat_bank *qb,  in qat_etr_ring_intr()  argument
1083 	struct qat_bank *qb = arg;  in qat_etr_bank_intr()  local
1084 	struct qat_softc *sc = qb->qb_sc;  in qat_etr_bank_intr()
1088 	mtx_lock(&qb->qb_bank_mtx);  in qat_etr_bank_intr()
1090 	qat_etr_bank_write_4(sc, qb->qb_bank, ETR_INT_COL_CTL, 0);  in qat_etr_bank_intr()
1093 	estat = ~qat_etr_bank_read_4(sc, qb->qb_bank, ETR_E_STAT);  in qat_etr_bank_intr()
1094 	estat &= qb->qb_intr_mask;  in qat_etr_bank_intr()
1096 	qat_etr_bank_write_4(sc, qb->qb_bank, ETR_INT_COL_CTL,  in qat_etr_bank_intr()
1097 	    ETR_INT_COL_CTL_ENABLE | qb->qb_coalescing_time);  in qat_etr_bank_intr()
1099 	mtx_unlock(&qb->qb_bank_mtx);  in qat_etr_bank_intr()
1102 		struct qat_ring *qr = &qb->qb_et_rings[--i];  in qat_etr_bank_intr()
1104 		(void)qat_etr_ring_intr(sc, qb, qr);  in qat_etr_bank_intr()
1109 qat_arb_update(struct qat_softc *sc, struct qat_bank *qb)  in qat_arb_update()  argument
1112 	qat_arb_ringsrvarben_write_4(sc, qb->qb_bank,  in qat_arb_update()
1113 	    qb->qb_allocated_rings & 0xff);  in qat_arb_update()