Lines Matching refs:csr_val
439 unsigned int csr_val) in qat_hal_wr_indr_csr() argument
449 qat_hal_wr_ae_csr(handle, ae, ae_csr, csr_val); in qat_hal_wr_indr_csr()
460 unsigned int *csr_val) in qat_hal_rd_indr_csr() argument
466 qat_hal_rd_ae_csr(handle, ae, ae_csr, csr_val); in qat_hal_rd_indr_csr()
594 unsigned int csr_val; in qat_hal_init_esram() local
601 csr_val = ADF_CSR_RD(handle->hal_misc_addr_v, csr_addr); in qat_hal_init_esram()
602 if ((csr_val & ESRAM_AUTO_TINIT) && (csr_val & ESRAM_AUTO_TINIT_DONE)) in qat_hal_init_esram()
604 csr_val = ADF_CSR_RD(handle->hal_misc_addr_v, csr_addr); in qat_hal_init_esram()
605 csr_val |= ESRAM_AUTO_TINIT; in qat_hal_init_esram()
607 ADF_CSR_WR(handle->hal_misc_addr_v, csr_addr, csr_val); in qat_hal_init_esram()
610 csr_val = ADF_CSR_RD(handle->hal_misc_addr_v, csr_addr); in qat_hal_init_esram()
612 } while (!(csr_val & ESRAM_AUTO_TINIT_DONE) && times--); in qat_hal_init_esram()
897 unsigned int csr_val = 0; in qat_hal_clear_gpr() local
905 qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL, &csr_val); in qat_hal_clear_gpr()
906 scs_flag = csr_val & (1 << MMC_SHARE_CS_BITPOS); in qat_hal_clear_gpr()
907 csr_val &= ~(1 << MMC_SHARE_CS_BITPOS); in qat_hal_clear_gpr()
908 qat_hal_wr_ae_csr(handle, ae, AE_MISC_CONTROL, csr_val); in qat_hal_clear_gpr()
909 qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &csr_val); in qat_hal_clear_gpr()
910 csr_val &= IGNORE_W1C_MASK; in qat_hal_clear_gpr()
912 csr_val |= CE_NN_MODE; in qat_hal_clear_gpr()
914 qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, csr_val); in qat_hal_clear_gpr()
957 qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL, &csr_val); in qat_hal_clear_gpr()
959 csr_val |= (1 << MMC_SHARE_CS_BITPOS); in qat_hal_clear_gpr()
960 qat_hal_wr_ae_csr(handle, ae, AE_MISC_CONTROL, csr_val); in qat_hal_clear_gpr()
1113 unsigned int csr_val = 0; in qat_hal_init() local
1115 qat_hal_rd_ae_csr(handle, ae, SIGNATURE_ENABLE, &csr_val); in qat_hal_init()
1116 csr_val |= 0x1; in qat_hal_init()
1117 qat_hal_wr_ae_csr(handle, ae, SIGNATURE_ENABLE, csr_val); in qat_hal_init()
1293 unsigned int csr_val = 0, newcsr_val; in qat_hal_exec_micro_inst() local
1337 qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL, &csr_val); in qat_hal_exec_micro_inst()
1338 scs_flag = csr_val & (1 << MMC_SHARE_CS_BITPOS); in qat_hal_exec_micro_inst()
1339 newcsr_val = CLR_BIT(csr_val, MMC_SHARE_CS_BITPOS); in qat_hal_exec_micro_inst()
1388 qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL, &csr_val); in qat_hal_exec_micro_inst()
1389 newcsr_val = scs_flag ? SET_BIT(csr_val, MMC_SHARE_CS_BITPOS) : in qat_hal_exec_micro_inst()
1390 CLR_BIT(csr_val, MMC_SHARE_CS_BITPOS); in qat_hal_exec_micro_inst()
1456 unsigned int csr_val = 0, newcsr_val = 0; in qat_hal_rd_rel_reg() local
1472 qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL, &csr_val); in qat_hal_rd_rel_reg()
1473 scs_flag = csr_val & (1 << MMC_SHARE_CS_BITPOS); in qat_hal_rd_rel_reg()
1474 newcsr_val = CLR_BIT(csr_val, MMC_SHARE_CS_BITPOS); in qat_hal_rd_rel_reg()
1512 qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL, &csr_val); in qat_hal_rd_rel_reg()
1513 newcsr_val = scs_flag ? SET_BIT(csr_val, MMC_SHARE_CS_BITPOS) : in qat_hal_rd_rel_reg()
1514 CLR_BIT(csr_val, MMC_SHARE_CS_BITPOS); in qat_hal_rd_rel_reg()