225 	void *bank;  in powermac_nvram_close()  local
249 	bank = (sc->sc_bank == sc->sc_bank0) ? sc->sc_bank1 : sc->sc_bank0;  in powermac_nvram_close()
250 	if (erase_bank(sc->sc_dev, bank) != 0 ||  in powermac_nvram_close()
251 	    write_bank(sc->sc_dev, bank, sc->sc_data) != 0) {  in powermac_nvram_close()
256 	sc->sc_bank = bank;  in powermac_nvram_close()
376 wait_operation_complete_amd(uint8_t *bank)  in wait_operation_complete_amd()  argument
381 		if ((inb(bank) ^ inb(bank)) == 0)  in wait_operation_complete_amd()
387 erase_bank_amd(device_t dev, uint8_t *bank)  in erase_bank_amd()  argument
392 	OUTB_DELAY(bank + 0x555, 0xaa);  in erase_bank_amd()
394 	OUTB_DELAY(bank + 0x2aa, 0x55);  in erase_bank_amd()
397 	OUTB_DELAY(bank + 0x555, 0x80);  in erase_bank_amd()
398 	OUTB_DELAY(bank + 0x555, 0xaa);  in erase_bank_amd()
399 	OUTB_DELAY(bank + 0x2aa, 0x55);  in erase_bank_amd()
400 	OUTB_DELAY(bank, 0x30);  in erase_bank_amd()
402 	if (wait_operation_complete_amd(bank) != 0) {  in erase_bank_amd()
408 	OUTB_DELAY(bank, 0xf0);  in erase_bank_amd()
411 		if (bank[i] != 0xff) {  in erase_bank_amd()
420 write_bank_amd(device_t dev, uint8_t *bank, uint8_t *data)  in write_bank_amd()  argument
426 		OUTB_DELAY(bank + 0x555, 0xaa);  in write_bank_amd()
428 		OUTB_DELAY(bank + 0x2aa, 0x55);  in write_bank_amd()
431 		OUTB_DELAY(bank + 0x555, 0xa0);  in write_bank_amd()
432 		OUTB_DELAY(bank + i, data[i]);  in write_bank_amd()
433 		if (wait_operation_complete_amd(bank) != 0) {  in write_bank_amd()
440 	OUTB_DELAY(bank, 0xf0);  in write_bank_amd()
443 		if (bank[i] != data[i]) {  in write_bank_amd()
452 wait_operation_complete_sm(uint8_t *bank)  in wait_operation_complete_sm()  argument
457 		outb(bank, SM_FLASH_CMD_READ_STATUS);  in wait_operation_complete_sm()
458 		if (inb(bank) & SM_FLASH_STATUS_DONE)  in wait_operation_complete_sm()
465 erase_bank_sm(device_t dev, uint8_t *bank)  in erase_bank_sm()  argument
469 	outb(bank, SM_FLASH_CMD_ERASE_SETUP);  in erase_bank_sm()
470 	outb(bank, SM_FLASH_CMD_ERASE_CONFIRM);  in erase_bank_sm()
472 	if (wait_operation_complete_sm(bank) != 0) {  in erase_bank_sm()
477 	outb(bank, SM_FLASH_CMD_CLEAR_STATUS);  in erase_bank_sm()
478 	outb(bank, SM_FLASH_CMD_RESET);  in erase_bank_sm()
481 		if (bank[i] != 0xff) {  in erase_bank_sm()
490 write_bank_sm(device_t dev, uint8_t *bank, uint8_t *data)  in write_bank_sm()  argument
495 		OUTB_DELAY(bank + i, SM_FLASH_CMD_WRITE_SETUP);  in write_bank_sm()
496 		outb(bank + i, data[i]);  in write_bank_sm()
497 		if (wait_operation_complete_sm(bank) != 0) {  in write_bank_sm()
503 	outb(bank, SM_FLASH_CMD_CLEAR_STATUS);  in write_bank_sm()
504 	outb(bank, SM_FLASH_CMD_RESET);  in write_bank_sm()
507 		if (bank[i] != data[i]) {  in write_bank_sm()
516 erase_bank(device_t dev, uint8_t *bank)  in erase_bank()  argument
524 		return (erase_bank_amd(dev, bank));  in erase_bank()
526 		return (erase_bank_sm(dev, bank));  in erase_bank()
530 write_bank(device_t dev, uint8_t *bank, uint8_t *data)  in write_bank()  argument
538 		return (write_bank_amd(dev, bank, data));  in write_bank()
540 		return (write_bank_sm(dev, bank, data));  in write_bank()