Lines Matching +full:0 +full:x80810000
40 #define agFALSE 0
44 #define agNULL ((void *)0)
72 #define OFF 0
87 #define TD_OPERATION_INITIATOR 0x1
88 #define TD_OPERATION_TARGET 0x2
111 #define TD_CARD_ID_FREE 0
140 #define DEFAULT_OUTBOUND_QUEUE_INTERRUPT_DELAY 0
143 #define DEFAULT_INBOUND_QUEUE_PRIORITY 0
144 #define DEFAULT_QUEUE_OPTION 0
150 #define SAS_NO_DEVICE 0
156 #define SAS_ROUTING_DIRECT 0x00
157 #define SAS_ROUTING_SUBTRACTIVE 0x01
158 #define SAS_ROUTING_TABLE 0x02
160 #define SAS_CONNECTION_RATE_1_5G 0x08
161 #define SAS_CONNECTION_RATE_3_0G 0x09
162 #define SAS_CONNECTION_RATE_6_0G 0x0A
163 #define SAS_CONNECTION_RATE_12_0G 0x0B
175 #define SCSIOPC_TEST_UNIT_READY 0x00
176 #define SCSIOPC_INQUIRY 0x12
177 #define SCSIOPC_MODE_SENSE_6 0x1A
178 #define SCSIOPC_MODE_SENSE_10 0x5A
179 #define SCSIOPC_MODE_SELECT_6 0x15
180 #define SCSIOPC_START_STOP_UNIT 0x1B
181 #define SCSIOPC_READ_CAPACITY_10 0x25
182 #define SCSIOPC_READ_CAPACITY_16 0x9E
183 #define SCSIOPC_READ_6 0x08
184 #define SCSIOPC_READ_10 0x28
185 #define SCSIOPC_READ_12 0xA8
186 #define SCSIOPC_READ_16 0x88
187 #define SCSIOPC_WRITE_6 0x0A
188 #define SCSIOPC_WRITE_10 0x2A
189 #define SCSIOPC_WRITE_12 0xAA
190 #define SCSIOPC_WRITE_16 0x8A
191 #define SCSIOPC_WRITE_VERIFY 0x2E
192 #define SCSIOPC_VERIFY_10 0x2F
193 #define SCSIOPC_VERIFY_12 0xAF
194 #define SCSIOPC_VERIFY_16 0x8F
195 #define SCSIOPC_REQUEST_SENSE 0x03
196 #define SCSIOPC_REPORT_LUN 0xA0
197 #define SCSIOPC_FORMAT_UNIT 0x04
198 #define SCSIOPC_SEND_DIAGNOSTIC 0x1D
199 #define SCSIOPC_WRITE_SAME_10 0x41
200 #define SCSIOPC_WRITE_SAME_16 0x93
201 #define SCSIOPC_READ_BUFFER 0x3C
202 #define SCSIOPC_WRITE_BUFFER 0x3B
204 #define SCSIOPC_GET_CONFIG 0x46
205 #define SCSIOPC_GET_EVENT_STATUS_NOTIFICATION 0x4a
206 #define SCSIOPC_REPORT_KEY 0xA4
207 #define SCSIOPC_SEND_KEY 0xA3
208 #define SCSIOPC_READ_DVD_STRUCTURE 0xAD
209 #define SCSIOPC_TOC 0x43
210 #define SCSIOPC_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1E
211 #define SCSIOPC_READ_VERIFY 0x42
213 #define SCSIOPC_LOG_SENSE 0x4D
214 #define SCSIOPC_LOG_SELECT 0x4C
215 #define SCSIOPC_MODE_SELECT_6 0x15
216 #define SCSIOPC_MODE_SELECT_10 0x55
217 #define SCSIOPC_SYNCHRONIZE_CACHE_10 0x35
218 #define SCSIOPC_SYNCHRONIZE_CACHE_16 0x91
219 #define SCSIOPC_WRITE_AND_VERIFY_10 0x2E
220 #define SCSIOPC_WRITE_AND_VERIFY_12 0xAE
221 #define SCSIOPC_WRITE_AND_VERIFY_16 0x8E
222 #define SCSIOPC_READ_MEDIA_SERIAL_NUMBER 0xAB
223 #define SCSIOPC_REASSIGN_BLOCKS 0x07
286 #define SCSI_STATUS_GOOD 0x00
287 #define SCSI_STATUS_CHECK_CONDITION 0x02
288 #define SCSI_STATUS_BUSY 0x08
289 #define SCSI_STATUS_COMMAND_TERMINATED 0x22
290 #define SCSI_STATUS_TASK_SET_FULL 0x28
295 #define NO_DATA 0
302 #define SAS_CMND 0
306 #define SMP_REQUEST 0x40
307 #define SMP_RESPONSE 0x41
309 #define SMP_INITIATOR 0x01
310 #define SMP_TARGET 0x02
312 /* default SMP timeout: 0xFFFF is the Maximum Allowed */
313 #define DEFAULT_SMP_TIMEOUT 0xFFFF
319 #define SMP_REPORT_GENERAL 0x00
320 #define SMP_REPORT_MANUFACTURE_INFORMATION 0x01
321 #define SMP_READ_GPIO_REGISTER 0x02
322 #define SMP_DISCOVER 0x10
323 #define SMP_REPORT_PHY_ERROR_LOG 0x11
324 #define SMP_REPORT_PHY_SATA 0x12
325 #define SMP_REPORT_ROUTING_INFORMATION 0x13
326 #define SMP_WRITE_GPIO_REGISTER 0x82
327 #define SMP_CONFIGURE_ROUTING_INFORMATION 0x90
328 #define SMP_PHY_CONTROL 0x91
329 #define SMP_PHY_TEST_FUNCTION 0x92
330 #define SMP_PMC_SPECIFIC 0xC0
334 #define SMP_FUNCTION_ACCEPTED 0x00
335 #define UNKNOWN_SMP_FUNCTION 0x01
336 #define SMP_FUNCTION_FAILED 0x02
337 #define INVALID_REQUEST_FRAME_LENGTH 0x03
338 #define INVALID_EXPANDER_CHANGE_COUNT 0x04
339 #define SMP_FN_BUSY 0x05
340 #define INCOMPLETE_DESCRIPTOR_LIST 0x06
341 #define PHY_DOES_NOT_EXIST 0x10
342 #define INDEX_DOES_NOT_EXIST 0x11
343 #define PHY_DOES_NOT_SUPPORT_SATA 0x12
344 #define UNKNOWN_PHY_OPERATION 0x13
345 #define UNKNOWN_PHY_TEST_FUNCTION 0x14
346 #define PHY_TEST_FUNCTION_IN_PROGRESS 0x15
347 #define PHY_VACANT 0x16
348 #define UNKNOWN_PHY_EVENT_SOURCE 0x17
349 #define UNKNOWN_DESCRIPTOT_TYPE 0x18
350 #define UNKNOWN_PHY_FILETER 0x19
351 #define AFFILIATION_VIOLATION 0x1A
352 #define SMP_ZONE_VIOLATION 0x20
353 #define NO_MANAGEMENT_ACCESS_RIGHTS 0x21
354 #define UNKNOWN_ENABLE_DISABLE_ZONING_VALUE 0x22
355 #define ZONE_LOCK_VIOLATION 0x23
356 #define NOT_ACTIVATED 0x24
357 #define ZONE_GROUP_OUT_OF_RANGE 0x25
358 #define NO_PHYSICAL_PRESENCE 0x26
359 #define SAVING_NOT_SUPPORTED 0x27
360 #define SOURCE_ZONE_GROUP_DOES_NOT_EXIST 0x28
361 #define DISABLED_PASSWORD_NOT_SUPPORTED 0x29
364 #define SMP_PHY_CONTROL_NOP 0x00
365 #define SMP_PHY_CONTROL_LINK_RESET 0x01
366 #define SMP_PHY_CONTROL_HARD_RESET 0x02
367 #define SMP_PHY_CONTROL_DISABLE 0x03
368 #define SMP_PHY_CONTROL_CLEAR_ERROR_LOG 0x05
369 #define SMP_PHY_CONTROL_CLEAR_AFFILIATION 0x06
370 #define SMP_PHY_CONTROL_XMIT_SATA_PS_SIGNAL 0x07
373 #define IT_NEXUS_TIMEOUT 0x7D0 /* 2000 ms; old value was 0xFFFF */
380 ((val) = (val) | 0x80000000)
383 ((val) = (val) & 0x7FFFFFFF)
391 /* this macro is based on SAS spec, not sTSDK 0xC0 */
393 (((devInfo)->devType_S_Rate & 0xC0) >> 6)
396 ((devInfo)->devType_S_Rate & 0x0F)
399 (((devInfo)->ext & 0x7800) >> 11)
423 #define DEVICE_SSP_BIT 0x8 /* SSP Initiator port */
424 #define DEVICE_STP_BIT 0x4 /* STP Initiator port */
425 #define DEVICE_SMP_BIT 0x2 /* SMP Initiator port */
426 #define DEVICE_SATA_BIT 0x1 /* SATA device, valid in the discovery response only */
477 #define REPORT_GENERAL_CONFIGURING_BIT 0x2
478 #define REPORT_GENERAL_CONFIGURABLE_BIT 0x1
541 /* B3-0 : reserved */
544 /* B3-0 : negotiatedPhyLinkRate */
566 /* B3-0 : hardwareMinPhyLinkRate */
569 /* B3-0 : hardwareMaxPhyLinkRate */
574 /* B3-0 : partialPathwayTimeout */
577 /* B3-0 : routingAttribute */
582 #define DISCRSP_SSP_BIT 0x08
583 #define DISCRSP_STP_BIT 0x04
584 #define DISCRSP_SMP_BIT 0x02
585 #define DISCRSP_SATA_BIT 0x01
587 #define DISCRSP_SATA_PS_BIT 0x80
590 (((pResp)->attachedDeviceType & 0x70) >> 4)
592 ((bit8)((pResp)->negotiatedPhyLinkRate & 0x0F))
624 #define DISCRSP_VIRTUALPHY_BIT 0x80
629 ((bit8)((pResp)->routingAttribute & 0x0F))
655 /* B6-0 : reserved */
738 /* b3-0 : reserved */
741 /* b3-0 : reserved */
745 /* b3-0 : partial Pathway TO Value */
764 #define SCSI_SNSKEY_NO_SENSE 0x00
765 #define SCSI_SNSKEY_RECOVERED_ERROR 0x01
766 #define SCSI_SNSKEY_NOT_READY 0x02
767 #define SCSI_SNSKEY_MEDIUM_ERROR 0x03
768 #define SCSI_SNSKEY_HARDWARE_ERROR 0x04
769 #define SCSI_SNSKEY_ILLEGAL_REQUEST 0x05
770 #define SCSI_SNSKEY_UNIT_ATTENTION 0x06
771 #define SCSI_SNSKEY_DATA_PROTECT 0x07
772 #define SCSI_SNSKEY_ABORTED_COMMAND 0x0B
773 #define SCSI_SNSKEY_MISCOMPARE 0x0E
779 #define SCSI_SNSCODE_NO_ADDITIONAL_INFO 0x0000
780 #define SCSI_SNSCODE_LUN_CRC_ERROR_DETECTED 0x0803
781 #define SCSI_SNSCODE_INVALID_COMMAND 0x2000
782 #define SCSI_SNSCODE_LOGICAL_BLOCK_OUT 0x2100
783 #define SCSI_SNSCODE_INVALID_FIELD_IN_CDB 0x2400
784 #define SCSI_SNSCODE_LOGICAL_NOT_SUPPORTED 0x2500
785 #define SCSI_SNSCODE_POWERON_RESET 0x2900
786 #define SCSI_SNSCODE_EVERLAPPED_CMDS 0x4e00
787 #define SCSI_SNSCODE_INTERNAL_TARGET_FAILURE 0x4400
788 #define SCSI_SNSCODE_MEDIUM_NOT_PRESENT 0x3a00
789 #define SCSI_SNSCODE_UNRECOVERED_READ_ERROR 0x1100
790 #define SCSI_SNSCODE_RECORD_NOT_FOUND 0x1401
791 #define SCSI_SNSCODE_NOT_READY_TO_READY_CHANGE 0x2800
792 #define SCSI_SNSCODE_OPERATOR_MEDIUM_REMOVAL_REQUEST 0x5a01
793 #define SCSI_SNSCODE_INFORMATION_UNIT_CRC_ERROR 0x4703
794 #define SCSI_SNSCODE_LOGICAL_UNIT_NOT_READY_FORMAT_IN_PROGRESS 0x0404
795 #define SCSI_SNSCODE_HARDWARE_IMPENDING_FAILURE 0x5d10
796 #define SCSI_SNSCODE_LOW_POWER_CONDITION_ON 0x5e00
797 #define SCSI_SNSCODE_LOGICAL_UNIT_NOT_READY_INIT_REQUIRED 0x0402
798 #define SCSI_SNSCODE_INVALID_FIELD_PARAMETER_LIST 0x2600
799 #define SCSI_SNSCODE_ATA_DEVICE_FAILED_SET_FEATURES 0x4471
800 #define SCSI_SNSCODE_ATA_DEVICE_FEATURE_NOT_ENABLED 0x670B
801 #define SCSI_SNSCODE_LOGICAL_UNIT_FAILED_SELF_TEST 0x3E03
802 #define SCSI_SNSCODE_COMMAND_SEQUENCE_ERROR 0x2C00
803 #define SCSI_SNSCODE_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE 0x2100
804 #define SCSI_SNSCODE_LOGICAL_UNIT_FAILURE 0x3E01
805 #define SCSI_SNSCODE_MEDIA_LOAD_OR_EJECT_FAILED 0x5300
806 #define SCSI_SNSCODE_LOGICAL_UNIT_NOT_READY_INITIALIZING_COMMAND_REQUIRED 0x0402
807 #define SCSI_SNSCODE_LOGICAL_UNIT_NOT_READY_CAUSE_NOT_REPORTABLE 0x0400
808 #define SCSI_SNSCODE_LOGICAL_UNIT_DOES_NOT_RESPOND_TO_SELECTION 0x0500
809 #define SCSI_SNSCODE_DIAGNOSTIC_FAILURE_ON_COMPONENT_NN 0x4000
810 #define SCSI_SNSCODE_COMMANDS_CLEARED_BY_ANOTHER_INITIATOR 0x2F00
811 #define SCSI_SNSCODE_WRITE_ERROR_AUTO_REALLOCATION_FAILED 0x0C02
816 #define SCSI_ASC_NOTREADY_INIT_CMD_REQ 0x04
817 #define SCSI_ASCQ_NOTREADY_INIT_CMD_REQ 0x02
823 #define SCSIOP_INQUIRY_CMDDT 0x02
824 #define SCSIOP_INQUIRY_EVPD 0x01
835 #define AGSA_FLIP_2_BYTES(_x) ((bit16)(((((bit16)(_x))&0x00FF)<<8)| \
836 ((((bit16)(_x))&0xFF00)>>8)))
838 #define AGSA_FLIP_4_BYTES(_x) ((bit32)(((((bit32)(_x))&0x000000FF)<<24)| \
839 ((((bit32)(_x))&0x0000FF00)<<8)| \
840 ((((bit32)(_x))&0x00FF0000)>>8)| \
841 ((((bit32)(_x))&0xFF000000)>>24)))
854 (bitptr)&(((STRUCT_TYPE *)0)->FEILD)
872 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)))) = (bit8)((((bit16)VALUE16)>>8)&0xFF); \
873 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)+1))) = (bit8)(((bit16)VALUE16)&0xFF);
876 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)))) = (bit8)((((bit32)VALUE32)>>24)&0xFF); \
877 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)+1))) = (bit8)((((bit32)VALUE32)>>16)&0xFF); \
878 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)+2))) = (bit8)((((bit32)VALUE32)>>8)&0xFF); \
879 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)+3))) = (bit8)(((bit32)VALUE32)&0xFF);
898 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)+1))) = (bit8)((((bit16)VALUE16)>>8)&0xFF); \
899 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)))) = (bit8)(((bit16)VALUE16)&0xFF);
902 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)+3))) = (bit8)((((bit32)VALUE32)>>24)&0xFF); \
903 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)+2))) = (bit8)((((bit32)VALUE32)>>16)&0xFF); \
904 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)+1))) = (bit8)((((bit32)VALUE32)>>8)&0xFF); \
905 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)))) = (bit8)(((bit32)VALUE32)&0xFF);
1015 #define TargetUnknown 0
1020 #define CDB_GRP_MASK 0xE0 /* 1110 0000 */
1021 #define CDB_6BYTE 0x00
1022 #define CDB_10BYTE1 0x20
1023 #define CDB_10BYTE2 0x40
1024 #define CDB_12BYTE 0xA0
1025 #define CDB_16BYTE 0x80
1028 #define SATA_ATA_DEVICE 0x01 /**< ATA ATA device ty…
1029 #define SATA_ATAPI_DEVICE 0x02 /**< ATA ATAPI device …
1030 #define SATA_PM_DEVICE 0x03 /**< ATA PM device typ…
1031 #define SATA_SEMB_DEVICE 0x04 /**< ATA SEMB device t…
1032 #define SATA_SEMB_WO_SEP_DEVICE 0x05 /**< ATA SEMB without …
1033 #define UNKNOWN_DEVICE 0xFF
1043 #define PMC_IOCTL_SIGNATURE 0x1234
1050 #define PIO_SETUP_DEV_TO_HOST_FIS 0x5F
1051 #define REG_DEV_TO_HOST_FIS 0x34
1052 #define SET_DEV_BITS_FIS 0xA1
1057 #define TDSA_DISCOVERY_OPTION_FULL_START 0
1061 #define TDSA_DISCOVERY_TYPE_SAS 0
1078 #define STP_DEVICE_TYPE 0 /* SATA behind expander 00*/
1082 #define ATAPI_DEVICE_FLAG 0x200000 /* ATAPI device flag*/
1084 #define TD_INTERNAL_TM_RESET 0xFF
1091 #define SAT_DEV_STATE_NORMAL 0 /* Normal */
1097 #define TD_GET_PHY_ID(input) (input & 0x0F)
1098 #define TD_GET_PHY_NUMS(input) ((input & 0xF0) >> 4)
1099 #define TD_GET_LINK_RATE(input) ((input & 0xFF00) >> 8)
1100 #define TD_GET_PORT_STATE(input) ((input & 0xF0000) >> 16)
1101 #define TD_GET_PHY_STATUS(input) ((input & 0xFF00) >> 8)
1102 #define TD_GET_RESET_STATUS(input) ((input & 0xFF00) >> 8)
1106 #define SPC_VPD_SIGNATURE 0xFEDCBA98
1108 #define TD_GET_FRAME_TYPE(input) (input & 0xFF)
1109 #define TD_GET_TLR(input) ((input & 0x300) >> 8)
1117 #define TD_TASK_SIMPLE 0x0 /* Simple */
1118 #define TD_TASK_ORDERED 0x2 /* Ordered */
1119 #define TD_TASK_HEAD_OF_QUEUE 0x1 /* Head of Queue */
1120 #define TD_TASK_ACA 0x4 /* ACA */
1126 #define CONFIGURE_FW_MAX_PORTS 0x20000000
1128 #define NO_ACK 0xFFFF
1134 #define MODE_SELECT 0x15
1135 #define PAGE_FORMAT 0x10
1137 #define DR_MODE_PG_CODE 0x02
1138 #define DR_MODE_PG_LENGTH 0x0e
1226 #define TI_VEN_DEV_SPC 0x80010000
1227 #define TI_VEN_DEV_SPCADAP 0x80810000
1228 #define TI_VEN_DEV_SPCv 0x80080000
1229 #define TI_VEN_DEV_SPCve 0x80090000
1230 #define TI_VEN_DEV_SPCvplus 0x80180000
1231 #define TI_VEN_DEV_SPCveplus 0x80190000
1232 #define TI_VEN_DEV_SPCADAPvplus 0x80880000
1233 #define TI_VEN_DEV_SPCADAPveplus 0x80890000
1235 #define TI_VEN_DEV_SPC12Gv 0x80700000
1236 #define TI_VEN_DEV_SPC12Gve 0x80710000
1237 #define TI_VEN_DEV_SPC12Gvplus 0x80720000
1238 #define TI_VEN_DEV_SPC12Gveplus 0x80730000
1239 #define TI_VEN_DEV_9015 0x90150000
1240 #define TI_VEN_DEV_SPC12ADP 0x80740000 /* 8 ports KBP added*/
1241 #define TI_VEN_DEV_SPC12ADPP 0x80760000 /* 16 ports */
1242 #define TI_VEN_DEV_SPC12SATA 0x80060000 /* SATA HBA */
1243 #define TI_VEN_DEV_9060 0x90600000
1245 … (TI_VEN_DEV_SPC == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* retu…
1246 … (TI_VEN_DEV_SPCADAP == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* retu…
1247 … (TI_VEN_DEV_SPCv == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* retu…
1248 … (TI_VEN_DEV_SPCve == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* retu…
1249 …r) (TI_VEN_DEV_SPCvplus == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* retu…
1250 …gr) (TI_VEN_DEV_SPCveplus == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* retu…
1251 …s(agr) (TI_VEN_DEV_SPCADAPvplus == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* retu…
1252 …us(agr) (TI_VEN_DEV_SPCADAPveplus == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* retu…
1254 …) (TI_VEN_DEV_SPC12Gv == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* retu…
1255 …r) (TI_VEN_DEV_SPC12Gve == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* retu…
1256 …(agr) (TI_VEN_DEV_SPC12Gvplus == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* retu…
1257 …s(agr) (TI_VEN_DEV_SPC12Gveplus == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* retu…
1258 …) (TI_VEN_DEV_9015 == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* retu…
1259 …) (TI_VEN_DEV_9060 == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* retu…
1260 …C12ADP(agr) (TI_VEN_DEV_SPC12ADP == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0)
1261 …C12ADPP(agr) (TI_VEN_DEV_SPC12ADPP == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0)
1262 …C12SATA(agr) (TI_VEN_DEV_SPC12SATA == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0)
1265 ( tIsSPCHIL((agr)) == 1) ? 1 : 0 )
1269 (tIsSPCADAPveplus((agr)) == 1) ? 1 : 0 )
1276 (tIsSPCADAPveplus((agr)) == 1) ? 1 : 0 )
1286 (tIsSPC9060(agr) == 1) ? 1 : 0)
1292 (tIsSPC12ADP(agr) == 1) ? 1 : 0 )
1299 (tIsSPC12SATA(agr) == 1) ? 1 : 0 )
1303 (tIsSPCADAPveplus((agr)) == 1) ? 1 : 0 )
1306 (tIsSPCV12G(agr) == 1) ? 1 : 0)