Lines Matching +full:fpga +full:- +full:region
2 *Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved.
55 bit32 gFPGA_TEST = 0; // If set unblock fpga functions
66 * \param usecsPerTick micro-seconds per tick for the LL layer
69 * \return -void-
105 memoryRequirement->agMemory[LLROOT_MEM_INDEX].singleElementLength = sizeof(agsaLLRoot_t); in saGetRequirements()
106 memoryRequirement->agMemory[LLROOT_MEM_INDEX].numElements = 1; in saGetRequirements()
107 memoryRequirement->agMemory[LLROOT_MEM_INDEX].totalLength = sizeof(agsaLLRoot_t); in saGetRequirements()
108 memoryRequirement->agMemory[LLROOT_MEM_INDEX].alignment = sizeof(void *); in saGetRequirements()
109 memoryRequirement->agMemory[LLROOT_MEM_INDEX].type = AGSA_CACHED_MEM; in saGetRequirements()
113 memoryRequirement->agMemory[LLROOT_MEM_INDEX].singleElementLength, in saGetRequirements()
114 memoryRequirement->agMemory[LLROOT_MEM_INDEX].totalLength, in saGetRequirements()
115 memoryRequirement->agMemory[LLROOT_MEM_INDEX].alignment, in saGetRequirements()
116 memoryRequirement->agMemory[LLROOT_MEM_INDEX].type )); in saGetRequirements()
119 memoryRequirement->agMemory[DEVICELINK_MEM_INDEX].singleElementLength = sizeof(agsaDeviceDesc_t); in saGetRequirements()
120 memoryRequirement->agMemory[DEVICELINK_MEM_INDEX].numElements = swConfig->numDevHandles; in saGetRequirements()
121 memoryRequirement->agMemory[DEVICELINK_MEM_INDEX].totalLength = sizeof(agsaDeviceDesc_t) in saGetRequirements()
122 * swConfig->numDevHandles; in saGetRequirements()
123 memoryRequirement->agMemory[DEVICELINK_MEM_INDEX].alignment = sizeof(void *); in saGetRequirements()
124 memoryRequirement->agMemory[DEVICELINK_MEM_INDEX].type = AGSA_CACHED_MEM; in saGetRequirements()
127 memoryRequirement->agMemory[DEVICELINK_MEM_INDEX].singleElementLength, in saGetRequirements()
128 memoryRequirement->agMemory[DEVICELINK_MEM_INDEX].totalLength, in saGetRequirements()
129 memoryRequirement->agMemory[DEVICELINK_MEM_INDEX].alignment, in saGetRequirements()
130 memoryRequirement->agMemory[DEVICELINK_MEM_INDEX].type )); in saGetRequirements()
133 …memoryRequirement->agMemory[IOREQLINK_MEM_INDEX].singleElementLength = sizeof(agsaIORequestDesc_t); in saGetRequirements()
137 …memoryRequirement->agMemory[IOREQLINK_MEM_INDEX].numElements = swConfig->maxActiveIOs + SA_RESERVE… in saGetRequirements()
138 memoryRequirement->agMemory[IOREQLINK_MEM_INDEX].totalLength = sizeof(agsaIORequestDesc_t) * in saGetRequirements()
139 memoryRequirement->agMemory[IOREQLINK_MEM_INDEX].numElements; in saGetRequirements()
140 memoryRequirement->agMemory[IOREQLINK_MEM_INDEX].alignment = sizeof(void *); in saGetRequirements()
141 memoryRequirement->agMemory[IOREQLINK_MEM_INDEX].type = AGSA_CACHED_MEM; in saGetRequirements()
145 memoryRequirement->agMemory[IOREQLINK_MEM_INDEX].singleElementLength, in saGetRequirements()
146 memoryRequirement->agMemory[IOREQLINK_MEM_INDEX].totalLength, in saGetRequirements()
147 memoryRequirement->agMemory[IOREQLINK_MEM_INDEX].alignment, in saGetRequirements()
148 memoryRequirement->agMemory[IOREQLINK_MEM_INDEX].type )); in saGetRequirements()
151 memoryRequirement->agMemory[TIMERLINK_MEM_INDEX].singleElementLength = sizeof(agsaTimerDesc_t); in saGetRequirements()
152 memoryRequirement->agMemory[TIMERLINK_MEM_INDEX].numElements = NUM_TIMERS; in saGetRequirements()
153 …memoryRequirement->agMemory[TIMERLINK_MEM_INDEX].totalLength = sizeof(agsaTimerDesc_t) * NUM_TIMER… in saGetRequirements()
154 memoryRequirement->agMemory[TIMERLINK_MEM_INDEX].alignment = sizeof(void *); in saGetRequirements()
155 memoryRequirement->agMemory[TIMERLINK_MEM_INDEX].type = AGSA_CACHED_MEM; in saGetRequirements()
158 memoryRequirement->agMemory[TIMERLINK_MEM_INDEX].singleElementLength, in saGetRequirements()
159 memoryRequirement->agMemory[TIMERLINK_MEM_INDEX].totalLength, in saGetRequirements()
160 memoryRequirement->agMemory[TIMERLINK_MEM_INDEX].alignment, in saGetRequirements()
161 memoryRequirement->agMemory[TIMERLINK_MEM_INDEX].type )); in saGetRequirements()
166 memoryRequirement->agMemory[LL_FUNCTION_TRACE].singleElementLength = 1; in saGetRequirements()
167 memoryRequirement->agMemory[LL_FUNCTION_TRACE].numElements = swConfig->TraceBufferSize; in saGetRequirements()
168 memoryRequirement->agMemory[LL_FUNCTION_TRACE].totalLength = swConfig->TraceBufferSize; in saGetRequirements()
169 memoryRequirement->agMemory[LL_FUNCTION_TRACE].alignment = sizeof(void *); in saGetRequirements()
170 memoryRequirement->agMemory[LL_FUNCTION_TRACE].type = AGSA_CACHED_MEM; in saGetRequirements()
174 memoryRequirement->agMemory[LL_FUNCTION_TRACE].singleElementLength, in saGetRequirements()
175 memoryRequirement->agMemory[LL_FUNCTION_TRACE].totalLength, in saGetRequirements()
176 memoryRequirement->agMemory[LL_FUNCTION_TRACE].alignment, in saGetRequirements()
177 memoryRequirement->agMemory[LL_FUNCTION_TRACE].type )); in saGetRequirements()
183 agsaMem_t *agMemory = memoryRequirement->agMemory; in saGetRequirements()
195 memoryRequirement->agMemory[LL_FAST_IO].singleElementLength, in saGetRequirements()
196 memoryRequirement->agMemory[LL_FAST_IO].totalLength, in saGetRequirements()
197 memoryRequirement->agMemory[LL_FAST_IO].alignment, in saGetRequirements()
198 memoryRequirement->agMemory[LL_FAST_IO].type )); in saGetRequirements()
205 agsaMem_t *agMemory = memoryRequirement->agMemory; in saGetRequirements()
216 memoryRequirement->agMemory[HDA_DMA_BUFFER].singleElementLength, in saGetRequirements()
217 memoryRequirement->agMemory[HDA_DMA_BUFFER].totalLength, in saGetRequirements()
218 memoryRequirement->agMemory[HDA_DMA_BUFFER].alignment, in saGetRequirements()
219 memoryRequirement->agMemory[HDA_DMA_BUFFER].type )); in saGetRequirements()
226 …memoryRequirement->agMemory[memoryReqCount].singleElementLength = mpiMemoryRequirement.region[i].e… in saGetRequirements()
227 …memoryRequirement->agMemory[memoryReqCount].numElements = mpiMemoryRequirement.region[i].n… in saGetRequirements()
228 …memoryRequirement->agMemory[memoryReqCount].totalLength = mpiMemoryRequirement.region[i].t… in saGetRequirements()
229 …memoryRequirement->agMemory[memoryReqCount].alignment = mpiMemoryRequirement.region[i].a… in saGetRequirements()
230 …memoryRequirement->agMemory[memoryReqCount].type = mpiMemoryRequirement.region[i].t… in saGetRequirements()
233 memoryRequirement->agMemory[memoryReqCount].singleElementLength, in saGetRequirements()
234 memoryRequirement->agMemory[memoryReqCount].totalLength, in saGetRequirements()
235 memoryRequirement->agMemory[memoryReqCount].alignment, in saGetRequirements()
236 memoryRequirement->agMemory[memoryReqCount].type )); in saGetRequirements()
242 if (swConfig->param3 == agNULL) in saGetRequirements()
250 queueConfig = (agsaQueueConfig_t *)swConfig->param3; in saGetRequirements()
251 *maxNumLocks = (LL_IOREQ_IBQ_LOCK_PARM + queueConfig->numInboundQueues ); in saGetRequirements()
262 memoryRequirement->count = memoryReqCount; in saGetRequirements()
264 swConfig->legacyInt_X = 1; in saGetRequirements()
265 swConfig->max_MSI_InterruptVectors = 32; in saGetRequirements()
266 swConfig->max_MSIX_InterruptVectors = 64;//16; in saGetRequirements()
268 SA_DBG1(("saGetRequirements: swConfig->stallUsec %d\n",swConfig->stallUsec )); in saGetRequirements()
271 SA_DBG1(("saGetRequirements: swConfig->disableMDF %d\n",swConfig->disableMDF)); in saGetRequirements()
273 /*SA_DBG1(("saGetRequirements: swConfig->enableDIF %d\n",swConfig->enableDIF ));*/ in saGetRequirements()
274 …/*SA_DBG1(("saGetRequirements: swConfig->enableEncryption %d\n",swConfig->enableEncryption ));*/ in saGetRequirements()
276 swConfig->hostDirectAccessSupport = 1; in saGetRequirements()
277 swConfig->hostDirectAccessMode = 0; in saGetRequirements()
279 swConfig->hostDirectAccessSupport = 0; in saGetRequirements()
280 swConfig->hostDirectAccessMode = 0; in saGetRequirements()
295 * \param usecsPerTick micro-seconds per tick for the LL layer
298 * - \e AGSA_RC_SUCCESS initialization is successful
299 * - \e AGSA_RC_FAILURE initialization is not successful
335 SA_ASSERT((LLROOT_MEM_INDEX < memoryAllocated->count), ""); in saInitialize()
336 SA_ASSERT((DEVICELINK_MEM_INDEX < memoryAllocated->count), ""); in saInitialize()
337 SA_ASSERT((IOREQLINK_MEM_INDEX < memoryAllocated->count), ""); in saInitialize()
338 SA_ASSERT((TIMERLINK_MEM_INDEX < memoryAllocated->count), ""); in saInitialize()
365 for ( i = 0; i < memoryAllocated->count; i ++ ) in saInitialize()
368 if (memoryAllocated->agMemory[i].singleElementLength && in saInitialize()
369 memoryAllocated->agMemory[i].numElements) in saInitialize()
371 if ( (0 != memoryAllocated->agMemory[i].numElements) in saInitialize()
372 && (0 == memoryAllocated->agMemory[i].totalLength) ) in saInitialize()
377 memoryAllocated->agMemory[i].singleElementLength, in saInitialize()
378 memoryAllocated->agMemory[i].numElements)); in saInitialize()
386 memoryAllocated->agMemory[i].singleElementLength, in saInitialize()
387 memoryAllocated->agMemory[i].numElements, in saInitialize()
388 memoryAllocated->agMemory[i].virtPtr)); in saInitialize()
394 saRoot = (agsaLLRoot_t *) (memoryAllocated->agMemory[LLROOT_MEM_INDEX].virtPtr); in saInitialize()
402 agRoot->sdkData = (void *) saRoot; in saInitialize()
406 if ( (memoryAllocated != &saRoot->memoryAllocated) || in saInitialize()
407 (hwConfig != &saRoot->hwConfig) || in saInitialize()
408 (swConfig != &saRoot->swConfig) ) in saInitialize()
410 agsaMemoryRequirement_t *memA = &saRoot->memoryAllocated; in saInitialize()
411 agsaHwConfig_t *hwC = &saRoot->hwConfig; in saInitialize()
412 agsaSwConfig_t *swC = &saRoot->swConfig; in saInitialize()
426 gLLDebugLevel = swConfig->sallDebugLevel & 0xF; in saInitialize()
433 saRoot->TraceBufferLength = memoryAllocated->agMemory[LL_FUNCTION_TRACE].totalLength; in saInitialize()
434 saRoot->TraceBuffer = memoryAllocated->agMemory[LL_FUNCTION_TRACE].virtPtr; in saInitialize()
444 agsaMem_t *agMemory = memoryAllocated->agMemory; in saInitialize()
447 size = sizeof(saRoot->freeFastReq) / sizeof(saRoot->freeFastReq[0]); in saInitialize()
461 alignment - 1) & ~(alignment - 1)))) in saInitialize()
463 saRoot->freeFastReq[i] = fr; in saInitialize()
465 saRoot->freeFastIdx = size; in saInitialize()
471 …SA_DBG1(("saInitialize: swConfig->PortRecoveryResetTimer %x\n",swConfig->PortRecoveryResetTimer… in saInitialize()
482 …itialize: SA_ENABLE_PCI_TRIGGER a 0x%08x %p\n", saRoot->swConfig.PCI_trigger,&saRoot->swCon… in saInitialize()
484 if( saRoot->swConfig.PCI_trigger & PCI_TRIGGER_INIT_TEST ) in saInitialize()
486 …nitialize: SA_ENABLE_PCI_TRIGGER 0x%08x %p\n", saRoot->swConfig.PCI_trigger,&saRoot->swCon… in saInitialize()
487 saRoot->swConfig.PCI_trigger &= ~PCI_TRIGGER_INIT_TEST; in saInitialize()
493 saRoot->ChipId = (ossaHwRegReadConfig32(agRoot,0) & 0xFFFF0000); in saInitialize()
495 SA_DBG1(("saInitialize: saRoot->ChipId 0x%08x\n", saRoot->ChipId)); in saInitialize()
496 siUpdateBarOffsetTable(agRoot,saRoot->ChipId); in saInitialize()
498 if(saRoot->ChipId == VEN_DEV_SPC) in saInitialize()
509 else if(saRoot->ChipId == VEN_DEV_HIL ) in saInitialize()
519 else if(saRoot->ChipId == VEN_DEV_SPCV) in saInitialize()
529 else if(saRoot->ChipId == VEN_DEV_SPCVE) in saInitialize()
539 else if(saRoot->ChipId == VEN_DEV_SPCVP) in saInitialize()
549 else if(saRoot->ChipId == VEN_DEV_SPCVEP) in saInitialize()
559 else if(saRoot->ChipId == VEN_DEV_ADAPVP) in saInitialize()
563 else if(saRoot->ChipId == VEN_DEV_ADAPVEP) in saInitialize()
567 else if(saRoot->ChipId == VEN_DEV_SPC12V) in saInitialize()
577 else if(saRoot->ChipId == VEN_DEV_SPC12VE) in saInitialize()
587 else if(saRoot->ChipId == VEN_DEV_SPC12VP) in saInitialize()
597 else if(saRoot->ChipId == VEN_DEV_SPC12VEP) in saInitialize()
607 else if(saRoot->ChipId == VEN_DEV_SPC12ADP) in saInitialize()
617 else if(saRoot->ChipId == VEN_DEV_SPC12ADPE) in saInitialize()
627 else if(saRoot->ChipId == VEN_DEV_SPC12ADPP) in saInitialize()
637 else if(saRoot->ChipId == VEN_DEV_SPC12ADPEP) in saInitialize()
647 else if(saRoot->ChipId == VEN_DEV_SPC12SATA) in saInitialize()
657 else if(saRoot->ChipId == VEN_DEV_9015) in saInitialize()
659 SA_DBG1(("saInitialize: SPC 12V FPGA\n" )); in saInitialize()
667 else if(saRoot->ChipId == VEN_DEV_9060) in saInitialize()
669 SA_DBG1(("saInitialize: SPC 12V FPGA B\n" )); in saInitialize()
677 else if(saRoot->ChipId == VEN_DEV_SFC) in saInitialize()
683 …SA_DBG1(("saInitialize saRoot->ChipId %8X expect %8X or %8X\n", saRoot->ChipId,VEN_DEV_SPC, VEN_DE… in saInitialize()
721 SA_DBG1(("swConfig->numSASDevHandles =%d\n", swConfig->numDevHandles)); in saInitialize()
723 smTrace(hpDBG_VERY_LOUD,"29",swConfig->numDevHandles); in saInitialize()
724 /* TP:29 swConfig->numDevHandles */ in saInitialize()
728 saRoot->deviceLinkMem = memoryAllocated->agMemory[DEVICELINK_MEM_INDEX]; in saInitialize()
729 if(agNULL == saRoot->deviceLinkMem.virtPtr) in saInitialize()
736 si_memset(saRoot->deviceLinkMem.virtPtr, 0, saRoot->deviceLinkMem.totalLength); in saInitialize()
737 …SA_DBG2(("saInitialize: [%d] saRoot->deviceLinkMem VirtPtr=%p PhysicalLo=%x Count=%x Total=%x type… in saInitialize()
739 saRoot->deviceLinkMem.virtPtr, in saInitialize()
740 saRoot->deviceLinkMem.phyAddrLower, in saInitialize()
741 saRoot->deviceLinkMem.numElements, in saInitialize()
742 saRoot->deviceLinkMem.totalLength, in saInitialize()
743 saRoot->deviceLinkMem.type)); in saInitialize()
745 maxNumIODevices = swConfig->numDevHandles; in saInitialize()
746 SA_DBG2(("saInitialize: maxNumIODevices=%d, swConfig->numDevHandles=%d \n", in saInitialize()
748 swConfig->numDevHandles)); in saInitialize()
751 SA_DBG1(("saInitialize: swConfig->PCI_trigger= 0x%x\n", swConfig->PCI_trigger)); in saInitialize()
755 saLlistInitialize(&(saRoot->freeDevicesList)); in saInitialize()
759 pDeviceDesc = (agsaDeviceDesc_t *) AGSAMEM_ELEMENT_READ(&(saRoot->deviceLinkMem), i); in saInitialize()
761 saLlinkInitialize(&(pDeviceDesc->linkNode)); in saInitialize()
763 pDeviceDesc->initiatorDevHandle.osData = agNULL; in saInitialize()
764 pDeviceDesc->initiatorDevHandle.sdkData = agNULL; in saInitialize()
765 pDeviceDesc->targetDevHandle.osData = agNULL; in saInitialize()
766 pDeviceDesc->targetDevHandle.sdkData = agNULL; in saInitialize()
767 pDeviceDesc->deviceType = SAS_SATA_UNKNOWN_DEVICE; in saInitialize()
768 pDeviceDesc->pPort = agNULL; in saInitialize()
769 pDeviceDesc->DeviceMapIndex = 0; in saInitialize()
771 saLlistInitialize(&(pDeviceDesc->pendingIORequests)); in saInitialize()
774 saLlistAdd(&(saRoot->freeDevicesList), &(pDeviceDesc->linkNode)); in saInitialize()
779 saRoot->IORequestMem = memoryAllocated->agMemory[IOREQLINK_MEM_INDEX]; in saInitialize()
780 si_memset(saRoot->IORequestMem.virtPtr, 0, saRoot->IORequestMem.totalLength); in saInitialize()
782 …SA_DBG2(("saInitialize: [%d] saRoot->IORequestMem VirtPtr=%p PhysicalLo=%x Count=%x Total=%x type… in saInitialize()
784 saRoot->IORequestMem.virtPtr, in saInitialize()
785 saRoot->IORequestMem.phyAddrLower, in saInitialize()
786 saRoot->IORequestMem.numElements, in saInitialize()
787 saRoot->IORequestMem.totalLength, in saInitialize()
788 saRoot->IORequestMem.type)); in saInitialize()
791 saLlistIOInitialize(&(saRoot->freeIORequests)); in saInitialize()
792 saLlistIOInitialize(&(saRoot->freeReservedRequests)); in saInitialize()
793 for ( i = 0; i < swConfig->maxActiveIOs; i ++ ) in saInitialize()
796 pRequestDesc = (agsaIORequestDesc_t *) AGSAMEM_ELEMENT_READ(&(saRoot->IORequestMem), i); in saInitialize()
798 saLlinkInitialize(&(pRequestDesc->linkNode)); in saInitialize()
800 pRequestDesc->valid = agFALSE; in saInitialize()
801 pRequestDesc->requestType = AGSA_REQ_TYPE_UNKNOWN; in saInitialize()
802 pRequestDesc->pIORequestContext = agNULL; in saInitialize()
803 pRequestDesc->HTag = i; in saInitialize()
804 pRequestDesc->pDevice = agNULL; in saInitialize()
805 pRequestDesc->pPort = agNULL; in saInitialize()
809 if(saLlistIOGetCount(&(saRoot->freeReservedRequests)) < SA_RESERVED_REQUEST_COUNT) in saInitialize()
811 saLlistIOAdd(&(saRoot->freeReservedRequests), &(pRequestDesc->linkNode)); in saInitialize()
816 saLlistIOAdd(&(saRoot->freeIORequests), &(pRequestDesc->linkNode)); in saInitialize()
823 saRoot->timerLinkMem = memoryAllocated->agMemory[TIMERLINK_MEM_INDEX]; in saInitialize()
824 si_memset(saRoot->timerLinkMem.virtPtr, 0, saRoot->timerLinkMem.totalLength); in saInitialize()
825 …SA_DBG2(("saInitialize: [%d] saRoot->timerLinkMem VirtPtr=%p PhysicalLo=%x Count=%x Total=%x type… in saInitialize()
827 saRoot->timerLinkMem.virtPtr, in saInitialize()
828 saRoot->timerLinkMem.phyAddrLower, in saInitialize()
829 saRoot->timerLinkMem.numElements, in saInitialize()
830 saRoot->timerLinkMem.totalLength, in saInitialize()
831 saRoot->timerLinkMem.type )); in saInitialize()
834 saLlistInitialize(&(saRoot->freeTimers)); in saInitialize()
838 pTimerDesc = (agsaTimerDesc_t *) AGSAMEM_ELEMENT_READ(&(saRoot->timerLinkMem), i); in saInitialize()
840 saLlinkInitialize(&(pTimerDesc->linkNode)); in saInitialize()
842 pTimerDesc->valid = agFALSE; in saInitialize()
843 pTimerDesc->timeoutTick = 0; in saInitialize()
844 pTimerDesc->pfnTimeout = agNULL; in saInitialize()
845 pTimerDesc->Event = 0; in saInitialize()
846 pTimerDesc->pParm = agNULL; in saInitialize()
849 saLlistAdd(&(saRoot->freeTimers), &(pTimerDesc->linkNode)); in saInitialize()
852 saLlistInitialize(&(saRoot->validTimers)); in saInitialize()
856 saRoot->phyCount = (bit8) hwConfig->phyCount; in saInitialize()
858 for ( i = 0; i < saRoot->phyCount; i ++ ) in saInitialize()
860 saRoot->phys[i].pPort = agNULL; in saInitialize()
861 saRoot->phys[i].phyId = (bit8) i; in saInitialize()
864 PHY_STATUS_SET(&(saRoot->phys[i]), PHY_STOPPED); in saInitialize()
869 saRoot->portCount = saRoot->phyCount; in saInitialize()
871 saLlistInitialize(&(saRoot->freePorts)); in saInitialize()
872 for ( i = 0; i < saRoot->portCount; i ++ ) in saInitialize()
875 pPort = &(saRoot->ports[i]); in saInitialize()
877 saLlinkInitialize(&(pPort->linkNode)); in saInitialize()
879 pPort->portContext.osData = agNULL; in saInitialize()
880 pPort->portContext.sdkData = pPort; in saInitialize()
881 pPort->portId = 0; in saInitialize()
882 pPort->portIdx = (bit8) i; in saInitialize()
883 pPort->status = PORT_NORMAL; in saInitialize()
885 for ( j = 0; j < saRoot->phyCount; j ++ ) in saInitialize()
887 pPort->phyMap[j] = agFALSE; in saInitialize()
890 saLlistInitialize(&(pPort->listSASATADevices)); in saInitialize()
893 saLlistAdd(&(saRoot->freePorts), &(pPort->linkNode)); in saInitialize()
896 saLlistInitialize(&(saRoot->validPorts)); in saInitialize()
898 /* Init sysIntsActive - default is interrupt enable */ in saInitialize()
899 saRoot->sysIntsActive = agFALSE; in saInitialize()
902 saRoot->usecsPerTick = usecsPerTick; in saInitialize()
905 saRoot->minStallusecs = swConfig->stallUsec; in saInitialize()
910 saRoot->minStallusecs = WAIT_INCREMENT_DEFAULT; in saInitialize()
914 saRoot->timeTick = 0; in saInitialize()
917 saRoot->DeviceRegistrationCB = agNULL; in saInitialize()
918 saRoot->DeviceDeregistrationCB = agNULL; in saInitialize()
921 for ( i = 0; i < saRoot->portCount; i ++ ) in saInitialize()
923 pPortMap = &(saRoot->PortMap[i]); in saInitialize()
925 pPortMap->PortContext = agNULL; in saInitialize()
926 pPortMap->PortID = PORT_MARK_OFF; in saInitialize()
927 pPortMap->PortStatus = PORT_NORMAL; in saInitialize()
928 saRoot->autoDeregDeviceflag[i] = 0; in saInitialize()
934 pDeviceMap = &(saRoot->DeviceMap[i]); in saInitialize()
936 pDeviceMap->DeviceHandle = agNULL; in saInitialize()
937 pDeviceMap->DeviceIdFromFW = i; in saInitialize()
943 pIOMap = &(saRoot->IOMap[i]); in saInitialize()
945 pIOMap->IORequest = agNULL; in saInitialize()
946 pIOMap->Tag = MARK_OFF; in saInitialize()
950 if (!swConfig->param3) in saInitialize()
953 siConfiguration(agRoot, &saRoot->mpiConfig, hwConfig, swConfig); in saInitialize()
958 agsaQueueConfig_t *dCFG = &saRoot->QueueConfig; in saInitialize()
959 agsaQueueConfig_t *sCFG = (agsaQueueConfig_t *)swConfig->param3; in saInitialize()
965 if ((hwConfig->hwInterruptCoalescingTimer) || (hwConfig->hwInterruptCoalescingControl)) in saInitialize()
967 for ( i = 0; i < sCFG->numOutboundQueues; i ++ ) in saInitialize()
970 sCFG->outboundQueues[i].interruptDelay = 0; in saInitialize()
971 sCFG->outboundQueues[i].interruptCount = 0; in saInitialize()
976 if (hwConfig->hwInterruptCoalescingTimer == 0) in saInitialize()
978 hwConfig->hwInterruptCoalescingTimer = 1; in saInitialize()
983 ret = siConfiguration(agRoot, &saRoot->mpiConfig, hwConfig, swConfig); in saInitialize()
986 SA_DBG1(("saInitialize failure queue number=%d\n", saRoot->QueueConfig.numInboundQueues)); in saInitialize()
987 agRoot->sdkData = agNULL; in saInitialize()
995 saRoot->swConfig.param3 = &saRoot->QueueConfig; in saInitialize()
997 mpiMemoryAllocated.count = memoryAllocated->count - MPI_MEM_INDEX; in saInitialize()
1000 …mpiMemoryAllocated.region[i].virtPtr = memoryAllocated->agMemory[MPI_IBQ_OBQ_INDEX + i].vir… in saInitialize()
1001 …mpiMemoryAllocated.region[i].appHandle = memoryAllocated->agMemory[MPI_IBQ_OBQ_INDEX + i].osH… in saInitialize()
1002 …mpiMemoryAllocated.region[i].physAddrUpper = memoryAllocated->agMemory[MPI_IBQ_OBQ_INDEX + i].phy… in saInitialize()
1003 …mpiMemoryAllocated.region[i].physAddrLower = memoryAllocated->agMemory[MPI_IBQ_OBQ_INDEX + i].phy… in saInitialize()
1004 …mpiMemoryAllocated.region[i].totalLength = memoryAllocated->agMemory[MPI_IBQ_OBQ_INDEX + i].tot… in saInitialize()
1005 …mpiMemoryAllocated.region[i].numElements = memoryAllocated->agMemory[MPI_IBQ_OBQ_INDEX + i].num… in saInitialize()
1006 …mpiMemoryAllocated.region[i].elementSize = memoryAllocated->agMemory[MPI_IBQ_OBQ_INDEX + i].sin… in saInitialize()
1007 …mpiMemoryAllocated.region[i].alignment = memoryAllocated->agMemory[MPI_IBQ_OBQ_INDEX + i].ali… in saInitialize()
1008 …mpiMemoryAllocated.region[i].type = memoryAllocated->agMemory[MPI_IBQ_OBQ_INDEX + i].typ… in saInitialize()
1009 …SA_DBG2(("saInitialize: memoryAllocated->agMemory[%d] VirtPtr=%p PhysicalLo=%x Count=%x Total=%x t… in saInitialize()
1011 memoryAllocated->agMemory[MPI_IBQ_OBQ_INDEX + i].virtPtr, in saInitialize()
1012 memoryAllocated->agMemory[MPI_IBQ_OBQ_INDEX + i].phyAddrLower, in saInitialize()
1013 memoryAllocated->agMemory[MPI_IBQ_OBQ_INDEX + i].numElements, in saInitialize()
1014 memoryAllocated->agMemory[MPI_IBQ_OBQ_INDEX + i].totalLength, in saInitialize()
1015 memoryAllocated->agMemory[MPI_IBQ_OBQ_INDEX + i].type)); in saInitialize()
1018 SA_DBG1(("saInitialize: Zero memory region %d virt %p allocated %d\n", in saInitialize()
1019 i,mpiMemoryAllocated.region[i].virtPtr, mpiMemoryAllocated.region[i].totalLength)); in saInitialize()
1020 si_memset(mpiMemoryAllocated.region[i].virtPtr , 0,mpiMemoryAllocated.region[i].totalLength); in saInitialize()
1024 if ((!swConfig->max_MSI_InterruptVectors) && in saInitialize()
1025 (!swConfig->max_MSIX_InterruptVectors) && in saInitialize()
1026 (!swConfig->legacyInt_X)) in saInitialize()
1034 …SA_DBG1(("saInitialize: swConfig->max_MSI_InterruptVectors %d\n",swConfig->max_MSI_InterruptVector… in saInitialize()
1035 …SA_DBG1(("saInitialize: swConfig->max_MSIX_InterruptVectors %d\n",swConfig->max_MSIX_InterruptVect… in saInitialize()
1037 if ((swConfig->legacyInt_X > 1) || (swConfig->max_MSI_InterruptVectors > 32) || in saInitialize()
1038 (swConfig->max_MSIX_InterruptVectors > 64)) in saInitialize()
1041 agRoot->sdkData = agNULL; in saInitialize()
1046 if ((swConfig->legacyInt_X) && (swConfig->max_MSI_InterruptVectors)) in saInitialize()
1049 agRoot->sdkData = agNULL; in saInitialize()
1054 else if ((swConfig->legacyInt_X) && (swConfig->max_MSIX_InterruptVectors)) in saInitialize()
1057 agRoot->sdkData = agNULL; in saInitialize()
1062 else if ((swConfig->max_MSI_InterruptVectors) && (swConfig->max_MSIX_InterruptVectors)) in saInitialize()
1065 agRoot->sdkData = agNULL; in saInitialize()
1077 if (swConfig->legacyInt_X) in saInitialize()
1079 saRoot->OurInterrupt = siOurLegacyInterrupt; /* Called in ISR*/ in saInitialize()
1080 saRoot->DisableInterrupts = siDisableLegacyInterrupts; /* Called in ISR*/ in saInitialize()
1081 saRoot->ReEnableInterrupts = siReenableLegacyInterrupts;/* Called in Delayed Int handler*/ in saInitialize()
1083 else if (swConfig->max_MSIX_InterruptVectors) in saInitialize()
1085 saRoot->OurInterrupt = siOurMSIXInterrupt; in saInitialize()
1086 saRoot->DisableInterrupts = siDisableMSIXInterrupts; in saInitialize()
1087 saRoot->ReEnableInterrupts = siReenableMSIXInterrupts; in saInitialize()
1089 else if (swConfig->max_MSI_InterruptVectors) in saInitialize()
1091 saRoot->OurInterrupt = siOurMSIInterrupt; in saInitialize()
1092 saRoot->DisableInterrupts = siDisableMSIInterrupts; in saInitialize()
1093 saRoot->ReEnableInterrupts = siReenableMSIInterrupts; in saInitialize()
1098 saRoot->OurInterrupt = siOurLegacyInterrupt; /* Called in ISR*/ in saInitialize()
1099 saRoot->DisableInterrupts = siDisableLegacyInterrupts; /* Called in ISR*/ in saInitialize()
1100 saRoot->ReEnableInterrupts = siReenableLegacyInterrupts;/* Called in Delayed Int handler*/ in saInitialize()
1106 if (swConfig->legacyInt_X ) in saInitialize()
1109 saRoot->OurInterrupt = siOurLegacy_V_Interrupt; /* Called in ISR*/ in saInitialize()
1110 saRoot->DisableInterrupts = siDisableLegacy_V_Interrupts; /* Called in ISR*/ in saInitialize()
1111 saRoot->ReEnableInterrupts = siReenableLegacy_V_Interrupts;/* Called in Delayed Int handler*/ in saInitialize()
1113 else if (swConfig->max_MSIX_InterruptVectors) in saInitialize()
1115 …SA_DBG1(("saInitialize: SPC V max_MSIX_InterruptVectors %X\n", swConfig->max_MSIX_InterruptVector… in saInitialize()
1116 saRoot->OurInterrupt = siOurMSIX_V_Interrupt; /* */ in saInitialize()
1117 saRoot->DisableInterrupts = siDisableMSIX_V_Interrupts; in saInitialize()
1118 saRoot->ReEnableInterrupts = siReenableMSIX_V_Interrupts; in saInitialize()
1120 else if (swConfig->max_MSI_InterruptVectors) in saInitialize()
1123 saRoot->OurInterrupt = siOurMSIX_V_Interrupt; /* */ in saInitialize()
1124 saRoot->DisableInterrupts = siDisableMSIX_V_Interrupts; in saInitialize()
1125 saRoot->ReEnableInterrupts = siReenableMSIX_V_Interrupts; in saInitialize()
1131 saRoot->OurInterrupt = siOurLegacy_V_Interrupt; /* Called in ISR*/ in saInitialize()
1132 saRoot->DisableInterrupts = siDisableLegacy_V_Interrupts; /* Called in ISR*/ in saInitialize()
1133 saRoot->ReEnableInterrupts = siReenableLegacy_V_Interrupts;/* Called in Delayed Int handler*/ in saInitialize()
1138 saRoot->Use64bit = (saRoot->QueueConfig.numOutboundQueues > 32 ) ? 1 : 0; in saInitialize()
1141 …SA_DBG1(("saInitialize: Use 64 bits for interrupts %d %d\n" ,saRoot->Use64bit, saRoot->QueueConfig… in saInitialize()
1145 …SA_DBG1(("saInitialize: Use 32 bits for interrupts %d %d\n",saRoot->Use64bit , saRoot->QueueConfig… in saInitialize()
1153 saRoot->DisableInterrupts(agRoot, 0); in saInitialize()
1154 SA_DBG1(("saInitialize: DisableInterrupts sysIntsActive %X\n" ,saRoot->sysIntsActive)); in saInitialize()
1157 saRoot->BunchStarts_Enable = FALSE; in saInitialize()
1158 saRoot->BunchStarts_Threshold = 5; in saInitialize()
1159 saRoot->BunchStarts_Pending = 0; in saInitialize()
1160 saRoot->BunchStarts_TimeoutTicks = 10; // N x 100 ms in saInitialize()
1166 saRoot->interruptVecIndexBitMap[i] = 0; in saInitialize()
1167 saRoot->interruptVecIndexBitMap1[i] = 0; in saInitialize()
1203 if (swConfig->hostDirectAccessSupport) in saInitialize()
1205 …if (AGSA_RC_FAILURE == siHDAMode(agRoot, swConfig->hostDirectAccessMode, (agsaFwImg_t *)swConfig->… in saInitialize()
1208 agRoot->sdkData = agNULL; in saInitialize()
1235 swConfig->hostDirectAccessSupport = 1; in saInitialize()
1236 swConfig->hostDirectAccessMode = 1; in saInitialize()
1265 …itialize: SPCv swConfig->hostDirectAccessMode %d swConfig->hostDirectAccessSupport %d\n",swConfig-… in saInitialize()
1266 if (swConfig->hostDirectAccessSupport) in saInitialize()
1279 if( swConfig->hostDirectAccessMode == 0) in saInitialize()
1284 agRoot->sdkData = agNULL; in saInitialize()
1304 agRoot->sdkData = agNULL; in saInitialize()
1311 …if (AGSA_RC_FAILURE == siHDAMode_V(agRoot, swConfig->hostDirectAccessMode, (agsaFwImg_t *)swConfig… in saInitialize()
1316 agRoot->sdkData = agNULL; in saInitialize()
1331 …si_memcpy(&saRoot->mpiConfig.phyAnalogConfig, &hwConfig->phyAnalogConfig, sizeof(agsaPhyAnalogSetu… in saInitialize()
1335 si_memset(&saRoot->LLCounters, 0, sizeof(agsaIOCountInfo_t)); in saInitialize()
1338 si_memset(&saRoot->IoErrorCount, 0, sizeof(agsaIOErrorEventStats_t)); in saInitialize()
1339 si_memset(&saRoot->IoEventCount, 0, sizeof(agsaIOErrorEventStats_t)); in saInitialize()
1353 SA_DBG1(("saInitialize: saRoot->ChipId == VEN_DEV_SPCV\n")); in saInitialize()
1358 ret = mpiInitialize(agRoot, &mpiMemoryAllocated, &saRoot->mpiConfig); in saInitialize()
1359 …aInitialize: MaxOutstandingIO 0x%x swConfig->maxActiveIOs 0x%x\n", saRoot->ControllerInfo.maxPendi… in saInitialize()
1365 swConfig->hostDirectAccessSupport = 1; in saInitialize()
1366 swConfig->hostDirectAccessMode = 1; in saInitialize()
1382 if(saRoot->swConfig.fatalErrorInterruptEnable) in saInitialize()
1384 ossaDisableInterrupts(agRoot,saRoot->swConfig.fatalErrorInterruptVector ); in saInitialize()
1387 agRoot->sdkData = agNULL; in saInitialize()
1400 ossaHwRegWriteExt(agRoot, PCIBAR1, SPC_ICTIMER,hwConfig->hwInterruptCoalescingTimer ); in saInitialize()
1401 ossaHwRegWriteExt(agRoot, PCIBAR1, SPC_ICCONTROL, hwConfig->hwInterruptCoalescingControl); in saInitialize()
1405 …SA_DBG1(("saInitialize: swConfig->fatalErrorInterruptEnable %X\n",swConfig->fatalErrorInterruptEn… in saInitialize()
1407 …SA_DBG1(("saInitialize: saRoot->swConfig.fatalErrorInterruptVector %X\n",saRoot->swConfig.fatalEr… in saInitialize()
1408 …SA_DBG1(("saInitialize: swConfig->max_MSI_InterruptVectors %X\n",swConfig->max_MSI_InterruptVect… in saInitialize()
1409 …SA_DBG1(("saInitialize: swConfig->max_MSIX_InterruptVectors %X\n",swConfig->max_MSIX_InterruptVec… in saInitialize()
1410 SA_DBG1(("saInitialize: swConfig->legacyInt_X %X\n",swConfig->legacyInt_X)); in saInitialize()
1411 …SA_DBG1(("saInitialize: swConfig->hostDirectAccessSupport %X\n",swConfig->hostDirectAccessSuppo… in saInitialize()
1412 …SA_DBG1(("saInitialize: swConfig->hostDirectAccessMode %X\n",swConfig->hostDirectAccessMode)… in saInitialize()
1415 SA_DBG1(("saInitialize: swConfig->disableMDF %X\n",swConfig->disableMDF)); in saInitialize()
1417 /*SA_DBG1(("saInitialize: swConfig->enableDIF %X\n",swConfig->enableDIF));*/ in saInitialize()
1418 …/*SA_DBG1(("saInitialize: swConfig->enableEncryption %X\n",swConfig->enableEncryption));… in saInitialize()
1426 saRoot->chipStatus = CHIP_FATAL_ERROR; in saInitialize()
1431 saRoot->chipStatus = CHIP_NORMAL; in saInitialize()
1443 SA_DBG1(("saInitialize: saRoot->sysIntsActive %X\n",saRoot->sysIntsActive)); in saInitialize()
1445 circularQ = &saRoot->outboundQueue[0]; in saInitialize()
1446 OSSA_READ_LE_32(circularQ->agRoot, &circularQ->producerIdx, circularQ->piPointer, 0); in saInitialize()
1447 … SA_DBG1(("saInitialize: PI 0x%03x CI 0x%03x\n",circularQ->producerIdx, circularQ->consumerIdx)); in saInitialize()
1452 …SA_DBG1(("saInitialize: swConfig.fatalErrorInterruptEnable %d\n",saRoot->swConfig.fatalErrorInterr… in saInitialize()
1453 …SA_DBG1(("saInitialize: swConfig.fatalErrorInterruptVector %d\n",saRoot->swConfig.fatalErrorInterr… in saInitialize()
1454 …SA_DBG1(("saInitialize: swConfig->max_MSIX_InterruptVectors %X\n",swConfig->max_MSIX_InterruptVec… in saInitialize()
1456 if(saRoot->swConfig.fatalErrorInterruptEnable) in saInitialize()
1466 ossaReenableInterrupts(agRoot,saRoot->swConfig.fatalErrorInterruptVector ); in saInitialize()
1478 siDumpActiveIORequests(agRoot, saRoot->swConfig.maxActiveIOs); in saInitialize()
1496 agsaLLRoot_t *saRoot = (agsaLLRoot_t *)(agRoot->sdkData); in siReadControllerStatus()
1497 mpiReadGSTable(agRoot, &saRoot->mpiGSTable); in siReadControllerStatus()
1501 if(saRoot->Iop1Tcnt_last == saRoot->mpiGSTable.Iop1Tcnt ) in siReadControllerStatus()
1502 SA_DBG2(("siReadControllerStatus: Iop1 %d STUCK\n", saRoot->mpiGSTable.Iop1Tcnt)); in siReadControllerStatus()
1505 …if( saRoot->MsguTcnt_last == saRoot->mpiGSTable.MsguTcnt || saRoot->IopTcnt_last == saRoot->mpiGS… in siReadControllerStatus()
1507 …SA_DBG1(("siReadControllerStatus: Msgu %d Iop %d\n",saRoot->mpiGSTable.MsguTcnt, saRoot->mpiGSTabl… in siReadControllerStatus()
1508 saFatalInterruptHandler(agRoot, saRoot->swConfig.fatalErrorInterruptVector ); in siReadControllerStatus()
1510 …SA_DBG2(("siReadControllerStatus: Msgu %d Iop %d\n",saRoot->mpiGSTable.MsguTcnt, saRoot->mpiGSTabl… in siReadControllerStatus()
1512 saRoot->MsguTcnt_last = saRoot->mpiGSTable.MsguTcnt; in siReadControllerStatus()
1513 saRoot->IopTcnt_last = saRoot->mpiGSTable.IopTcnt; in siReadControllerStatus()
1514 saRoot->Iop1Tcnt_last = saRoot->mpiGSTable.Iop1Tcnt; in siReadControllerStatus()
1520 SA_DBG4(("siReadControllerStatus: saRoot->sysIntsActive %X\n",saRoot->sysIntsActive)); in siReadControllerStatus()
1522 circularQ = &saRoot->outboundQueue[0]; in siReadControllerStatus()
1523 OSSA_READ_LE_32(circularQ->agRoot, &circularQ->producerIdx, circularQ->piPointer, 0); in siReadControllerStatus()
1524 if(circularQ->producerIdx != circularQ->consumerIdx) in siReadControllerStatus()
1526 SA_DBG1(("siReadControllerStatus: saRoot->sysIntsActive %X\n",saRoot->sysIntsActive)); in siReadControllerStatus()
1527 …SA_DBG1(("siReadControllerStatus: PI 0x%03x CI 0x%03x\n",circularQ->producerIdx, circularQ->consum… in siReadControllerStatus()
1552 * \return -void-
1578 mpiConfig->mainConfig.custset = swConfig->FWConfig; in siConfiguration()
1580 …(("siConfiguration:custset %8X %8X\n",mpiConfig->mainConfig.custset,swConfig->FWConf… in siConfiguration()
1582 if (swConfig->param3 == agNULL) in siConfiguration()
1584 SA_DBG1(("siConfiguration: swConfig->param3 == agNULL\n")); in siConfiguration()
1587 mpiConfig->mainConfig.iQNPPD_HPPD_GEvent = 0; in siConfiguration()
1588 mpiConfig->mainConfig.outboundHWEventPID0_3 = 0; in siConfiguration()
1589 mpiConfig->mainConfig.outboundHWEventPID4_7 = 0; in siConfiguration()
1590 mpiConfig->mainConfig.outboundNCQEventPID0_3 = 0; in siConfiguration()
1591 mpiConfig->mainConfig.outboundNCQEventPID4_7 = 0; in siConfiguration()
1592 mpiConfig->mainConfig.outboundTargetITNexusEventPID0_3 = 0; in siConfiguration()
1593 mpiConfig->mainConfig.outboundTargetITNexusEventPID4_7 = 0; in siConfiguration()
1594 mpiConfig->mainConfig.outboundTargetSSPEventPID0_3 = 0; in siConfiguration()
1595 mpiConfig->mainConfig.outboundTargetSSPEventPID4_7 = 0; in siConfiguration()
1597 mpiConfig->mainConfig.ioAbortDelay = 0; in siConfiguration()
1599 mpiConfig->mainConfig.upperEventLogAddress = 0; in siConfiguration()
1600 mpiConfig->mainConfig.lowerEventLogAddress = 0; in siConfiguration()
1601 mpiConfig->mainConfig.eventLogSize = MPI_LOGSIZE; in siConfiguration()
1602 mpiConfig->mainConfig.eventLogOption = 0; in siConfiguration()
1603 mpiConfig->mainConfig.upperIOPeventLogAddress = 0; in siConfiguration()
1604 mpiConfig->mainConfig.lowerIOPeventLogAddress = 0; in siConfiguration()
1605 mpiConfig->mainConfig.IOPeventLogSize = MPI_LOGSIZE; in siConfiguration()
1606 mpiConfig->mainConfig.IOPeventLogOption = 0; in siConfiguration()
1607 mpiConfig->mainConfig.FatalErrorInterrupt = 0; in siConfiguration()
1610 mpiConfig->numInboundQueues = AGSA_MAX_INBOUND_Q; in siConfiguration()
1611 mpiConfig->numOutboundQueues = AGSA_MAX_OUTBOUND_Q; in siConfiguration()
1612 mpiConfig->maxNumInboundQueues = AGSA_MAX_INBOUND_Q; in siConfiguration()
1613 mpiConfig->maxNumOutboundQueues = AGSA_MAX_OUTBOUND_Q; in siConfiguration()
1618 mpiConfig->inboundQueues[i].numElements = INBOUND_DEPTH_SIZE; in siConfiguration()
1619 mpiConfig->inboundQueues[i].elementSize = IOMB_SIZE64; in siConfiguration()
1620 mpiConfig->inboundQueues[i].priority = MPI_QUEUE_NORMAL; in siConfiguration()
1626 mpiConfig->outboundQueues[i].numElements = OUTBOUND_DEPTH_SIZE; in siConfiguration()
1627 mpiConfig->outboundQueues[i].elementSize = IOMB_SIZE64; in siConfiguration()
1628 mpiConfig->outboundQueues[i].interruptVector = 0; in siConfiguration()
1629 mpiConfig->outboundQueues[i].interruptDelay = 0; in siConfiguration()
1630 mpiConfig->outboundQueues[i].interruptThreshold = 0; in siConfiguration()
1632 mpiConfig->outboundQueues[i].interruptEnable = 1; in siConfiguration()
1637 queueConfig = (agsaQueueConfig_t *)swConfig->param3; in siConfiguration()
1643 SA_DBG1(("siConfiguration: swConfig->param3 == %p\n",queueConfig)); in siConfiguration()
1645 if ((queueConfig->numInboundQueues > AGSA_MAX_INBOUND_Q) || in siConfiguration()
1646 (queueConfig->numOutboundQueues > AGSA_MAX_OUTBOUND_Q)) in siConfiguration()
1654 if ((queueConfig->numInboundQueues == 0 || in siConfiguration()
1655 queueConfig->numOutboundQueues == 0 )) in siConfiguration()
1661 mpiConfig->mainConfig.eventLogSize = swConfig->sizefEventLog1 * KBYTES; in siConfiguration()
1662 mpiConfig->mainConfig.eventLogOption = swConfig->eventLog1Option; in siConfiguration()
1663 mpiConfig->mainConfig.IOPeventLogSize = swConfig->sizefEventLog2 * KBYTES; in siConfiguration()
1664 mpiConfig->mainConfig.IOPeventLogOption = swConfig->eventLog2Option; in siConfiguration()
1666 if ((queueConfig->numInboundQueues > IQ_NUM_32) || (queueConfig->numOutboundQueues > OQ_NUM_32)) in siConfiguration()
1689 intOption = hwConfig->intReassertionOption & INT_OPTION; in siConfiguration()
1695 swConfig->sgpioSupportEnable = 1; in siConfiguration()
1700 mpiConfig->mainConfig.FatalErrorInterrupt = in siConfiguration()
1701 … (swConfig->fatalErrorInterruptEnable) /* bit 0*/ | in siConfiguration()
1702 …(hwConfig == agNULL ? 0: (hwConfig->hwOption & HW_CFG_PICI_EFFECTIVE_ADDRESS ? (0x1 << SHIFT1): 0)… in siConfiguration()
1703 … (swConfig->sgpioSupportEnable ? (0x1 << SHIFT2): 0) | in siConfiguration()
1706 … (swConfig->disableMDF ? (0x1 << SHIFT4): 0) | in siConfiguration()
1712 … ((swConfig->fatalErrorInterruptVector & FATAL_ERROR_INT_BITS) << SHIFT8) | in siConfiguration()
1717 …SA_DBG1(("siConfiguration: swConfig->fatalErrorInterruptEnable %X\n",swConfig->fatalErrorInterrup… in siConfiguration()
1718 …SA_DBG1(("siConfiguration: swConfig->fatalErrorInterruptVector %X\n",swConfig->fatalErrorInterrup… in siConfiguration()
1724 mpiConfig->mainConfig.outboundTargetITNexusEventPID0_3 = 0; in siConfiguration()
1725 mpiConfig->mainConfig.outboundTargetITNexusEventPID4_7 = 0; in siConfiguration()
1726 mpiConfig->mainConfig.outboundTargetSSPEventPID0_3 = 0; in siConfiguration()
1727 mpiConfig->mainConfig.outboundTargetSSPEventPID4_7 = 0; in siConfiguration()
1728 mpiConfig->mainConfig.ioAbortDelay = 0; in siConfiguration()
1729 mpiConfig->mainConfig.PortRecoveryTimerPortResetTimer = swConfig->PortRecoveryResetTimer; in siConfiguration()
1732 … mpiConfig->mainConfig.iQNPPD_HPPD_GEvent = queueConfig->iqNormalPriorityProcessingDepth | in siConfiguration()
1733 … (queueConfig->iqHighPriorityProcessingDepth << SHIFT8) | in siConfiguration()
1734 … (queueConfig->generalEventQueue << SHIFT16) | in siConfiguration()
1735 … (queueConfig->tgtDeviceRemovedEventQueue << SHIFT24); in siConfiguration()
1737 mpiConfig->mainConfig.outboundHWEventPID0_3 = queueConfig->sasHwEventQueue[0] | in siConfiguration()
1738 … (queueConfig->sasHwEventQueue[1] << SHIFT8) | in siConfiguration()
1739 … (queueConfig->sasHwEventQueue[2] << SHIFT16) | in siConfiguration()
1740 … (queueConfig->sasHwEventQueue[3] << SHIFT24); in siConfiguration()
1741 mpiConfig->mainConfig.outboundHWEventPID4_7 = queueConfig->sasHwEventQueue[4] | in siConfiguration()
1742 … (queueConfig->sasHwEventQueue[5] << SHIFT8) | in siConfiguration()
1743 … (queueConfig->sasHwEventQueue[6] << SHIFT16) | in siConfiguration()
1744 … (queueConfig->sasHwEventQueue[7] << SHIFT24); in siConfiguration()
1745 mpiConfig->mainConfig.outboundNCQEventPID0_3 = queueConfig->sataNCQErrorEventQueue[0] | in siConfiguration()
1746 … (queueConfig->sataNCQErrorEventQueue[1] << SHIFT8) | in siConfiguration()
1747 … (queueConfig->sataNCQErrorEventQueue[2] << SHIFT16) | in siConfiguration()
1748 … (queueConfig->sataNCQErrorEventQueue[3] << SHIFT24); in siConfiguration()
1749 mpiConfig->mainConfig.outboundNCQEventPID4_7 = queueConfig->sataNCQErrorEventQueue[4] | in siConfiguration()
1750 … (queueConfig->sataNCQErrorEventQueue[5] << SHIFT8) | in siConfiguration()
1751 … (queueConfig->sataNCQErrorEventQueue[6] << SHIFT16) | in siConfiguration()
1752 … (queueConfig->sataNCQErrorEventQueue[7] << SHIFT24); in siConfiguration()
1754 mpiConfig->numInboundQueues = queueConfig->numInboundQueues; in siConfiguration()
1755 mpiConfig->numOutboundQueues = queueConfig->numOutboundQueues; in siConfiguration()
1756 mpiConfig->queueOption = queueConfig->queueOption; in siConfiguration()
1759 queueConfig->numInboundQueues, in siConfiguration()
1760 queueConfig->numOutboundQueues)); in siConfiguration()
1764 for( i = 0; i < queueConfig->numInboundQueues; i ++ ) in siConfiguration()
1766 mpiConfig->inboundQueues[i].numElements = (bit16)queueConfig->inboundQueues[i].elementCount; in siConfiguration()
1767 mpiConfig->inboundQueues[i].elementSize = (bit16)queueConfig->inboundQueues[i].elementSize; in siConfiguration()
1768 mpiConfig->inboundQueues[i].priority = queueConfig->inboundQueues[i].priority; in siConfiguration()
1772 queueConfig->inboundQueues[i].elementCount, in siConfiguration()
1773 queueConfig->inboundQueues[i].elementSize, in siConfiguration()
1774 queueConfig->inboundQueues[i].priority, in siConfiguration()
1775 queueConfig->inboundQueues[i].elementCount * queueConfig->inboundQueues[i].elementSize )); in siConfiguration()
1780 for( i = 0; i < queueConfig->numOutboundQueues; i ++ ) in siConfiguration()
1782 …mpiConfig->outboundQueues[i].numElements = (bit16)queueConfig->outboundQueues[i].elementCou… in siConfiguration()
1783 …mpiConfig->outboundQueues[i].elementSize = (bit16)queueConfig->outboundQueues[i].elementSiz… in siConfiguration()
1784 …mpiConfig->outboundQueues[i].interruptVector = (bit8)queueConfig->outboundQueues[i].interruptVe… in siConfiguration()
1785 …mpiConfig->outboundQueues[i].interruptDelay = (bit16)queueConfig->outboundQueues[i].interruptD… in siConfiguration()
1786 …mpiConfig->outboundQueues[i].interruptThreshold = (bit8)queueConfig->outboundQueues[i].interruptCo… in siConfiguration()
1787 …mpiConfig->outboundQueues[i].interruptEnable = (bit32)queueConfig->outboundQueues[i].interruptE… in siConfiguration()
1791 queueConfig->outboundQueues[i].elementCount, in siConfiguration()
1792 queueConfig->outboundQueues[i].elementSize, in siConfiguration()
1793 queueConfig->outboundQueues[i].interruptCount, in siConfiguration()
1794 queueConfig->outboundQueues[i].interruptEnable)); in siConfiguration()
1798 …SA_DBG1(("siConfiguration:mpiConfig->mainConfig.FatalErrorInterrupt 0x%X\n",mpiConfig->mainConfig.… in siConfiguration()
1799 …SA_DBG1(("siConfiguration:swConfig->fatalErrorInterruptVector 0x%X\n",swConfig->fatalErrorIn… in siConfiguration()
1801 …SA_DBG1(("siConfiguration:PortRecoveryResetTimer 0x%X\n",swConfig->PortRecovery… in siConfiguration()
1814 agsaLLRoot_t *saRoot = (agsaLLRoot_t *)(agRoot->sdkData); in saLogDump()
1815 //mpiConfig_t *mpiConfig = &saRoot->mpiConfig; in saLogDump()
1816 mpiHostLLConfigDescriptor_t *mpiConfig = &saRoot->mainConfigTable; in saLogDump()
1819 *eventLogSize = (U32)mpiConfig->eventLogSize; in saLogDump()
1831 * This function is competed synch->ronously (there is no callback)
1846 bit16 mIdx = 0; /* Memory region index */ in mpiInitialize()
1878 saRoot = (agsaLLRoot_t *)(agRoot->sdkData); in mpiInitialize()
1945 if (memoryAllocated->count == TOTAL_MPI_MEM_CHUNKS) in mpiInitialize()
1947 config->maxNumInboundQueues = AGSA_MAX_INBOUND_Q; in mpiInitialize()
1948 config->maxNumOutboundQueues = AGSA_MAX_OUTBOUND_Q; in mpiInitialize()
1952 config->maxNumInboundQueues = config->numInboundQueues; in mpiInitialize()
1953 config->maxNumOutboundQueues = config->numOutboundQueues; in mpiInitialize()
1954 maxinbound = config->numInboundQueues; in mpiInitialize()
1955 maxoutbound = config->numOutboundQueues; in mpiInitialize()
1979 /* Checks if the configuration memory region size is the same as the mpiConfigMain */ in mpiInitialize()
1980 if(memoryAllocated->region[mIdx].totalLength != sizeof(bit8) * config->mainConfig.eventLogSize) in mpiInitialize()
1982 …SA_DBG1(("ERROR: The memory region [%d] 0x%X != 0x%X does not have the size of the MSGU event log … in mpiInitialize()
1983 mIdx,memoryAllocated->region[mIdx].totalLength,config->mainConfig.eventLogSize)); in mpiInitialize()
1988 mainCfg.iQNPPD_HPPD_GEvent = config->mainConfig.iQNPPD_HPPD_GEvent; in mpiInitialize()
2002 mainCfg.portRecoveryResetTimer = config->mainConfig.PortRecoveryTimerPortResetTimer; in mpiInitialize()
2006 mainCfg.interruptReassertionDelay = saRoot->hwConfig.intReassertionOption; in mpiInitialize()
2013 mainCfg.outboundHWEventPID0_3 = config->mainConfig.outboundHWEventPID0_3; in mpiInitialize()
2014 mainCfg.outboundHWEventPID4_7 = config->mainConfig.outboundHWEventPID4_7; in mpiInitialize()
2015 mainCfg.outboundNCQEventPID0_3 = config->mainConfig.outboundNCQEventPID0_3; in mpiInitialize()
2016 mainCfg.outboundNCQEventPID4_7 = config->mainConfig.outboundNCQEventPID4_7; in mpiInitialize()
2017 mainCfg.outboundTargetITNexusEventPID0_3 = config->mainConfig.outboundTargetITNexusEventPID0_3; in mpiInitialize()
2018 mainCfg.outboundTargetITNexusEventPID4_7 = config->mainConfig.outboundTargetITNexusEventPID4_7; in mpiInitialize()
2019 mainCfg.outboundTargetSSPEventPID0_3 = config->mainConfig.outboundTargetSSPEventPID0_3; in mpiInitialize()
2020 mainCfg.outboundTargetSSPEventPID4_7 = config->mainConfig.outboundTargetSSPEventPID4_7; in mpiInitialize()
2021 mainCfg.ioAbortDelay = config->mainConfig.ioAbortDelay; in mpiInitialize()
2022 mainCfg.custset = config->mainConfig.custset; in mpiInitialize()
2028 eventLogAddress = memoryAllocated->region[mIdx].virtPtr; in mpiInitialize()
2030 mainCfg.upperEventLogAddress = memoryAllocated->region[mIdx].physAddrUpper; in mpiInitialize()
2031 mainCfg.lowerEventLogAddress = memoryAllocated->region[mIdx].physAddrLower; in mpiInitialize()
2032 mainCfg.eventLogSize = config->mainConfig.eventLogSize; in mpiInitialize()
2033 mainCfg.eventLogOption = config->mainConfig.eventLogOption; in mpiInitialize()
2037 /* Checks if the configuration memory region size is the same as the mpiConfigMain */ in mpiInitialize()
2038 if(memoryAllocated->region[mIdx].totalLength != sizeof(bit8) * config->mainConfig.IOPeventLogSize) in mpiInitialize()
2040 SA_DBG1(("ERROR: The memory region does not have the size of the IOP event log\n")); in mpiInitialize()
2045 mainCfg.upperIOPeventLogAddress = memoryAllocated->region[mIdx].physAddrUpper; in mpiInitialize()
2046 mainCfg.lowerIOPeventLogAddress = memoryAllocated->region[mIdx].physAddrLower; in mpiInitialize()
2047 mainCfg.IOPeventLogSize = config->mainConfig.IOPeventLogSize; in mpiInitialize()
2048 mainCfg.IOPeventLogOption = config->mainConfig.IOPeventLogOption; in mpiInitialize()
2049 mainCfg.FatalErrorInterrupt = config->mainConfig.FatalErrorInterrupt; in mpiInitialize()
2082 saRoot->mainConfigTable.iQNPPD_HPPD_GEvent = mainCfg.iQNPPD_HPPD_GEvent; in mpiInitialize()
2086 /* SPCV - reserved fields */ in mpiInitialize()
2087 saRoot->mainConfigTable.outboundHWEventPID0_3 = 0; in mpiInitialize()
2088 saRoot->mainConfigTable.outboundHWEventPID4_7 = 0; in mpiInitialize()
2089 saRoot->mainConfigTable.outboundNCQEventPID0_3 = 0; in mpiInitialize()
2090 saRoot->mainConfigTable.outboundNCQEventPID4_7 = 0; in mpiInitialize()
2091 saRoot->mainConfigTable.outboundTargetITNexusEventPID0_3 = 0; in mpiInitialize()
2092 saRoot->mainConfigTable.outboundTargetITNexusEventPID4_7 = 0; in mpiInitialize()
2093 saRoot->mainConfigTable.outboundTargetSSPEventPID0_3 = 0; in mpiInitialize()
2094 saRoot->mainConfigTable.outboundTargetSSPEventPID4_7 = 0; in mpiInitialize()
2095 saRoot->mainConfigTable.ioAbortDelay = 0; in mpiInitialize()
2096 saRoot->mainConfigTable.custset = 0; in mpiInitialize()
2101 saRoot->mainConfigTable.outboundHWEventPID0_3 = mainCfg.outboundHWEventPID0_3; in mpiInitialize()
2102 saRoot->mainConfigTable.outboundHWEventPID4_7 = mainCfg.outboundHWEventPID4_7; in mpiInitialize()
2103 saRoot->mainConfigTable.outboundNCQEventPID0_3 = mainCfg.outboundNCQEventPID0_3; in mpiInitialize()
2104 saRoot->mainConfigTable.outboundNCQEventPID4_7 = mainCfg.outboundNCQEventPID4_7; in mpiInitialize()
2105 …saRoot->mainConfigTable.outboundTargetITNexusEventPID0_3 = mainCfg.outboundTargetITNexusEventPID0_… in mpiInitialize()
2106 …saRoot->mainConfigTable.outboundTargetITNexusEventPID4_7 = mainCfg.outboundTargetITNexusEventPID4_… in mpiInitialize()
2107 saRoot->mainConfigTable.outboundTargetSSPEventPID0_3 = mainCfg.outboundTargetSSPEventPID0_3; in mpiInitialize()
2108 saRoot->mainConfigTable.outboundTargetSSPEventPID4_7 = mainCfg.outboundTargetSSPEventPID4_7; in mpiInitialize()
2109 saRoot->mainConfigTable.ioAbortDelay = mainCfg.ioAbortDelay; in mpiInitialize()
2110 saRoot->mainConfigTable.custset = mainCfg.custset; in mpiInitialize()
2114 saRoot->mainConfigTable.upperEventLogAddress = mainCfg.upperEventLogAddress; in mpiInitialize()
2115 saRoot->mainConfigTable.lowerEventLogAddress = mainCfg.lowerEventLogAddress; in mpiInitialize()
2116 saRoot->mainConfigTable.eventLogSize = mainCfg.eventLogSize; in mpiInitialize()
2117 saRoot->mainConfigTable.eventLogOption = mainCfg.eventLogOption; in mpiInitialize()
2118 saRoot->mainConfigTable.upperIOPeventLogAddress = mainCfg.upperIOPeventLogAddress; in mpiInitialize()
2119 saRoot->mainConfigTable.lowerIOPeventLogAddress = mainCfg.lowerIOPeventLogAddress; in mpiInitialize()
2120 saRoot->mainConfigTable.IOPeventLogSize = mainCfg.IOPeventLogSize; in mpiInitialize()
2121 saRoot->mainConfigTable.IOPeventLogOption = mainCfg.IOPeventLogOption; in mpiInitialize()
2122 saRoot->mainConfigTable.FatalErrorInterrupt = mainCfg.FatalErrorInterrupt; in mpiInitialize()
2127 ;/* SPCV - reserved fields */ in mpiInitialize()
2131 saRoot->mainConfigTable.HDAModeFlags = mainCfg.HDAModeFlags; in mpiInitialize()
2134 saRoot->mainConfigTable.analogSetupTblOffset = mainCfg.analogSetupTblOffset; in mpiInitialize()
2153 SA_DBG1(("mpiInitialize:SPCV - MAIN_IO_ABORT_DELAY_END_TO_END_CRC_DISABLE\n" )); in mpiInitialize()
2157 SA_DBG1(("mpiInitialize:SPCV - END_TO_END_CRC On\n" )); in mpiInitialize()
2159 SA_DBG3(("mpiInitialize:SPCV - rest reserved field \n" )); in mpiInitialize()
2160 ;/* SPCV - reserved field */ in mpiInitialize()
2188 …SA_DBG1(("mpiInitialize:SPCV12G - offset MAIN_IO_ABORT_DELAY 0x%x value MAIN_IO_ABORT_DELAY_END_TO… in mpiInitialize()
2189 … SA_DBG1(("mpiInitialize:SPCV12G - END_TO_END_CRC OFF for rev A %d\n",smIsCfgVREV_A(agRoot) )); in mpiInitialize()
2193 …SA_DBG1(("mpiInitialize:SPCV12G - END_TO_END_CRC ON rev B %d ****************************\n",smIsC… in mpiInitialize()
2200 SA_DBG1(("mpiInitialize:SPCV12G - END_TO_END_CRC on rev C %d\n",smIsCfgVREV_C(agRoot) )); in mpiInitialize()
2206 …SA_DBG1(("mpiInitialize:SPCV12G - END_TO_END_CRC Off unknown rev 0x%x\n", ossaHwRegReadConfig32((a… in mpiInitialize()
2237 /* skip the ci and pi memory region */ in mpiInitialize()
2264 if(0 == config->inboundQueues[qIdx].numElements) in mpiInitialize()
2283 … bit32 memSize = config->inboundQueues[qIdx].numElements * config->inboundQueues[qIdx].elementSize; in mpiInitialize()
2289 memSize += (128 - remainder); in mpiInitialize()
2292 /* ... first checks that the memory region has the right size */ in mpiInitialize()
2293 if( (memoryAllocated->region[mIdx].totalLength - memOffset < memSize) || in mpiInitialize()
2294 (NULL == memoryAllocated->region[mIdx].virtPtr) || in mpiInitialize()
2295 (0 == memoryAllocated->region[mIdx].totalLength)) in mpiInitialize()
2297 …SA_DBG1(("mpiInitialize: ERROR The memory region does not have the right size for this inbound que… in mpiInitialize()
2304 saRoot->inboundQueue[qIdx].numElements = config->inboundQueues[qIdx].numElements; in mpiInitialize()
2305 saRoot->inboundQueue[qIdx].elementSize = config->inboundQueues[qIdx].elementSize; in mpiInitialize()
2306 saRoot->inboundQueue[qIdx].priority = config->inboundQueues[qIdx].priority; in mpiInitialize()
2307 …si_memcpy(&saRoot->inboundQueue[qIdx].memoryRegion, &memoryAllocated->region[mIdx], sizeof(mpiMem_… in mpiInitialize()
2308 saRoot->inboundQueue[qIdx].memoryRegion.virtPtr = in mpiInitialize()
2309 (bit8 *)saRoot->inboundQueue[qIdx].memoryRegion.virtPtr + memOffset; in mpiInitialize()
2310 saRoot->inboundQueue[qIdx].memoryRegion.physAddrLower += memOffset; in mpiInitialize()
2311 saRoot->inboundQueue[qIdx].memoryRegion.elementSize = memSize; in mpiInitialize()
2312 saRoot->inboundQueue[qIdx].memoryRegion.totalLength = memSize; in mpiInitialize()
2313 saRoot->inboundQueue[qIdx].memoryRegion.numElements = 1; in mpiInitialize()
2317 saRoot->inboundQueue[qIdx].producerIdx = 0; in mpiInitialize()
2318 saRoot->inboundQueue[qIdx].consumerIdx = 0; in mpiInitialize()
2319 saRoot->inboundQueue[qIdx].agRoot = agRoot; in mpiInitialize()
2321 /* MPI memory region for inbound CIs are 2 */ in mpiInitialize()
2322 …saRoot->inboundQueue[qIdx].ciPointer = (((bit8 *)(memoryAllocated->region[MPI_CI_INDEX].virtPtr)) … in mpiInitialize()
2326 inQueueCfg.elementPriSizeCount= config->inboundQueues[qIdx].numElements | in mpiInitialize()
2327 (config->inboundQueues[qIdx].elementSize << SHIFT16) | in mpiInitialize()
2328 (config->inboundQueues[qIdx].priority << SHIFT30); in mpiInitialize()
2329 inQueueCfg.upperBaseAddress = saRoot->inboundQueue[qIdx].memoryRegion.physAddrUpper; in mpiInitialize()
2330 inQueueCfg.lowerBaseAddress = saRoot->inboundQueue[qIdx].memoryRegion.physAddrLower; in mpiInitialize()
2331 inQueueCfg.ciUpperBaseAddress = memoryAllocated->region[MPI_CI_INDEX].physAddrUpper; in mpiInitialize()
2332 … inQueueCfg.ciLowerBaseAddress = memoryAllocated->region[MPI_CI_INDEX].physAddrLower + qIdx * 4; in mpiInitialize()
2339 saRoot->inboundQueue[qIdx].PIPCIBar = mpiGetPCIBarIndex(agRoot, IB_PIPCIBar); in mpiInitialize()
2340 …saRoot->inboundQueue[qIdx].PIPCIOffset = ossaHwRegReadExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx… in mpiInitialize()
2341 saRoot->inboundQueue[qIdx].qNumber = qIdx; in mpiInitialize()
2346 (qIdx == (maxinbound - 1))) in mpiInitialize()
2372 if(0 == config->outboundQueues[qIdx].numElements) in mpiInitialize()
2391 …bit32 memSize = config->outboundQueues[qIdx].numElements * config->outboundQueues[qIdx].elementSiz… in mpiInitialize()
2397 memSize += (128 - remainder); in mpiInitialize()
2400 /* ... first checks that the memory region has the right size */ in mpiInitialize()
2401 if((memoryAllocated->region[mIdx].totalLength - memOffset < memSize) || in mpiInitialize()
2402 (NULL == memoryAllocated->region[mIdx].virtPtr) || in mpiInitialize()
2403 (0 == memoryAllocated->region[mIdx].totalLength)) in mpiInitialize()
2405 SA_DBG1(("ERROR: The memory region does not have the right size for this outbound queue")); in mpiInitialize()
2412 saRoot->outboundQueue[qIdx].numElements = config->outboundQueues[qIdx].numElements; in mpiInitialize()
2413 saRoot->outboundQueue[qIdx].elementSize = config->outboundQueues[qIdx].elementSize; in mpiInitialize()
2414 …si_memcpy(&saRoot->outboundQueue[qIdx].memoryRegion, &memoryAllocated->region[mIdx], sizeof(mpiMem… in mpiInitialize()
2415 saRoot->outboundQueue[qIdx].memoryRegion.virtPtr = in mpiInitialize()
2416 (bit8 *)saRoot->outboundQueue[qIdx].memoryRegion.virtPtr + memOffset; in mpiInitialize()
2417 saRoot->outboundQueue[qIdx].memoryRegion.physAddrLower += memOffset; in mpiInitialize()
2418 saRoot->outboundQueue[qIdx].memoryRegion.elementSize = memSize; in mpiInitialize()
2419 saRoot->outboundQueue[qIdx].memoryRegion.totalLength = memSize; in mpiInitialize()
2420 saRoot->outboundQueue[qIdx].memoryRegion.numElements = 1; in mpiInitialize()
2421 saRoot->outboundQueue[qIdx].producerIdx = 0; in mpiInitialize()
2422 saRoot->outboundQueue[qIdx].consumerIdx = 0; in mpiInitialize()
2423 saRoot->outboundQueue[qIdx].agRoot = agRoot; in mpiInitialize()
2425 /* MPI memory region for outbound PIs are 3 */ in mpiInitialize()
2426 …saRoot->outboundQueue[qIdx].piPointer = (((bit8 *)(memoryAllocated->region[MPI_CI_INDEX + 1].virtP… in mpiInitialize()
2428 outQueueCfg.upperBaseAddress = saRoot->outboundQueue[qIdx].memoryRegion.physAddrUpper; in mpiInitialize()
2429 outQueueCfg.lowerBaseAddress = saRoot->outboundQueue[qIdx].memoryRegion.physAddrLower; in mpiInitialize()
2432 outQueueCfg.piUpperBaseAddress = memoryAllocated->region[MPI_CI_INDEX + 1].physAddrUpper; in mpiInitialize()
2433 …outQueueCfg.piLowerBaseAddress = memoryAllocated->region[MPI_CI_INDEX + 1].physAddrLower + qIdx * … in mpiInitialize()
2434 outQueueCfg.elementSizeCount = config->outboundQueues[qIdx].numElements | in mpiInitialize()
2435 (config->outboundQueues[qIdx].elementSize << SHIFT16); in mpiInitialize()
2437 /* enable/disable interrupt - use saSystemInterruptsActive() API */ in mpiInitialize()
2441 if (config->outboundQueues[qIdx].interruptEnable) in mpiInitialize()
2448 …outQueueCfg.interruptVecCntDelay = ((config->outboundQueues[qIdx].interruptVector & INT_VEC_BIT… in mpiInitialize()
2452 …outQueueCfg.interruptVecCntDelay = (config->outboundQueues[qIdx].interruptDelay & INT_DELAY_B… in mpiInitialize()
2453 … ((config->outboundQueues[qIdx].interruptThreshold & INT_THR_BITS ) << SHIFT16) | in mpiInitialize()
2454 … ((config->outboundQueues[qIdx].interruptVector & INT_VEC_BITS ) << SHIFT24); in mpiInitialize()
2460 … saRoot->interruptVecIndexBitMap[config->outboundQueues[qIdx].interruptVector] |= (1 << qIdx); in mpiInitialize()
2461 …:below 32 saRoot->interruptVecIndexBitMap[config->outboundQueues[qIdx].interruptVector] 0x%08x\n",… in mpiInitialize()
2465 …saRoot->interruptVecIndexBitMap1[config->outboundQueues[qIdx].interruptVector] |= (1 << (qIdx - OQ… in mpiInitialize()
2466 …Above 32 saRoot->interruptVecIndexBitMap1[config->outboundQueues[qIdx].interruptVector] 0x%08x\n",… in mpiInitialize()
2473 saRoot->outboundQueue[qIdx].CIPCIBar = mpiGetPCIBarIndex(agRoot, OB_CIPCIBar); in mpiInitialize()
2474 …saRoot->outboundQueue[qIdx].CIPCIOffset = ossaHwRegReadExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx… in mpiInitialize()
2475 …saRoot->outboundQueue[qIdx].DIntTOffset = ossaHwRegReadExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx… in mpiInitialize()
2476 saRoot->outboundQueue[qIdx].qNumber = qIdx; in mpiInitialize()
2481 (qIdx == (maxoutbound - 1))) in mpiInitialize()
2492 saRoot->numInterruptVectors = 0; in mpiInitialize()
2495 if ((saRoot->interruptVecIndexBitMap[qIdx]) || (saRoot->interruptVecIndexBitMap1[qIdx])) in mpiInitialize()
2497 (saRoot->numInterruptVectors)++; in mpiInitialize()
2501 SA_DBG2(("mpiInitialize:(saRoot->numInterruptVectors) 0x%x\n",(saRoot->numInterruptVectors))); in mpiInitialize()
2515 mpiWriteCALAll(agRoot, &config->phyAnalogConfig); in mpiInitialize()
2538 if(agNULL != saRoot->swConfig.mpiContextTable ) in mpiInitialize()
2540 agsaMPIContext_t * context = (agsaMPIContext_t * )saRoot->swConfig.mpiContextTable; in mpiInitialize()
2541 bit32 length = saRoot->swConfig.mpiContextTablelen; in mpiInitialize()
2557 …itialize: MPITableType 0x%x context->offset 0x%x context->value 0x%x\n",context->MPITableType,cont… in mpiInitialize()
2560 switch(context->MPITableType) in mpiInitialize()
2565 …NFIGURATION_TABLE %d 0x%x + 0x%x = 0x%x\n",context->MPITableType,TableOffset, context->offset, con… in mpiInitialize()
2567 ossaHwRegWriteExt(agRoot, pcibar, OffsetInMain + (context->offset * 4) , context->value); in mpiInitialize()
2570 …E %d offset 0x%x + 0x%x = 0x%x\n",context->MPITableType ,TableOffset+MAIN_GST_OFFSET, context->off… in mpiInitialize()
2572 ossaHwRegWriteExt(agRoot, pcibar, OffsetInMain + (context->offset * 4), context->value); in mpiInitialize()
2575 …LE %d offset 0x%x + 0x%x = 0x%x\n",context->MPITableType,TableOffset+MAIN_IBQ_OFFSET, context->off… in mpiInitialize()
2577 ossaHwRegWriteExt(agRoot, pcibar, OffsetInMain + (context->offset * 4), context->value); in mpiInitialize()
2580 …LE %d offset 0x%x + 0x%x = 0x%x\n",context->MPITableType,TableOffset+MAIN_OBQ_OFFSET, context->off… in mpiInitialize()
2582 ossaHwRegWriteExt(agRoot, pcibar, OffsetInMain + (context->offset * 4), context->value); in mpiInitialize()
2585 … offset 0x%x + 0x%x = 0x%x\n",context->MPITableType,TableOffset+MAIN_ANALOG_SETUP_OFFSET, context-… in mpiInitialize()
2587 ossaHwRegWriteExt(agRoot, pcibar, OffsetInMain + (context->offset * 4), context->value); in mpiInitialize()
2590 … offset 0x%x + 0x%x = 0x%x\n",context->MPITableType,TableOffset+MAIN_INT_VEC_TABLE_OFFSET, context… in mpiInitialize()
2592 ossaHwRegWriteExt(agRoot, pcibar, OffsetInMain + (context->offset * 4), context->value); in mpiInitialize()
2595 … offset 0x%x + 0x%x = 0x%x\n",context->MPITableType,TableOffset+MAIN_PHY_ATTRIBUTE_OFFSET, context… in mpiInitialize()
2597 ossaHwRegWriteExt(agRoot, pcibar, OffsetInMain + (context->offset * 4), context->value); in mpiInitialize()
2600 … %d offset 0x%x + 0x%x = 0x%x\n",context->MPITableType,TableOffset+MAIN_MOQFOT_MOQFOES, context->o… in mpiInitialize()
2602 ossaHwRegWriteExt(agRoot, pcibar, OffsetInMain + (context->offset * 4), context->value); in mpiInitialize()
2605 …PITableType unknown %d offset 0x%x value 0x%x\n",context->MPITableType, context->offset, context->… in mpiInitialize()
2610 if (saRoot->ControllerInfo.fwInterfaceRev > 0x301 ) in mpiInitialize()
2619 length -= sizeof(agsaMPIContext_t); in mpiInitialize()
2631 …nitialize: context %p saRoot->swConfig.mpiContextTable %p %d\n",context,saRoot->swConfig.mpiConte… in mpiInitialize()
2677 } while ((value != togglevalue) && (max_wait_count -= WAIT_INCREMENT)); in mpiInitialize()
2701 /* check the MPI-State for initialization */ in mpiInitialize()
2742 …saRoot->inboundQueue[qIdx].PIPCIOffset = ossaHwRegReadExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx … in mpiInitialize()
2749 if ((0 == config->inboundQueues[0].numElements) || (0 == config->outboundQueues[0].numElements)) in mpiInitialize()
2759 for (i = 0; i < config->numInboundQueues; i ++) in mpiInitialize()
2761 if(0 != config->inboundQueues[i].numElements) in mpiInitialize()
2763 circularIQ = &saRoot->inboundQueue[i]; in mpiInitialize()
2764 si_memset(circularIQ->memoryRegion.virtPtr, 0, circularIQ->memoryRegion.totalLength); in mpiInitialize()
2765 si_memset(saRoot->inboundQueue[i].ciPointer, 0, sizeof(bit32)); in mpiInitialize()
2769 ossaHwRegWriteExt(circularIQ->agRoot, circularIQ->PIPCIBar, circularIQ->PIPCIOffset, 0); in mpiInitialize()
2770 SA_DBG1(("mpiInitialize: SPC V writes IQ %2d offset 0x%x\n",i ,circularIQ->PIPCIOffset)); in mpiInitialize()
2778 for (i = 0; i < config->numOutboundQueues; i ++) in mpiInitialize()
2780 if(0 != config->outboundQueues[i].numElements) in mpiInitialize()
2782 circularOQ = &saRoot->outboundQueue[i]; in mpiInitialize()
2783 si_memset(circularOQ->memoryRegion.virtPtr, 0, circularOQ->memoryRegion.totalLength); in mpiInitialize()
2784 si_memset(saRoot->outboundQueue[i].piPointer, 0, sizeof(bit32)); in mpiInitialize()
2787 ossaHwRegWriteExt(circularOQ->agRoot, circularOQ->CIPCIBar, circularOQ->CIPCIOffset, 0); in mpiInitialize()
2788 SA_DBG2(("mpiInitialize: SPC V writes OQ %2d offset 0x%x\n",i ,circularOQ->CIPCIOffset)); in mpiInitialize()
2801 saRoot->mainConfigTable.upperEventLogAddress = value; in mpiInitialize()
2804 saRoot->mainConfigTable.lowerEventLogAddress = value; in mpiInitialize()
2807 saRoot->mainConfigTable.eventLogSize = value; in mpiInitialize()
2810 saRoot->mainConfigTable.eventLogOption = value; in mpiInitialize()
2812 … dd /p %08X`%08X L %x\n",saRoot->mainConfigTable.upperEventLogAddress,saRoot->mainConfigTable.lowe… in mpiInitialize()
2815 saRoot->mainConfigTable.upperIOPeventLogAddress = value; in mpiInitialize()
2818 saRoot->mainConfigTable.lowerIOPeventLogAddress = value; in mpiInitialize()
2820 … /p %08X`%08X L %x\n",saRoot->mainConfigTable.upperIOPeventLogAddress,saRoot->mainConfigTable.lowe… in mpiInitialize()
2822 saRoot->mainConfigTable.IOPeventLogSize = value; in mpiInitialize()
2825 saRoot->mainConfigTable.IOPeventLogOption = value; in mpiInitialize()
2832 saRoot->mainConfigTable.eventLogOption, in mpiInitialize()
2833 saRoot->mainConfigTable.upperEventLogAddress, in mpiInitialize()
2834 saRoot->mainConfigTable.lowerEventLogAddress, in mpiInitialize()
2835 saRoot->mainConfigTable.eventLogSize/4 ); in mpiInitialize()
2837 saRoot->mainConfigTable.IOPeventLogOption, in mpiInitialize()
2838 saRoot->mainConfigTable.upperIOPeventLogAddress, in mpiInitialize()
2839 saRoot->mainConfigTable.lowerIOPeventLogAddress, in mpiInitialize()
2840 saRoot->mainConfigTable.IOPeventLogSize/4 ); in mpiInitialize()
2844 saRoot->mainConfigTable.FatalErrorInterrupt = value; in mpiInitialize()
2848 SA_DBG1(("mpiInitialize: hwConfig->hwOption %X\n", saRoot->hwConfig.hwOption )); in mpiInitialize()
2854 saRoot->mainConfigTable.FatalErrorDumpOffset0 = value; in mpiInitialize()
2857 saRoot->mainConfigTable.FatalErrorDumpLength0 = value; in mpiInitialize()
2860 saRoot->mainConfigTable.FatalErrorDumpOffset1 = value; in mpiInitialize()
2863 saRoot->mainConfigTable.FatalErrorDumpLength1 = value; in mpiInitialize()
2867 saRoot->mainConfigTable.PortRecoveryTimerPortResetTimer = value; in mpiInitialize()
2871 saRoot->mainConfigTable.InterruptReassertionDelay = value; in mpiInitialize()
2906 agsaLLRoot_t *saRoot = (agsaLLRoot_t *)(agRoot->sdkData); in mpiWaitForConfigTable()
2955 /* bit 4-31 of scratch pad1 should be zeros if it is not in error state */ in mpiWaitForConfigTable()
2970 /* bit 4-31 of scratch pad2 should be zeros if it is not in error state */ in mpiWaitForConfigTable()
3001 if ((max_wait_count -= WAIT_INCREMENT) == 0) in mpiWaitForConfigTable()
3041 if ((max_wait_count -= WAIT_INCREMENT) == 0) in mpiWaitForConfigTable()
3067 …SA_DBG1(("mpiWaitForConfigTable: smIS_spc8081 PCI BAR is not BAR4, bar=0x%x - failure\n", MSGUCfgT… in mpiWaitForConfigTable()
3076 … SA_DBG1(("mpiWaitForConfigTable: PCI BAR is not BAR5, bar=0x%x - failure\n", MSGUCfgTblBase)); in mpiWaitForConfigTable()
3100 si_memcpy(&config->Signature, &Signature, sizeof(Signature)); in mpiWaitForConfigTable()
3103 …config->InterfaceRev = ossaHwRegReadExt(agRoot, pcibar, (bit32)CfgTblDWIdx + MAIN_INTERFACE_REVISI… in mpiWaitForConfigTable()
3106 config->FWRevision = ossaHwRegReadExt(agRoot, pcibar, (bit32)CfgTblDWIdx + MAIN_FW_REVISION); in mpiWaitForConfigTable()
3109 …config->MaxOutstandingIO = ossaHwRegReadExt(agRoot, pcibar, (bit32)CfgTblDWIdx + MAIN_MAX_OUTSTAND… in mpiWaitForConfigTable()
3112 config->MDevMaxSGL = ossaHwRegReadExt(agRoot, pcibar, (bit32)CfgTblDWIdx + MAIN_MAX_SGL_OFFSET); in mpiWaitForConfigTable()
3115 …config->ContrlCapFlag = ossaHwRegReadExt(agRoot, pcibar, (bit32)CfgTblDWIdx + MAIN_CNTRL_CAP_OFFSE… in mpiWaitForConfigTable()
3118 config->GSTOffset = ossaHwRegReadExt(agRoot, pcibar, (bit32)CfgTblDWIdx + MAIN_GST_OFFSET); in mpiWaitForConfigTable()
3121 …config->inboundQueueOffset = ossaHwRegReadExt(agRoot, pcibar, (bit32)CfgTblDWIdx + MAIN_IBQ_OFFSET… in mpiWaitForConfigTable()
3124 …config->outboundQueueOffset = ossaHwRegReadExt(agRoot, pcibar, (bit32)CfgTblDWIdx + MAIN_OBQ_OFFSE… in mpiWaitForConfigTable()
3129 ;/* SPCV - reserved field */ in mpiWaitForConfigTable()
3134 …config->HDAModeFlags = ossaHwRegReadExt(agRoot, pcibar, (bit32)CfgTblDWIdx + MAIN_HDA_FLAGS_OFFSET… in mpiWaitForConfigTable()
3138 …config->analogSetupTblOffset = ossaHwRegReadExt(agRoot, pcibar, (bit32)CfgTblDWIdx + MAIN_ANALOG_S… in mpiWaitForConfigTable()
3142 ;/* SPCV - reserved field */ in mpiWaitForConfigTable()
3144 …config->InterruptVecTblOffset = ossaHwRegReadExt(agRoot, pcibar, (bit32)CfgTblDWIdx + MAIN_INT_VEC… in mpiWaitForConfigTable()
3146 …config->phyAttributeTblOffset = ossaHwRegReadExt(agRoot, pcibar, (bit32)CfgTblDWIdx + MAIN_PHY_ATT… in mpiWaitForConfigTable()
3147 …SA_DBG1(("mpiWaitForConfigTable: INT Vector Tble Offset = 0x%x\n", config->InterruptVecTblOffset)); in mpiWaitForConfigTable()
3148 …SA_DBG1(("mpiWaitForConfigTable: Phy Attribute Tble Offset = 0x%x\n", config->phyAttributeTblOffse… in mpiWaitForConfigTable()
3152 ;/* SPC - Not used */ in mpiWaitForConfigTable()
3156 …config->FatalErrorDumpOffset0 = ossaHwRegReadExt(agRoot, pcibar, (bit32)CfgTblDWIdx + MAIN_FATAL_E… in mpiWaitForConfigTable()
3157 …config->FatalErrorDumpLength0 = ossaHwRegReadExt(agRoot, pcibar, (bit32)CfgTblDWIdx + MAIN_FATAL_E… in mpiWaitForConfigTable()
3158 …config->FatalErrorDumpOffset1 = ossaHwRegReadExt(agRoot, pcibar, (bit32)CfgTblDWIdx + MAIN_FATAL_E… in mpiWaitForConfigTable()
3159 …config->FatalErrorDumpLength1 = ossaHwRegReadExt(agRoot, pcibar, (bit32)CfgTblDWIdx + MAIN_FATAL_E… in mpiWaitForConfigTable()
3161 SA_DBG1(("mpiWaitForConfigTable: Interface Revision value = 0x%08x\n", config->InterfaceRev)); in mpiWaitForConfigTable()
3162 SA_DBG1(("mpiWaitForConfigTable: FW Revision value = 0x%08x\n", config->FWRevision)); in mpiWaitForConfigTable()
3177 SA_DBG1(("mpiWaitForConfigTable: MaxOutstandingIO value = 0x%08x\n", config->MaxOutstandingIO)); in mpiWaitForConfigTable()
3178 SA_DBG1(("mpiWaitForConfigTable: MDevMaxSGL value = 0x%08x\n", config->MDevMaxSGL)); in mpiWaitForConfigTable()
3179 SA_DBG1(("mpiWaitForConfigTable: ContrlCapFlag value = 0x%08x\n", config->ContrlCapFlag)); in mpiWaitForConfigTable()
3180 SA_DBG1(("mpiWaitForConfigTable: GSTOffset value = 0x%08x\n", config->GSTOffset)); in mpiWaitForConfigTable()
3181 …SA_DBG1(("mpiWaitForConfigTable: inboundQueueOffset value = 0x%08x\n", config->inboundQueueOffset)… in mpiWaitForConfigTable()
3182 …SA_DBG1(("mpiWaitForConfigTable: outboundQueueOffset value = 0x%08x\n", config->outboundQueueOffse… in mpiWaitForConfigTable()
3183 …SA_DBG1(("mpiWaitForConfigTable: FatalErrorDumpOffset0 value = 0x%08x\n", config->FatalErrorDumpOf… in mpiWaitForConfigTable()
3184 …SA_DBG1(("mpiWaitForConfigTable: FatalErrorDumpLength0 value = 0x%08x\n", config->FatalErrorDumpLe… in mpiWaitForConfigTable()
3185 …SA_DBG1(("mpiWaitForConfigTable: FatalErrorDumpOffset1 value = 0x%08x\n", config->FatalErrorDumpOf… in mpiWaitForConfigTable()
3186 …SA_DBG1(("mpiWaitForConfigTable: FatalErrorDumpLength1 value = 0x%08x\n", config->FatalErrorDumpLe… in mpiWaitForConfigTable()
3189 SA_DBG1(("mpiWaitForConfigTable: HDAModeFlags value = 0x%08x\n", config->HDAModeFlags)); in mpiWaitForConfigTable()
3190 …SA_DBG1(("mpiWaitForConfigTable: analogSetupTblOffset value = 0x%08x\n", config->analogSetupTblOff… in mpiWaitForConfigTable()
3196 if (config->InterfaceRev != STSDK_LL_INTERFACE_VERSION) in mpiWaitForConfigTable()
3198 …x does not match InterfaceRev 0x%x warning!\n", STSDK_LL_INTERFACE_VERSION, config->InterfaceRev)); in mpiWaitForConfigTable()
3200 …if ((config->InterfaceRev & STSDK_LL_INTERFACE_VERSION_IGNORE_MASK) != (STSDK_LL_INTERFACE_VERSION… in mpiWaitForConfigTable()
3202 …ncompatible with InterfaceRev 0x%x warning!\n", STSDK_LL_INTERFACE_VERSION, config->InterfaceRev)); in mpiWaitForConfigTable()
3211 if (config->InterfaceRev != STSDK_LL_12G_INTERFACE_VERSION) in mpiWaitForConfigTable()
3213 …es not match InterfaceRev 0x%x warning!\n", STSDK_LL_12G_INTERFACE_VERSION, config->InterfaceRev)); in mpiWaitForConfigTable()
3215 …if ((config->InterfaceRev & STSDK_LL_INTERFACE_VERSION_IGNORE_MASK) != (STSDK_LL_12G_INTERFACE_VER… in mpiWaitForConfigTable()
3217 …patible with InterfaceRev 0x%x warning!\n", STSDK_LL_12G_INTERFACE_VERSION, config->InterfaceRev)); in mpiWaitForConfigTable()
3227 if (config->InterfaceRev != STSDK_LL_OLD_INTERFACE_VERSION) in mpiWaitForConfigTable()
3229 … compatible with InterfaceRev 0x%x warning!\n", STSDK_LL_INTERFACE_VERSION, config->InterfaceRev)); in mpiWaitForConfigTable()
3241 …itForConfigTable:6 sTSDK ver. sa.h 0x%08x config 0x%08x\n", STSDK_LL_VERSION, config->FWRevision)); in mpiWaitForConfigTable()
3243 if (config->FWRevision != MATCHING_V_FW_VERSION ) in mpiWaitForConfigTable()
3245 if (config->FWRevision > MATCHING_V_FW_VERSION) in mpiWaitForConfigTable()
3247 …DK ver. 0x%x hadn't tested with FW ver. 0x%08x warning!\n", STSDK_LL_VERSION, config->FWRevision)); in mpiWaitForConfigTable()
3251 else if (config->FWRevision < MIN_FW_SPCVE_VERSION_SUPPORTED) in mpiWaitForConfigTable()
3253 …K ver. 0x%x not compatible with FW ver. 0x%08x warning!\n", STSDK_LL_VERSION, config->FWRevision)); in mpiWaitForConfigTable()
3260 …: sTSDK ver. 0x%x mismatch with FW ver. 0x%08x warning!\n",STSDK_LL_VERSION , config->FWRevision)); in mpiWaitForConfigTable()
3266 …ConfigTable:12 sTSDK ver. sa.h 0x%08x config 0x%08x\n", STSDK_LL_12G_VERSION, config->FWRevision)); in mpiWaitForConfigTable()
3268 if (config->FWRevision != MATCHING_12G_V_FW_VERSION ) in mpiWaitForConfigTable()
3270 if (config->FWRevision > MATCHING_12G_V_FW_VERSION) in mpiWaitForConfigTable()
3272 …er. 0x%x hadn't tested with FW ver. 0x%08x warning!\n", STSDK_LL_12G_VERSION, config->FWRevision)); in mpiWaitForConfigTable()
3276 else if (config->FWRevision < MIN_FW_12G_SPCVE_VERSION_SUPPORTED) in mpiWaitForConfigTable()
3278 …r. 0x%x not compatible with FW ver. 0x%08x warning!\n", STSDK_LL_12G_VERSION, config->FWRevision)); in mpiWaitForConfigTable()
3285 …SDK ver. 0x%x mismatch with FW ver. 0x%08x warning!\n",STSDK_LL_12G_VERSION , config->FWRevision)); in mpiWaitForConfigTable()
3292 if (config->FWRevision != MATCHING_SPC_FW_VERSION ) in mpiWaitForConfigTable()
3294 if (config->FWRevision > MATCHING_SPC_FW_VERSION) in mpiWaitForConfigTable()
3296 …er. 0x%x hadn't tested with FW ver. 0x%08x warning!\n", STSDK_LL_SPC_VERSION, config->FWRevision)); in mpiWaitForConfigTable()
3299 else if (config->FWRevision < MIN_FW_SPC_VERSION_SUPPORTED) in mpiWaitForConfigTable()
3301 …r. 0x%x not compatible with FW ver. 0x%08x warning!\n", STSDK_LL_SPC_VERSION, config->FWRevision)); in mpiWaitForConfigTable()
3308 …SDK ver. 0x%x mismatch with FW ver. 0x%08x warning!\n",STSDK_LL_SPC_VERSION , config->FWRevision)); in mpiWaitForConfigTable()
3318 if (config->InterfaceRev > 0x301 ) in mpiWaitForConfigTable()
3327 if (config->InterfaceRev > 0x301 ) in mpiWaitForConfigTable()
3343 saRoot->ControllerInfo.signature = Signature; in mpiWaitForConfigTable()
3344 saRoot->ControllerInfo.fwInterfaceRev = config->InterfaceRev; in mpiWaitForConfigTable()
3348 saRoot->ControllerInfo.hwRevision = (ossaHwRegReadConfig32(agRoot,8) & 0xFF); in mpiWaitForConfigTable()
3349 SA_DBG1(("mpiWaitForConfigTable: hwRevision 0x%x\n",saRoot->ControllerInfo.hwRevision )); in mpiWaitForConfigTable()
3353 saRoot->ControllerInfo.hwRevision = SPC_READ_DEV_REV; in mpiWaitForConfigTable()
3356 saRoot->ControllerInfo.fwRevision = config->FWRevision; in mpiWaitForConfigTable()
3357 saRoot->ControllerInfo.ilaRevision = config->ilaRevision; in mpiWaitForConfigTable()
3358 saRoot->ControllerInfo.maxPendingIO = config->MaxOutstandingIO; in mpiWaitForConfigTable()
3359 saRoot->ControllerInfo.maxSgElements = config->MDevMaxSGL & 0xFFFF; in mpiWaitForConfigTable()
3360 saRoot->ControllerInfo.maxDevices = (config->MDevMaxSGL & MAX_DEV_BITS) >> SHIFT16; in mpiWaitForConfigTable()
3361 saRoot->ControllerInfo.queueSupport = config->ContrlCapFlag & Q_SUPPORT_BITS; in mpiWaitForConfigTable()
3362 saRoot->ControllerInfo.phyCount = (bit8)((config->ContrlCapFlag & PHY_COUNT_BITS) >> SHIFT19); in mpiWaitForConfigTable()
3363 saRoot->ControllerInfo.sasSpecsSupport = (config->ContrlCapFlag & SAS_SPEC_BITS) >> SHIFT25; in mpiWaitForConfigTable()
3364 …itForConfigTable: MaxOutstandingIO 0x%x swConfig->maxActiveIOs 0x%x\n", config->MaxOutstandingIO,s… in mpiWaitForConfigTable()
3368 ;/* SPCV - reserved field */ in mpiWaitForConfigTable()
3372 saRoot->ControllerInfo.controllerSetting = (bit8)config->HDAModeFlags; in mpiWaitForConfigTable()
3375 saRoot->ControllerInfo.sdkInterfaceRev = STSDK_LL_INTERFACE_VERSION; in mpiWaitForConfigTable()
3376 saRoot->ControllerInfo.sdkRevision = STSDK_LL_VERSION; in mpiWaitForConfigTable()
3377 saRoot->mainConfigTable.regDumpPCIBAR = pcibar; in mpiWaitForConfigTable()
3378 saRoot->mainConfigTable.FatalErrorDumpOffset0 = config->FatalErrorDumpOffset0; in mpiWaitForConfigTable()
3379 saRoot->mainConfigTable.FatalErrorDumpLength0 = config->FatalErrorDumpLength0; in mpiWaitForConfigTable()
3380 saRoot->mainConfigTable.FatalErrorDumpOffset1 = config->FatalErrorDumpOffset1; in mpiWaitForConfigTable()
3381 saRoot->mainConfigTable.FatalErrorDumpLength1 = config->FatalErrorDumpLength1; in mpiWaitForConfigTable()
3385 ;/* SPCV - reserved field */ in mpiWaitForConfigTable()
3389 saRoot->mainConfigTable.HDAModeFlags = config->HDAModeFlags; in mpiWaitForConfigTable()
3392 saRoot->mainConfigTable.analogSetupTblOffset = config->analogSetupTblOffset; in mpiWaitForConfigTable()
3396 saRoot->mainConfigTable.InterruptVecTblOffset = config->InterruptVecTblOffset; in mpiWaitForConfigTable()
3397 saRoot->mainConfigTable.phyAttributeTblOffset = config->phyAttributeTblOffset; in mpiWaitForConfigTable()
3398 saRoot->mainConfigTable.PortRecoveryTimerPortResetTimer = config->portRecoveryResetTimer; in mpiWaitForConfigTable()
3402 SA_DBG1(("mpiWaitForConfigTable: hwRevision = 0x%x\n", saRoot->ControllerInfo.hwRevision)); in mpiWaitForConfigTable()
3403 SA_DBG1(("mpiWaitForConfigTable: FW Revision = 0x%x\n", config->FWRevision)); in mpiWaitForConfigTable()
3404 SA_DBG1(("mpiWaitForConfigTable: Max Sgl = 0x%x\n", saRoot->ControllerInfo.maxSgElements)); in mpiWaitForConfigTable()
3405 SA_DBG1(("mpiWaitForConfigTable: Max Device = 0x%x\n", saRoot->ControllerInfo.maxDevices)); in mpiWaitForConfigTable()
3406 SA_DBG1(("mpiWaitForConfigTable: Queue Support = 0x%x\n", saRoot->ControllerInfo.queueSupport)); in mpiWaitForConfigTable()
3407 SA_DBG1(("mpiWaitForConfigTable: Phy Count = 0x%x\n", saRoot->ControllerInfo.phyCount)); in mpiWaitForConfigTable()
3408 …SA_DBG1(("mpiWaitForConfigTable: sas Specs Support = 0x%x\n", saRoot->ControllerInfo.sasSpecsSuppo… in mpiWaitForConfigTable()
3429 * AGSA_RC_SUCCESS if Un-initialize the configuration table sucessful
3430 * AGSA_RC_FAILURE if Un-initialize the configuration table failed
3476 } while ((value != togglevalue) && (max_wait_count -= WAIT_INCREMENT)); in mpiUnInitConfigTable()
3490 /* check the MPI-State for termination in progress */ in mpiUnInitConfigTable()
3510 } while (max_wait_count -= WAIT_INCREMENT); in mpiUnInitConfigTable()
3556 …ossaHwRegWriteExt(agRoot, pcibar, (bit32)(QueueTableOffset + IB_PROPERITY_OFFSET), inQueueCfg->ele… in mpiUpdateIBQueueCfgTable()
3557 …ossaHwRegWriteExt(agRoot, pcibar, (bit32)(QueueTableOffset + IB_BASE_ADDR_HI_OFFSET), inQueueCfg->… in mpiUpdateIBQueueCfgTable()
3558 …ossaHwRegWriteExt(agRoot, pcibar, (bit32)(QueueTableOffset + IB_BASE_ADDR_LO_OFFSET), inQueueCfg->… in mpiUpdateIBQueueCfgTable()
3559 …ot, pcibar, (bit32)(QueueTableOffset + IB_CI_BASE_ADDR_HI_OFFSET), inQueueCfg->ciUpperBaseAddress); in mpiUpdateIBQueueCfgTable()
3560 …ot, pcibar, (bit32)(QueueTableOffset + IB_CI_BASE_ADDR_LO_OFFSET), inQueueCfg->ciLowerBaseAddress); in mpiUpdateIBQueueCfgTable()
3563 …izeCount 0x%x\n",(bit32)(QueueTableOffset + IB_PROPERITY_OFFSET), inQueueCfg->elementPriSizeCount)… in mpiUpdateIBQueueCfgTable()
3564 …ress 0x%x\n",(bit32)(QueueTableOffset + IB_BASE_ADDR_HI_OFFSET), inQueueCfg->upperBaseAddress)); in mpiUpdateIBQueueCfgTable()
3565 …ress 0x%x\n",(bit32)(QueueTableOffset + IB_BASE_ADDR_LO_OFFSET), inQueueCfg->lowerBaseAddress)); in mpiUpdateIBQueueCfgTable()
3566 …s 0x%x\n",(bit32)(QueueTableOffset + IB_CI_BASE_ADDR_HI_OFFSET), inQueueCfg->ciUpperBaseAddress)); in mpiUpdateIBQueueCfgTable()
3567 …s 0x%x\n",(bit32)(QueueTableOffset + IB_CI_BASE_ADDR_LO_OFFSET), inQueueCfg->ciLowerBaseAddress)); in mpiUpdateIBQueueCfgTable()
3594 …ossaHwRegWriteExt(agRoot, pcibar, (bit32)(QueueTableOffset + OB_PROPERITY_OFFSET), outQueueCfg->el… in mpiUpdateOBQueueCfgTable()
3595 …agRoot, pcibar, (bit32)(QueueTableOffset + OB_BASE_ADDR_HI_OFFSET), outQueueCfg->upperBaseAddress); in mpiUpdateOBQueueCfgTable()
3596 …agRoot, pcibar, (bit32)(QueueTableOffset + OB_BASE_ADDR_LO_OFFSET), outQueueCfg->lowerBaseAddress); in mpiUpdateOBQueueCfgTable()
3597 …t, pcibar, (bit32)(QueueTableOffset + OB_PI_BASE_ADDR_HI_OFFSET), outQueueCfg->piUpperBaseAddress); in mpiUpdateOBQueueCfgTable()
3598 …t, pcibar, (bit32)(QueueTableOffset + OB_PI_BASE_ADDR_LO_OFFSET), outQueueCfg->piLowerBaseAddress); in mpiUpdateOBQueueCfgTable()
3599 … pcibar, (bit32)(QueueTableOffset + OB_INTERRUPT_COALES_OFFSET), outQueueCfg->interruptVecCntDelay… in mpiUpdateOBQueueCfgTable()
3601 …Count 0x%x\n",(bit32)(QueueTableOffset + OB_PROPERITY_OFFSET), outQueueCfg->elementSizeCount)); in mpiUpdateOBQueueCfgTable()
3602 …ss 0x%x\n",(bit32)(QueueTableOffset + OB_BASE_ADDR_HI_OFFSET), outQueueCfg->upperBaseAddress)); in mpiUpdateOBQueueCfgTable()
3603 …ss 0x%x\n",(bit32)(QueueTableOffset + OB_BASE_ADDR_LO_OFFSET), outQueueCfg->lowerBaseAddress)); in mpiUpdateOBQueueCfgTable()
3604 … 0x%x\n",(bit32)(QueueTableOffset + OB_PI_BASE_ADDR_HI_OFFSET), outQueueCfg->piUpperBaseAddress)); in mpiUpdateOBQueueCfgTable()
3605 … 0x%x\n",(bit32)(QueueTableOffset + OB_PI_BASE_ADDR_LO_OFFSET), outQueueCfg->piLowerBaseAddress)); in mpiUpdateOBQueueCfgTable()
3606 … 0x%x\n",(bit32)(QueueTableOffset + OB_INTERRUPT_COALES_OFFSET), outQueueCfg->interruptVecCntDelay… in mpiUpdateOBQueueCfgTable()
3656 * \param pciBar - PCI BAR
3733 …mpiGSTable->GSTLenMPIS = ossaHwRegReadExt(agRoot, pcibar, (bit32)(GSTableOffset + GST_GSTLEN_MPIS_… in mpiReadGSTable()
3734 …mpiGSTable->IQFreezeState0 = ossaHwRegReadExt(agRoot, pcibar, (bit32)(GSTableOffset + GST_IQ_FREEZ… in mpiReadGSTable()
3735 …mpiGSTable->IQFreezeState1 = ossaHwRegReadExt(agRoot, pcibar, (bit32)(GSTableOffset + GST_IQ_FREEZ… in mpiReadGSTable()
3736 …mpiGSTable->MsguTcnt = ossaHwRegReadExt(agRoot, pcibar, (bit32)(GSTableOffset + GST_MSGUTCNT… in mpiReadGSTable()
3737 …mpiGSTable->IopTcnt = ossaHwRegReadExt(agRoot, pcibar, (bit32)(GSTableOffset + GST_IOPTCNT_… in mpiReadGSTable()
3738 …mpiGSTable->Iop1Tcnt = ossaHwRegReadExt(agRoot, pcibar, (bit32)(GSTableOffset + GST_IOP1TCNT… in mpiReadGSTable()
3740 SA_DBG4(("mpiReadGSTable: GSTLenMPIS 0x%x\n", mpiGSTable->GSTLenMPIS)); in mpiReadGSTable()
3741 SA_DBG4(("mpiReadGSTable: GSTLen 0x%x\n", (mpiGSTable->GSTLenMPIS & 0xfff8) >> SHIFT3)); in mpiReadGSTable()
3742 SA_DBG4(("mpiReadGSTable: IQFreezeState0 0x%x\n", mpiGSTable->IQFreezeState0)); in mpiReadGSTable()
3743 SA_DBG4(("mpiReadGSTable: IQFreezeState1 0x%x\n", mpiGSTable->IQFreezeState1)); in mpiReadGSTable()
3744 SA_DBG4(("mpiReadGSTable: MsguTcnt 0x%x\n", mpiGSTable->MsguTcnt)); in mpiReadGSTable()
3745 SA_DBG4(("mpiReadGSTable: IopTcnt 0x%x\n", mpiGSTable->IopTcnt)); in mpiReadGSTable()
3746 SA_DBG4(("mpiReadGSTable: Iop1Tcnt 0x%x\n", mpiGSTable->Iop1Tcnt)); in mpiReadGSTable()
3757 …mpiGSTable->PhyState[i] = ossaHwRegReadExt(agRoot, pcibar, (bit32)(TableOffset + i * sizeof(phyAtt… in mpiReadGSTable()
3758 SA_DBG4(("mpiReadGSTable: PhyState[0x%x] 0x%x\n", i, mpiGSTable->PhyState[i])); in mpiReadGSTable()
3765 …mpiGSTable->PhyState[i] = ossaHwRegReadExt(agRoot, pcibar, (bit32)(GSTableOffset + GST_PHYSTATE_OF… in mpiReadGSTable()
3766 SA_DBG4(("mpiReadGSTable: PhyState[0x%x] 0x%x\n", i, mpiGSTable->PhyState[i])); in mpiReadGSTable()
3770 …mpiGSTable->GPIOpins = ossaHwRegReadExt(agRoot, pcibar, (bit32)(GSTableOffset + GST_GPIO_PINS_OFFS… in mpiReadGSTable()
3771 SA_DBG4(("mpiReadGSTable: GPIOpins 0x%x\n", mpiGSTable->GPIOpins)); in mpiReadGSTable()
3775 …mpiGSTable->recoverErrInfo[i] = ossaHwRegReadExt(agRoot, pcibar, (bit32)(GSTableOffset + GST_RERRI… in mpiReadGSTable()
3776 SA_DBG4(("mpiReadGSTable: recoverErrInfo[0x%x] 0x%x\n", i, mpiGSTable->recoverErrInfo[i])); in mpiReadGSTable()
3820 saRoot = (agsaLLRoot_t *) (memoryAllocated->agMemory[LLROOT_MEM_INDEX].virtPtr); in siInitResources()
3821 agRoot->sdkData = (void *) saRoot; in siInitResources()
3825 saRoot->deviceLinkMem = memoryAllocated->agMemory[DEVICELINK_MEM_INDEX]; in siInitResources()
3826 si_memset(saRoot->deviceLinkMem.virtPtr, 0, saRoot->deviceLinkMem.totalLength); in siInitResources()
3827 …SA_DBG2(("siInitResources: [%d] saRoot->deviceLinkMem VirtPtr=%p PhysicalLo=%x Count=%x Total=%x t… in siInitResources()
3829 saRoot->deviceLinkMem.virtPtr, in siInitResources()
3830 saRoot->deviceLinkMem.phyAddrLower, in siInitResources()
3831 saRoot->deviceLinkMem.numElements, in siInitResources()
3832 saRoot->deviceLinkMem.totalLength, in siInitResources()
3833 saRoot->deviceLinkMem.type)); in siInitResources()
3835 maxNumIODevices = swConfig->numDevHandles; in siInitResources()
3836 SA_DBG2(("siInitResources: maxNumIODevices=%d, swConfig->numDevHandles=%d \n", in siInitResources()
3838 swConfig->numDevHandles)); in siInitResources()
3841 saLlistInitialize(&(saRoot->freeDevicesList)); in siInitResources()
3845 pDeviceDesc = (agsaDeviceDesc_t *) AGSAMEM_ELEMENT_READ(&(saRoot->deviceLinkMem), i); in siInitResources()
3847 saLlinkInitialize(&(pDeviceDesc->linkNode)); in siInitResources()
3849 pDeviceDesc->initiatorDevHandle.osData = agNULL; in siInitResources()
3850 pDeviceDesc->initiatorDevHandle.sdkData = agNULL; in siInitResources()
3851 pDeviceDesc->targetDevHandle.osData = agNULL; in siInitResources()
3852 pDeviceDesc->targetDevHandle.sdkData = agNULL; in siInitResources()
3853 pDeviceDesc->deviceType = SAS_SATA_UNKNOWN_DEVICE; in siInitResources()
3854 pDeviceDesc->pPort = agNULL; in siInitResources()
3855 pDeviceDesc->DeviceMapIndex = 0; in siInitResources()
3857 saLlistInitialize(&(pDeviceDesc->pendingIORequests)); in siInitResources()
3860 saLlistAdd(&(saRoot->freeDevicesList), &(pDeviceDesc->linkNode)); in siInitResources()
3865 saRoot->IORequestMem = memoryAllocated->agMemory[IOREQLINK_MEM_INDEX]; in siInitResources()
3866 si_memset(saRoot->IORequestMem.virtPtr, 0, saRoot->IORequestMem.totalLength); in siInitResources()
3868 …SA_DBG2(("siInitResources: [%d] saRoot->IORequestMem VirtPtr=%p PhysicalLo=%x Count=%x Total=%x t… in siInitResources()
3870 saRoot->IORequestMem.virtPtr, in siInitResources()
3871 saRoot->IORequestMem.phyAddrLower, in siInitResources()
3872 saRoot->IORequestMem.numElements, in siInitResources()
3873 saRoot->IORequestMem.totalLength, in siInitResources()
3874 saRoot->IORequestMem.type)); in siInitResources()
3877 saLlistIOInitialize(&(saRoot->freeIORequests)); in siInitResources()
3878 saLlistIOInitialize(&(saRoot->freeReservedRequests)); in siInitResources()
3879 for ( i = 0; i < swConfig->maxActiveIOs; i ++ ) in siInitResources()
3882 pRequestDesc = (agsaIORequestDesc_t *) AGSAMEM_ELEMENT_READ(&(saRoot->IORequestMem), i); in siInitResources()
3884 saLlinkIOInitialize(&(pRequestDesc->linkNode)); in siInitResources()
3886 pRequestDesc->valid = agFALSE; in siInitResources()
3887 pRequestDesc->requestType = AGSA_REQ_TYPE_UNKNOWN; in siInitResources()
3888 pRequestDesc->pIORequestContext = agNULL; in siInitResources()
3889 pRequestDesc->HTag = i; in siInitResources()
3890 pRequestDesc->pDevice = agNULL; in siInitResources()
3891 pRequestDesc->pPort = agNULL; in siInitResources()
3896 if(saLlistIOGetCount(&(saRoot->freeReservedRequests)) < SA_RESERVED_REQUEST_COUNT) in siInitResources()
3898 saLlistIOAdd(&(saRoot->freeReservedRequests), &(pRequestDesc->linkNode)); in siInitResources()
3902 saLlistIOAdd(&(saRoot->freeIORequests), &(pRequestDesc->linkNode)); in siInitResources()
3909 saRoot->timerLinkMem = memoryAllocated->agMemory[TIMERLINK_MEM_INDEX]; in siInitResources()
3910 si_memset(saRoot->timerLinkMem.virtPtr, 0, saRoot->timerLinkMem.totalLength); in siInitResources()
3911 …SA_DBG2(("siInitResources: [%d] saRoot->timerLinkMem VirtPtr=%p PhysicalLo=%x Count=%x Total=%x t… in siInitResources()
3913 saRoot->timerLinkMem.virtPtr, in siInitResources()
3914 saRoot->timerLinkMem.phyAddrLower, in siInitResources()
3915 saRoot->timerLinkMem.numElements, in siInitResources()
3916 saRoot->timerLinkMem.totalLength, in siInitResources()
3917 saRoot->timerLinkMem.type)); in siInitResources()
3920 saLlistInitialize(&(saRoot->freeTimers)); in siInitResources()
3924 pTimerDesc = (agsaTimerDesc_t *) AGSAMEM_ELEMENT_READ(&(saRoot->timerLinkMem), i); in siInitResources()
3926 saLlinkInitialize(&(pTimerDesc->linkNode)); in siInitResources()
3928 pTimerDesc->valid = agFALSE; in siInitResources()
3929 pTimerDesc->timeoutTick = 0; in siInitResources()
3930 pTimerDesc->pfnTimeout = agNULL; in siInitResources()
3931 pTimerDesc->Event = 0; in siInitResources()
3932 pTimerDesc->pParm = agNULL; in siInitResources()
3935 saLlistAdd(&(saRoot->freeTimers), &(pTimerDesc->linkNode)); in siInitResources()
3938 saLlistInitialize(&(saRoot->validTimers)); in siInitResources()
3942 saRoot->phyCount = (bit8) hwConfig->phyCount; in siInitResources()
3944 for ( i = 0; i < saRoot->phyCount; i ++ ) in siInitResources()
3946 saRoot->phys[i].pPort = agNULL; in siInitResources()
3947 saRoot->phys[i].phyId = (bit8) i; in siInitResources()
3950 PHY_STATUS_SET(&(saRoot->phys[i]), PHY_STOPPED); in siInitResources()
3955 saRoot->portCount = saRoot->phyCount; in siInitResources()
3957 saLlistInitialize(&(saRoot->freePorts)); in siInitResources()
3958 for ( i = 0; i < saRoot->portCount; i ++ ) in siInitResources()
3961 pPort = &(saRoot->ports[i]); in siInitResources()
3963 saLlinkInitialize(&(pPort->linkNode)); in siInitResources()
3965 pPort->portContext.osData = agNULL; in siInitResources()
3966 pPort->portContext.sdkData = pPort; in siInitResources()
3967 pPort->portId = 0; in siInitResources()
3968 pPort->portIdx = (bit8) i; in siInitResources()
3969 pPort->status = PORT_NORMAL; in siInitResources()
3971 for ( j = 0; j < saRoot->phyCount; j ++ ) in siInitResources()
3973 pPort->phyMap[j] = agFALSE; in siInitResources()
3976 saLlistInitialize(&(pPort->listSASATADevices)); in siInitResources()
3979 saLlistAdd(&(saRoot->freePorts), &(pPort->linkNode)); in siInitResources()
3982 saLlistInitialize(&(saRoot->validPorts)); in siInitResources()
3985 saRoot->sysIntsActive = agFALSE; in siInitResources()
3988 saRoot->usecsPerTick = usecsPerTick; in siInitResources()
3991 saRoot->timeTick = 0; in siInitResources()
3994 saRoot->DeviceRegistrationCB = agNULL; in siInitResources()
3995 saRoot->DeviceDeregistrationCB = agNULL; in siInitResources()
3998 for ( i = 0; i < saRoot->portCount; i ++ ) in siInitResources()
4000 pPortMap = &(saRoot->PortMap[i]); in siInitResources()
4002 pPortMap->PortContext = agNULL; in siInitResources()
4003 pPortMap->PortID = PORT_MARK_OFF; in siInitResources()
4004 pPortMap->PortStatus = PORT_NORMAL; in siInitResources()
4005 saRoot->autoDeregDeviceflag[i] = 0; in siInitResources()
4011 pDeviceMap = &(saRoot->DeviceMap[i]); in siInitResources()
4013 pDeviceMap->DeviceHandle = agNULL; in siInitResources()
4014 pDeviceMap->DeviceIdFromFW = i; in siInitResources()
4020 pIOMap = &(saRoot->IOMap[i]); in siInitResources()
4022 pIOMap->IORequest = agNULL; in siInitResources()
4023 pIOMap->Tag = MARK_OFF; in siInitResources()
4027 for (i = 0; i < saRoot->QueueConfig.numInboundQueues; i ++) in siInitResources()
4029 if(0 != saRoot->inboundQueue[i].numElements) in siInitResources()
4031 circularIQ = &saRoot->inboundQueue[i]; in siInitResources()
4032 si_memset(circularIQ->memoryRegion.virtPtr, 0, circularIQ->memoryRegion.totalLength); in siInitResources()
4033 si_memset(saRoot->inboundQueue[i].ciPointer, 0, sizeof(bit32)); in siInitResources()
4037 for (i = 0; i < saRoot->QueueConfig.numOutboundQueues; i ++) in siInitResources()
4039 if(0 != saRoot->outboundQueue[i].numElements) in siInitResources()
4041 circularOQ = &saRoot->outboundQueue[i]; in siInitResources()
4042 si_memset(circularOQ->memoryRegion.virtPtr, 0, circularOQ->memoryRegion.totalLength); in siInitResources()
4043 si_memset(saRoot->outboundQueue[i].piPointer, 0, sizeof(bit32)); in siInitResources()
4044 circularOQ->producerIdx = 0; in siInitResources()
4045 circularOQ->consumerIdx = 0; in siInitResources()
4046 …iInitResource: Q %d Clean PI 0x%03x CI 0x%03x\n", i,circularOQ->producerIdx, circularOQ->consumer… in siInitResources()
4090 …mpiCALTable->spaReg0 = ossaHwRegReadExt(agRoot, pcibar, (bit32)(CALTableOffset + TX_PORT_CFG1_OFFS… in mpiReadCALTable()
4091 …mpiCALTable->spaReg1 = ossaHwRegReadExt(agRoot, pcibar, (bit32)(CALTableOffset + TX_PORT_CFG2_OFFS… in mpiReadCALTable()
4092 …mpiCALTable->spaReg2 = ossaHwRegReadExt(agRoot, pcibar, (bit32)(CALTableOffset + TX_PORT_CFG3_OFFS… in mpiReadCALTable()
4093 mpiCALTable->spaReg3 = ossaHwRegReadExt(agRoot, pcibar, (bit32)(CALTableOffset + TX_CFG_OFFSET)); in mpiReadCALTable()
4094 …mpiCALTable->spaReg4 = ossaHwRegReadExt(agRoot, pcibar, (bit32)(CALTableOffset + RV_PORT_CFG1_OFFS… in mpiReadCALTable()
4095 …mpiCALTable->spaReg5 = ossaHwRegReadExt(agRoot, pcibar, (bit32)(CALTableOffset + RV_PORT_CFG2_OFFS… in mpiReadCALTable()
4096 mpiCALTable->spaReg6 = ossaHwRegReadExt(agRoot, pcibar, (bit32)(CALTableOffset + RV_CFG1_OFFSET)); in mpiReadCALTable()
4097 mpiCALTable->spaReg7 = ossaHwRegReadExt(agRoot, pcibar, (bit32)(CALTableOffset + RV_CFG2_OFFSET)); in mpiReadCALTable()
4099 SA_DBG3(("mpiReadCALTable: spaReg0 0x%x\n", mpiCALTable->spaReg0)); in mpiReadCALTable()
4100 SA_DBG3(("mpiReadCALTable: spaReg1 0x%x\n", mpiCALTable->spaReg1)); in mpiReadCALTable()
4101 SA_DBG3(("mpiReadCALTable: spaReg2 0x%x\n", mpiCALTable->spaReg2)); in mpiReadCALTable()
4102 SA_DBG3(("mpiReadCALTable: spaReg3 0x%x\n", mpiCALTable->spaReg3)); in mpiReadCALTable()
4103 SA_DBG3(("mpiReadCALTable: spaReg4 0x%x\n", mpiCALTable->spaReg4)); in mpiReadCALTable()
4104 SA_DBG3(("mpiReadCALTable: spaReg5 0x%x\n", mpiCALTable->spaReg5)); in mpiReadCALTable()
4105 SA_DBG3(("mpiReadCALTable: spaReg6 0x%x\n", mpiCALTable->spaReg6)); in mpiReadCALTable()
4106 SA_DBG3(("mpiReadCALTable: spaReg7 0x%x\n", mpiCALTable->spaReg7)); in mpiReadCALTable()
4148 …ossaHwRegWriteExt(agRoot, pcibar, (bit32)(CALTableOffset + TX_PORT_CFG1_OFFSET), mpiCALTable->spaR… in mpiWriteCALTable()
4149 …ossaHwRegWriteExt(agRoot, pcibar, (bit32)(CALTableOffset + TX_PORT_CFG2_OFFSET), mpiCALTable->spaR… in mpiWriteCALTable()
4150 …ossaHwRegWriteExt(agRoot, pcibar, (bit32)(CALTableOffset + TX_PORT_CFG3_OFFSET), mpiCALTable->spaR… in mpiWriteCALTable()
4151 …ossaHwRegWriteExt(agRoot, pcibar, (bit32)(CALTableOffset + TX_CFG_OFFSET), mpiCALTable->spaR… in mpiWriteCALTable()
4152 …ossaHwRegWriteExt(agRoot, pcibar, (bit32)(CALTableOffset + RV_PORT_CFG1_OFFSET), mpiCALTable->spaR… in mpiWriteCALTable()
4153 …ossaHwRegWriteExt(agRoot, pcibar, (bit32)(CALTableOffset + RV_PORT_CFG2_OFFSET), mpiCALTable->spaR… in mpiWriteCALTable()
4154 …ossaHwRegWriteExt(agRoot, pcibar, (bit32)(CALTableOffset + RV_CFG1_OFFSET), mpiCALTable->spaR… in mpiWriteCALTable()
4155 …ossaHwRegWriteExt(agRoot, pcibar, (bit32)(CALTableOffset + RV_CFG2_OFFSET), mpiCALTable->spaR… in mpiWriteCALTable()
4157 …eOffset + TX_PORT_CFG1_OFFSET), mpiCALTable->spaReg0, mpiCALTable->spaReg1, mpiCALTable->spaReg2, … in mpiWriteCALTable()
4158 …eOffset + RV_PORT_CFG1_OFFSET), mpiCALTable->spaReg4, mpiCALTable->spaReg5, mpiCALTable->spaReg6, … in mpiWriteCALTable()
4188 mpiWriteCALTable(agRoot, (spc_SPASTable_t *)&mpiCALTable->phyAnalogSetupRegisters[i], i); in mpiWriteCALAll()
4212 // config->phyAnalogConfig.phyAnalogSetupRegisters[0].spaRegister0 = 0; in mpiWrAnalogSetupTable()
4219 …ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 0 ),config->phyAnalo… in mpiWrAnalogSetupTable()
4220 …ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 4 ),config->phyAnalo… in mpiWrAnalogSetupTable()
4221 …ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 8 ),config->phyAnalo… in mpiWrAnalogSetupTable()
4222 …ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 12),config->phyAnalo… in mpiWrAnalogSetupTable()
4223 …ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 16),config->phyAnalo… in mpiWrAnalogSetupTable()
4224 …ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 20),config->phyAnalo… in mpiWrAnalogSetupTable()
4225 …ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 24),config->phyAnalo… in mpiWrAnalogSetupTable()
4226 …ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 28),config->phyAnalo… in mpiWrAnalogSetupTable()
4227 …ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 32),config->phyAnalo… in mpiWrAnalogSetupTable()
4228 …ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 36),config->phyAnalo… in mpiWrAnalogSetupTable()
4230 …x%x 0x%x\n",phy, (bit32) AnalogTableBase+ (AnalogtableSize * phy) + 0,config->phyAnalogConfig.phyA… in mpiWrAnalogSetupTable()
4231 …x%x 0x%x\n",phy, (bit32) AnalogTableBase+ (AnalogtableSize * phy) + 4,config->phyAnalogConfig.phyA… in mpiWrAnalogSetupTable()
4232 …er2 0x%x\n",phy, (bit32) AnalogTableBase+ (AnalogtableSize * phy) + 8,config->phyAnalogConfig.phyA… in mpiWrAnalogSetupTable()
4233 …er3 0x%x\n",phy, (bit32) AnalogTableBase+ (AnalogtableSize * phy) +12,config->phyAnalogConfig.phyA… in mpiWrAnalogSetupTable()
4234 …er4 0x%x\n",phy, (bit32) AnalogTableBase+ (AnalogtableSize * phy) +16,config->phyAnalogConfig.phyA… in mpiWrAnalogSetupTable()
4235 …er5 0x%x\n",phy, (bit32) AnalogTableBase+ (AnalogtableSize * phy) +20,config->phyAnalogConfig.phyA… in mpiWrAnalogSetupTable()
4236 …er6 0x%x\n",phy, (bit32) AnalogTableBase+ (AnalogtableSize * phy) +24,config->phyAnalogConfig.phyA… in mpiWrAnalogSetupTable()
4237 …er7 0x%x\n",phy, (bit32) AnalogTableBase+ (AnalogtableSize * phy) +28,config->phyAnalogConfig.phyA… in mpiWrAnalogSetupTable()
4238 …er8 0x%x\n",phy, (bit32) AnalogTableBase+ (AnalogtableSize * phy) +32,config->phyAnalogConfig.phyA… in mpiWrAnalogSetupTable()
4239 …er9 0x%x\n",phy, (bit32) AnalogTableBase+ (AnalogtableSize * phy) +36,config->phyAnalogConfig.phyA… in mpiWrAnalogSetupTable()
4275 if( config->outboundQueues[obq].interruptVector == i ) in mpiWrIntVecTable()
4287 …ValuetoWrite = (( config->outboundQueues[obq].interruptDelay << SHIFT15) | config->outboundQueues[… in mpiWrIntVecTable()
4292 … config->outboundQueues[i].interruptDelay, config->outboundQueues[i].interruptThreshold )); in mpiWrIntVecTable()
4337 …ossaHwRegWriteExt(agRoot, pcibar, (bit32)(PHYTableOffset + i * sizeof(phyAttrb_t)), phyAttrib->phy… in mpiWrPhyAttrbTable()
4339 …ribute 0x%x\n",i,(bit32)(PHYTableOffset + i * sizeof(phyAttrb_t)), phyAttrib->phyAttribute[i].phyE… in mpiWrPhyAttrbTable()
4358 * \param bitMapQueueNum0 bit map for inbound queue number 0 - 31 to freeze
4359 * \param bitMapQueueNum1 bit map for inbound queue number 32 - 63 to freeze
4362 * AGSA_RC_SUCCESS if Un-initialize the configuration table sucessful
4363 * AGSA_RC_FAILURE if Un-initialize the configuration table failed
4405 /* Read Inbound DoorBell Register - for RevB */ in mpiFreezeInboundQueue()
4409 } while ((value != togglevalue) && (max_wait_count -= WAIT_INCREMENT)); in mpiFreezeInboundQueue()
4425 * \param bitMapQueueNum0 bit map for inbound queue number 0 - 31 to freeze
4426 * \param bitMapQueueNum1 bit map for inbound queue number 32 - 63 to freeze
4429 * AGSA_RC_SUCCESS if Un-initialize the configuration table sucessful
4430 * AGSA_RC_FAILURE if Un-initialize the configuration table failed
4446 /* update the inbound queue number to HOST_SCRATCH_PAD1 register - for queue 0 to 31 */ in mpiUnFreezeInboundQueue()
4454 /* update the inbound queue number to HOST_SCRATCH_PAD2 register - for queue 32 to 63 */ in mpiUnFreezeInboundQueue()
4469 /* Read Inbound DoorBell Register - for RevB */ in mpiUnFreezeInboundQueue()
4472 } while ((value != togglevalue) && (max_wait_count -= WAIT_INCREMENT)); in mpiUnFreezeInboundQueue()
4517 …PAD1 & SCRATCH_PAD1_V_ILA_MASK) != SCRATCH_PAD1_V_ILA_MASK) && (max_wait_count -= WAIT_INCREMENT)); in si_check_V_Ready()
4531 …D1 & SCRATCH_PAD1_V_RAAE_MASK) != SCRATCH_PAD1_V_RAAE_MASK) && (max_wait_count -= WAIT_INCREMENT)); in si_check_V_Ready()
4546 …D1 & SCRATCH_PAD1_V_IOP0_MASK) != SCRATCH_PAD1_V_IOP0_MASK) && (max_wait_count -= WAIT_INCREMENT)); in si_check_V_Ready()
4562 …D1 & SCRATCH_PAD1_V_IOP1_MASK) != SCRATCH_PAD1_V_IOP1_MASK) && (max_wait_count -= WAIT_INCREMENT)); in si_check_V_Ready()