Lines Matching +full:pci +full:- +full:dev
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
35 /* some PCI bus constants */
37 #define PCI_MAXMAPS_1 2 /* max. no. of maps for PCI to PCI bridge */
42 /* Config registers for PCI-PCI and PCI-Cardbus bridges. */
51 /* Interesting values for PCI power management */
53 uint16_t pp_cap; /* PCI power management capabilities */
87 /* Interesting values for PCI MSI */
97 /* Interesting values for PCI MSI-X */
105 u_int mte_vector; /* 1-based index into msix_vectors array. */
111 uint8_t msix_location; /* Offset of MSI-X capability registers. */
131 uint8_t ht_slave; /* Non-zero if device is an HT slave. */
137 /* Interesting values for PCI-express */
139 uint8_t pcie_location; /* Offset of PCI-e capability registers. */
153 uint8_t pcix_location; /* Offset of PCI-X capability registers. */
174 #define PCICFG_VF 0x0001 /* Device is an SR-IOV Virtual Function */
178 device_t dev; /* device which owns this */ member
187 uint16_t cmdreg; /* disable/enable chip and PCI options */
188 uint16_t statreg; /* supported PCI features and error state */
190 uint8_t baseclass; /* chip PCI class */
191 uint8_t subclass; /* chip PCI subclass */
192 uint8_t progif; /* chip PCI programming interface */
197 uint8_t intpin; /* PCI interrupt pin */
204 uint8_t mfdev; /* multi-function device (from hdrtype reg) */
205 uint8_t nummaps; /* actual number of PCI maps used */
207 uint32_t domain; /* PCI domain */
217 struct pcicfg_msi msi; /* PCI MSI */
218 struct pcicfg_msix msix; /* PCI MSI-X */
220 struct pcicfg_pcie pcie; /* PCI Express */
221 struct pcicfg_pcix pcix; /* PCI-X */
222 struct pcicfg_iov *iov; /* SR-IOV */
223 struct pcicfg_vf vf; /* SR-IOV Virtual Function */
227 /* additional type 1 device config header information (PCI to PCI bridge) */
266 * modules with devices on the PCI bus.
320 MODULE_PNP_INFO(PCI_PNP_STR, pci, table, table, \
367 * Simplified accessors for pci devices
370 __BUS_ACCESSOR(pci, var, PCI, ivar, type)
400 pci_read_config(device_t dev, int reg, int width) in PCI_ACCESSOR()
402 return PCI_READ_CONFIG(device_get_parent(dev), dev, reg, width); in PCI_ACCESSOR()
406 pci_write_config(device_t dev, int reg, uint32_t val, int width) in pci_write_config() argument
408 PCI_WRITE_CONFIG(device_get_parent(dev), dev, reg, val, width); in pci_write_config()
412 * Ivars for pci bridges.
430 * PCI interrupt validation. Invalid interrupt values such as 0 or 128 in PCIB_ACCESSOR()
444 pci_enable_busmaster(device_t dev) in PCIB_ACCESSOR()
446 return(PCI_ENABLE_BUSMASTER(device_get_parent(dev), dev)); in PCIB_ACCESSOR()
450 pci_disable_busmaster(device_t dev) in pci_disable_busmaster() argument
452 return(PCI_DISABLE_BUSMASTER(device_get_parent(dev), dev)); in pci_disable_busmaster()
456 pci_enable_io(device_t dev, int space) in pci_enable_io() argument
458 return(PCI_ENABLE_IO(device_get_parent(dev), dev, space)); in pci_enable_io()
462 pci_disable_io(device_t dev, int space) in pci_disable_io() argument
464 return(PCI_DISABLE_IO(device_get_parent(dev), dev, space)); in pci_disable_io()
468 pci_get_vpd_ident(device_t dev, const char **identptr) in pci_get_vpd_ident() argument
470 return(PCI_GET_VPD_IDENT(device_get_parent(dev), dev, identptr)); in pci_get_vpd_ident()
474 pci_get_vpd_readonly(device_t dev, const char *kw, const char **vptr) in pci_get_vpd_readonly() argument
476 return(PCI_GET_VPD_READONLY(device_get_parent(dev), dev, kw, vptr)); in pci_get_vpd_readonly()
498 * PCI power states are as defined by ACPI:
502 * D1 Class-specific low-power state in which device context may or may not
505 * D2 Class-specific low-power state in which device context may or may
521 #define PCI_POWERSTATE_UNKNOWN -1
534 pci_set_powerstate(device_t dev, int state) in pci_set_powerstate() argument
536 return PCI_SET_POWERSTATE(device_get_parent(dev), dev, state); in pci_set_powerstate()
540 pci_get_powerstate(device_t dev) in pci_get_powerstate() argument
542 return PCI_GET_POWERSTATE(device_get_parent(dev), dev); in pci_get_powerstate()
546 pci_find_cap(device_t dev, int capability, int *capreg) in pci_find_cap() argument
548 return (PCI_FIND_CAP(device_get_parent(dev), dev, capability, capreg)); in pci_find_cap()
552 pci_find_next_cap(device_t dev, int capability, int start, int *capreg) in pci_find_next_cap() argument
554 return (PCI_FIND_NEXT_CAP(device_get_parent(dev), dev, capability, start, in pci_find_next_cap()
559 pci_find_extcap(device_t dev, int capability, int *capreg) in pci_find_extcap() argument
561 return (PCI_FIND_EXTCAP(device_get_parent(dev), dev, capability, capreg)); in pci_find_extcap()
565 pci_find_next_extcap(device_t dev, int capability, int start, int *capreg) in pci_find_next_extcap() argument
567 return (PCI_FIND_NEXT_EXTCAP(device_get_parent(dev), dev, capability, in pci_find_next_extcap()
572 pci_find_htcap(device_t dev, int capability, int *capreg) in pci_find_htcap() argument
574 return (PCI_FIND_HTCAP(device_get_parent(dev), dev, capability, capreg)); in pci_find_htcap()
578 pci_find_next_htcap(device_t dev, int capability, int start, int *capreg) in pci_find_next_htcap() argument
580 return (PCI_FIND_NEXT_HTCAP(device_get_parent(dev), dev, capability, in pci_find_next_htcap()
585 pci_alloc_msi(device_t dev, int *count) in pci_alloc_msi() argument
587 return (PCI_ALLOC_MSI(device_get_parent(dev), dev, count)); in pci_alloc_msi()
591 pci_alloc_msix(device_t dev, int *count) in pci_alloc_msix() argument
593 return (PCI_ALLOC_MSIX(device_get_parent(dev), dev, count)); in pci_alloc_msix()
597 pci_enable_msi(device_t dev, uint64_t address, uint16_t data) in pci_enable_msi() argument
599 PCI_ENABLE_MSI(device_get_parent(dev), dev, address, data); in pci_enable_msi()
603 pci_enable_msix(device_t dev, u_int index, uint64_t address, uint32_t data) in pci_enable_msix() argument
605 PCI_ENABLE_MSIX(device_get_parent(dev), dev, index, address, data); in pci_enable_msix()
609 pci_disable_msi(device_t dev) in pci_disable_msi() argument
611 PCI_DISABLE_MSI(device_get_parent(dev), dev); in pci_disable_msi()
615 pci_remap_msix(device_t dev, int count, const u_int *vectors) in pci_remap_msix() argument
617 return (PCI_REMAP_MSIX(device_get_parent(dev), dev, count, vectors)); in pci_remap_msix()
621 pci_release_msi(device_t dev) in pci_release_msi() argument
623 return (PCI_RELEASE_MSI(device_get_parent(dev), dev)); in pci_release_msi()
627 pci_msi_count(device_t dev) in pci_msi_count() argument
629 return (PCI_MSI_COUNT(device_get_parent(dev), dev)); in pci_msi_count()
633 pci_msix_count(device_t dev) in pci_msix_count() argument
635 return (PCI_MSIX_COUNT(device_get_parent(dev), dev)); in pci_msix_count()
639 pci_msix_pba_bar(device_t dev) in pci_msix_pba_bar() argument
641 return (PCI_MSIX_PBA_BAR(device_get_parent(dev), dev)); in pci_msix_pba_bar()
645 pci_msix_table_bar(device_t dev) in pci_msix_table_bar() argument
647 return (PCI_MSIX_TABLE_BAR(device_get_parent(dev), dev)); in pci_msix_table_bar()
651 pci_get_id(device_t dev, enum pci_id_type type, uintptr_t *id) in pci_get_id() argument
653 return (PCI_GET_ID(device_get_parent(dev), dev, type, id)); in pci_get_id()
662 pci_get_rid(device_t dev) in pci_get_rid() argument
666 if (pci_get_id(dev, PCI_ID_RID, &rid) != 0) in pci_get_rid()
673 pci_child_added(device_t dev) in pci_child_added() argument
676 return (PCI_CHILD_ADDED(device_get_parent(dev), dev)); in pci_child_added()
686 /* Can be used by drivers to manage the MSI-X table. */
687 int pci_pending_msix(device_t dev, u_int index);
689 int pci_msi_device_blacklisted(device_t dev);
690 int pci_msix_device_blacklisted(device_t dev);
692 void pci_ht_map_msi(device_t dev, uint64_t addr);
694 device_t pci_find_pcie_root_port(device_t dev);
695 int pci_get_relaxed_ordering_enabled(device_t dev);
696 int pci_get_max_payload(device_t dev);
697 int pci_get_max_read_req(device_t dev);
698 void pci_restore_state(device_t dev);
699 void pci_save_state(device_t dev);
700 int pci_set_max_read_req(device_t dev, int size);
701 int pci_power_reset(device_t dev);
702 void pci_clear_pme(device_t dev);
703 void pci_enable_pme(device_t dev);
704 bool pci_has_pm(device_t dev);
705 uint32_t pcie_read_config(device_t dev, int reg, int width);
706 void pcie_write_config(device_t dev, int reg, uint32_t value, int width);
707 uint32_t pcie_adjust_config(device_t dev, int reg, uint32_t mask,
709 void pcie_apei_error(device_t dev, int sev, uint8_t *aer);
710 bool pcie_flr(device_t dev, u_int max_delay, bool force);
711 int pcie_get_max_completion_timeout(device_t dev);
712 bool pcie_wait_for_pending_transactions(device_t dev, u_int max_delay);
720 * cdev switch for control device, initialised in generic PCI code
725 * List of all PCI devices, generation count for the list.
732 struct pci_map *pci_find_bar(device_t dev, int reg);
733 struct pci_map *pci_first_bar(device_t dev);
735 int pci_bar_enabled(device_t dev, struct pci_map *pm);
736 struct pcicfg_vpd *pci_fetch_vpd_list(device_t dev);
741 int vga_pci_is_boot_display(device_t dev);
742 void * vga_pci_map_bios(device_t dev, size_t *size);
743 void vga_pci_unmap_bios(device_t dev, void *bios);
744 int vga_pci_repost(device_t dev);
747 * Global eventhandlers invoked when PCI devices are added or removed
750 typedef void (*pci_event_fn)(void *arg, device_t dev);