Lines Matching +full:msi +full:- +full:base
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
42 /* Config registers for PCI-PCI and PCI-Cardbus bridges. */
78 uint8_t vpd_reg; /* base register, + 2 for addr, + 4 data */
87 /* Interesting values for PCI MSI */
90 uint8_t msi_location; /* Offset of MSI capability registers. */
97 /* Interesting values for PCI MSI-X */
105 u_int mte_vector; /* 1-based index into msix_vectors array. */
111 uint8_t msix_location; /* Offset of MSI-X capability registers. */
131 uint8_t ht_slave; /* Non-zero if device is an HT slave. */
132 uint8_t ht_msimap; /* Offset of MSI mapping cap registers. */
133 uint16_t ht_msictrl; /* MSI mapping control */
134 uint64_t ht_msiaddr; /* MSI mapping base address */
137 /* Interesting values for PCI-express */
139 uint8_t pcie_location; /* Offset of PCI-e capability registers. */
153 uint8_t pcix_location; /* Offset of PCI-X capability registers. */
174 #define PCICFG_VF 0x0001 /* Device is an SR-IOV Virtual Function */
204 uint8_t mfdev; /* multi-function device (from hdrtype reg) */
217 struct pcicfg_msi msi; /* PCI MSI */ member
218 struct pcicfg_msix msix; /* PCI MSI-X */
221 struct pcicfg_pcix pcix; /* PCI-X */
222 struct pcicfg_iov *iov; /* SR-IOV */
223 struct pcicfg_vf vf; /* SR-IOV Virtual Function */
230 pci_addr_t pmembase; /* base address of prefetchable memory */
232 uint32_t membase; /* base address of memory window */
234 uint32_t iobase; /* base address of port window */
244 uint32_t membase0; /* base address of memory window */
246 uint32_t membase1; /* base address of memory window */
248 uint32_t iobase0; /* base address of port window */
250 uint32_t iobase1; /* base address of port window */
252 uint32_t pccardif; /* PC Card 16bit IF legacy more base addr. */
502 * D1 Class-specific low-power state in which device context may or may not
505 * D2 Class-specific low-power state in which device context may or may
521 #define PCI_POWERSTATE_UNKNOWN -1
686 /* Can be used by drivers to manage the MSI-X table. */