Lines Matching +full:full +full:- +full:bridge

1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
37 #define	PCI_MAXMAPS_1	2	/* max. no. of maps for PCI to PCI bridge */
38 #define	PCI_MAXMAPS_2	1	/* max. no. of maps for CardBus bridge */
42 /* Config registers for PCI-PCI and PCI-Cardbus bridges. */
97 /* Interesting values for PCI MSI-X */
105     u_int	mte_vector;	/* 1-based index into msix_vectors array. */
111     uint8_t	msix_location;	/* Offset of MSI-X capability registers. */
131     uint8_t	ht_slave;	/* Non-zero if device is an HT slave. */
137 /* Interesting values for PCI-express */
139     uint8_t	pcie_location;	/* Offset of PCI-e capability registers. */
153     uint8_t	pcix_location;	/* Offset of PCI-X capability registers. */
174 #define	PCICFG_VF	0x0001 /* Device is an SR-IOV Virtual Function */
204     uint8_t	mfdev;		/* multi-function device (from hdrtype reg) */
214     struct pcicfg_bridge bridge; /* Bridges */  member
218     struct pcicfg_msix msix;	/* PCI MSI-X */
221     struct pcicfg_pcix pcix;	/* PCI-X */
222     struct pcicfg_iov *iov;	/* SR-IOV */
223     struct pcicfg_vf vf;	/* SR-IOV Virtual Function */
227 /* additional type 1 device config header information (PCI to PCI bridge) */
237     uint16_t	bridgectl;	/* bridge control register */
241 /* additional type 2 device config header information (CardBus bridge) */
254     uint16_t	bridgectl;	/* bridge control register */
500  * D0	  State in which device is on and running.  It is receiving full
501  *	  power from the system and delivering full functionality to the user.
502  * D1	  Class-specific low-power state in which device context may or may not
505  * D2	  Class-specific low-power state in which device context may or may
521 #define	PCI_POWERSTATE_UNKNOWN	-1
686 /* Can be used by drivers to manage the MSI-X table. */