Lines Matching +full:mem +full:- +full:base
1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
147 "Clear firmware-assigned resources for PCI-PCI bridge I/O windows.");
151 * sub-allocated from one of our window resource managers.
158 if (rman_is_region_manager(r, &sc->io.rman))
159 return (&sc->io);
164 rman_is_region_manager(r, &sc->pmem.rman))
165 return (&sc->pmem);
166 if (rman_is_region_manager(r, &sc->mem.rman))
167 return (&sc->mem);
174 * Is a resource from a child device sub-allocated from one of our
182 return (rman_is_region_manager(r, &sc->bus.rman));
190 return (pw->valid && pw->base < pw->limit);
203 PCI_ENABLE_IO(device_get_parent(sc->dev), sc->dev, type);
212 dev = sc->dev;
213 if (sc->io.valid && mask & WIN_IO) {
217 sc->io.base >> 16, 2);
219 sc->io.limit >> 16, 2);
221 pci_write_config(dev, PCIR_IOBASEL_1, sc->io.base >> 8, 1);
222 pci_write_config(dev, PCIR_IOLIMITL_1, sc->io.limit >> 8, 1);
226 pci_write_config(dev, PCIR_MEMBASE_1, sc->mem.base >> 16, 2);
227 pci_write_config(dev, PCIR_MEMLIMIT_1, sc->mem.limit >> 16, 2);
230 if (sc->pmem.valid && mask & WIN_PMEM) {
234 sc->pmem.base >> 32, 4);
236 sc->pmem.limit >> 32, 4);
238 pci_write_config(dev, PCIR_PMBASEL_1, sc->pmem.base >> 16, 2);
239 pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmem.limit >> 16, 2);
253 if (!(sc->bridgectl & PCIB_BCR_ISA_ENABLE))
257 if (start + count - 1 != end)
264 /* Check for overlap with 0x000 - 0x0ff as a special case. */
282 device_printf(sc->dev,
283 "I/O range %#jx-%#jx overlaps with an ISA alias\n", start,
295 newarray = malloc(sizeof(struct resource *) * (w->count + count),
297 if (w->res != NULL)
298 bcopy(w->res, newarray, sizeof(struct resource *) * w->count);
299 bcopy(res, newarray + w->count, sizeof(struct resource *) * count);
300 free(w->res, M_DEVBUF);
301 w->res = newarray;
302 w->count += count;
305 error = rman_manage_region(&w->rman, rman_get_start(res[i]),
322 * of the next non-alias range. As a special case, addresses
323 * in the range 0x000 - 0x0ff should also be skipped since
368 if (as->error != 0)
371 w = &as->sc->io;
372 rid = w->reg;
374 device_printf(as->sc->dev,
375 "allocating non-ISA range %#jx-%#jx\n", start, end);
376 as->res[as->count] = bus_alloc_resource(as->sc->dev, SYS_RES_IOPORT,
377 &rid, start, end, end - start + 1, RF_ACTIVE | RF_UNMAPPED);
378 if (as->res[as->count] == NULL)
379 as->error = ENXIO;
381 as->count++;
403 bus_release_resource(sc->dev, SYS_RES_IOPORT,
404 sc->io.reg, as.res[i]);
411 pcib_add_window_resources(&sc->io, as.res, as.count);
426 w->rman.rm_start = 0;
427 w->rman.rm_end = max_address;
428 w->rman.rm_type = RMAN_ARRAY;
430 device_get_nameunit(sc->dev), w->name);
431 w->rman.rm_descr = strdup(buf, M_DEVBUF);
432 error = rman_init(&w->rman);
435 device_get_nameunit(sc->dev), w->name);
440 if (w->base > max_address || w->limit > max_address) {
441 device_printf(sc->dev,
442 "initial %s window has too many bits, ignoring\n", w->name);
445 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE)
446 (void)pcib_alloc_nonisa_ranges(sc, w->base, w->limit);
448 rid = w->reg;
449 res = bus_alloc_resource(sc->dev, type, &rid, w->base, w->limit,
450 w->limit - w->base + 1, flags | RF_ACTIVE | RF_UNMAPPED);
454 if (w->res == NULL) {
455 device_printf(sc->dev,
456 "failed to allocate initial %s window: %#jx-%#jx\n",
457 w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
458 w->base = max_address;
459 w->limit = 0;
460 pcib_write_windows(sc, w->mask);
476 dev = sc->dev;
486 * If 'val' is zero, then only 16-bits of I/O space
491 sc->io.valid = 1;
495 sc->io.valid = 1;
498 if (sc->io.valid) {
499 sc->io.reg = PCIR_IOBASEL_1;
500 sc->io.step = 12;
501 sc->io.mask = WIN_IO;
502 sc->io.name = "I/O port";
504 sc->io.base = PCI_PPBIOBASE(
506 sc->io.limit = PCI_PPBIOLIMIT(
511 sc->io.base = PCI_PPBIOBASE(0, val);
512 sc->io.limit = PCI_PPBIOLIMIT(0,
516 pcib_alloc_window(sc, &sc->io, SYS_RES_IOPORT, 0, max);
520 sc->mem.valid = 1;
521 sc->mem.reg = PCIR_MEMBASE_1;
522 sc->mem.step = 20;
523 sc->mem.mask = WIN_MEM;
524 sc->mem.name = "memory";
525 sc->mem.base = PCI_PPBMEMBASE(0,
527 sc->mem.limit = PCI_PPBMEMLIMIT(0,
529 pcib_alloc_window(sc, &sc->mem, SYS_RES_MEMORY, 0, 0xffffffff);
535 * If 'val' is zero, then only 32-bits of memory space
540 sc->pmem.valid = 1;
544 sc->pmem.valid = 1;
547 if (sc->pmem.valid) {
548 sc->pmem.reg = PCIR_PMBASEL_1;
549 sc->pmem.step = 20;
550 sc->pmem.mask = WIN_PMEM;
551 sc->pmem.name = "prefetch";
553 sc->pmem.base = PCI_PPBMEMBASE(
555 sc->pmem.limit = PCI_PPBMEMLIMIT(
560 sc->pmem.base = PCI_PPBMEMBASE(0, val);
561 sc->pmem.limit = PCI_PPBMEMLIMIT(0,
565 pcib_alloc_window(sc, &sc->pmem, SYS_RES_MEMORY,
576 if (!w->valid)
579 dev = sc->dev;
580 error = rman_fini(&w->rman);
582 device_printf(dev, "failed to release %s rman\n", w->name);
585 free(__DECONST(char *, w->rman.rm_descr), M_DEVBUF);
587 for (i = 0; i < w->count; i++) {
588 error = bus_free_resource(dev, type, w->res[i]);
591 "failed to release %s resource: %d\n", w->name,
594 free(w->res, M_DEVBUF);
601 pcib_release_window(sc, &sc->pmem, SYS_RES_MEMORY);
602 pcib_release_window(sc, &sc->mem, SYS_RES_MEMORY);
603 pcib_release_window(sc, &sc->io, SYS_RES_IOPORT);
621 bus->sub_reg = PCIR_SUBBUS_1;
625 bus->sub_reg = PCIR_SUBBUS_2;
630 bus->sec = pci_read_config(dev, sec_reg, 1);
631 bus->sub = pci_read_config(dev, bus->sub_reg, 1);
632 bus->dev = dev;
633 bus->rman.rm_start = 0;
634 bus->rman.rm_end = PCI_BUSMAX;
635 bus->rman.rm_type = RMAN_ARRAY;
637 bus->rman.rm_descr = strdup(buf, M_DEVBUF);
638 error = rman_init(&bus->rman);
648 bus->res = bus_alloc_resource_anywhere(dev, PCI_RES_BUS, &rid,
650 if (bus->res == NULL) {
655 bus->res = bus_alloc_resource_anywhere(dev, PCI_RES_BUS, &rid,
657 } else if (rman_get_size(bus->res) < min_count)
662 (void)bus_adjust_resource(dev, PCI_RES_BUS, bus->res,
663 rman_get_start(bus->res), rman_get_start(bus->res) +
664 min_count - 1);
669 if (bus->res != NULL) {
670 error = rman_manage_region(&bus->rman, rman_get_start(bus->res),
671 rman_get_end(bus->res));
674 bus->sec = rman_get_start(bus->res);
675 bus->sub = rman_get_end(bus->res);
684 error = rman_fini(&bus->rman);
689 free(__DECONST(char *, bus->rman.rm_descr), M_DEVBUF);
691 error = bus_free_resource(dev, PCI_RES_BUS, bus->res);
703 res = rman_reserve_resource(&bus->rman, start, end, count, flags,
709 device_printf(bus->dev,
710 "allocated bus range (%ju-%ju) for rid %d of %s\n",
729 old_end = rman_get_end(bus->res);
731 error = bus_adjust_resource(bus->dev, PCI_RES_BUS, bus->res,
732 rman_get_start(bus->res), new_end);
736 device_printf(bus->dev, "grew bus range to %ju-%ju\n",
737 rman_get_start(bus->res), rman_get_end(bus->res));
738 error = rman_manage_region(&bus->rman, old_end + 1,
739 rman_get_end(bus->res));
742 bus->sub = rman_get_end(bus->res);
743 pci_write_config(bus->dev, bus->sub_reg, bus->sub, 1);
767 if (rman_last_free_region(&bus->rman, &start_free, &end_free) != 0 ||
768 end_free != bus->sub)
769 start_free = bus->sub + 1;
772 new_end = start_free + count - 1;
783 device_printf(bus->dev,
785 printf("\tback candidate range: %ju-%ju\n", start_free,
796 * PCI-express HotPlug support.
801 "Enable support for native PCI-express HotPlug.");
815 dev = sc->dev;
822 sc->pcie_slot_cap = pcie_read_config(dev, PCIER_SLOT_CAP, 4);
824 if ((sc->pcie_slot_cap & PCIEM_SLOT_CAP_HPC) == 0)
839 if ((sc->pcie_slot_cap & PCIEM_SLOT_CAP_MRLSP) != 0) {
858 sc->flags |= PCIB_HOTPLUG;
875 dev = sc->dev;
877 if (sc->flags & PCIB_HOTPLUG_CMD_PENDING)
885 device_printf(dev, "HotPlug command: %04x -> %04x\n", ctl, new);
887 if (!(sc->pcie_slot_cap & PCIEM_SLOT_CAP_NCCS) &&
889 sc->flags |= PCIB_HOTPLUG_CMD_PENDING;
892 &sc->pcie_cc_task, hz);
901 dev = sc->dev;
905 if (!(sc->flags & PCIB_HOTPLUG_CMD_PENDING))
907 taskqueue_cancel_timeout(taskqueue_pci_hp, &sc->pcie_cc_task, NULL);
908 sc->flags &= ~PCIB_HOTPLUG_CMD_PENDING;
922 if (sc->flags & PCIB_DETACHING)
926 if ((sc->pcie_slot_sta & PCIEM_SLOT_STA_PDS) == 0)
930 if (sc->pcie_slot_sta & PCIEM_SLOT_STA_PFD)
934 if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_MRLSP &&
935 (sc->pcie_slot_sta & PCIEM_SLOT_STA_MRLSS) != 0)
942 * Returns -1 if the card is fully inserted, powered, and ready for
954 if (!(sc->pcie_link_sta & PCIEM_LINK_STA_DL_ACTIVE))
957 return (-1);
963 "Enable support for PCI-express Electromechanical Interlock.");
972 if ((sc->pcie_slot_sta & (PCIEM_SLOT_STA_PDC | PCIEM_SLOT_STA_PDS)) ==
974 sc->flags &= ~PCIB_DETACHING;
979 if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_PIP) {
983 else if (sc->flags & PCIB_DETACH_PENDING)
990 if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_PCP) {
1004 if ((sc->pcie_slot_cap & PCIEM_SLOT_CAP_EIP) &&
1007 ei_engaged = (sc->pcie_slot_sta & PCIEM_SLOT_STA_EIS) != 0;
1019 !(sc->pcie_link_sta & PCIEM_LINK_STA_DL_ACTIVE) &&
1020 sc->pcie_slot_sta &
1023 device_printf(sc->dev,
1027 &sc->pcie_dll_task, hz);
1028 } else if (sc->pcie_link_sta & PCIEM_LINK_STA_DL_ACTIVE)
1029 taskqueue_cancel_timeout(taskqueue_pci_hp, &sc->pcie_dll_task,
1040 (pcib_hotplug_present(sc) != 0) != (sc->child != NULL))
1041 taskqueue_enqueue(taskqueue_pci_hp, &sc->pcie_hp_task);
1052 dev = sc->dev;
1054 old_slot_sta = sc->pcie_slot_sta;
1055 sc->pcie_slot_sta = pcie_read_config(dev, PCIER_SLOT_STA, 2);
1058 pcie_write_config(dev, PCIER_SLOT_STA, sc->pcie_slot_sta, 2);
1062 sc->pcie_slot_sta);
1064 if (sc->pcie_slot_sta & PCIEM_SLOT_STA_ABP) {
1065 if (sc->flags & PCIB_DETACH_PENDING) {
1068 sc->flags &= ~PCIB_DETACH_PENDING;
1070 &sc->pcie_ab_task, NULL);
1075 sc->flags |= PCIB_DETACH_PENDING;
1077 &sc->pcie_ab_task, 5 * hz);
1080 if (sc->pcie_slot_sta & PCIEM_SLOT_STA_PFD)
1082 if (sc->pcie_slot_sta & PCIEM_SLOT_STA_MRLSC)
1084 sc->pcie_slot_sta & PCIEM_SLOT_STA_MRLSS ? "open" :
1086 if (bootverbose && sc->pcie_slot_sta & PCIEM_SLOT_STA_PDC)
1088 sc->pcie_slot_sta & PCIEM_SLOT_STA_PDS ? "card present" :
1090 if (sc->pcie_slot_sta & PCIEM_SLOT_STA_CC)
1092 if (sc->pcie_slot_sta & PCIEM_SLOT_STA_DLLSC) {
1093 sc->pcie_link_sta = pcie_read_config(dev, PCIER_LINK_STA, 2);
1097 sc->pcie_link_sta & PCIEM_LINK_STA_DL_ACTIVE ?
1113 dev = sc->dev;
1115 if (sc->child == NULL) {
1116 sc->child = device_add_child(dev, "pci", DEVICE_UNIT_ANY);
1120 if (sc->child != NULL) {
1121 if (device_delete_child(dev, sc->child) == 0)
1122 sc->child = NULL;
1134 if (sc->flags & PCIB_DETACH_PENDING) {
1135 sc->flags |= PCIB_DETACHING;
1136 sc->flags &= ~PCIB_DETACH_PENDING;
1146 device_t dev = sc->dev;
1153 sc->flags &= ~PCIB_HOTPLUG_CMD_PENDING;
1166 device_t dev = sc->dev;
1174 sc->flags |= PCIB_DETACHING;
1176 } else if (sta != sc->pcie_link_sta) {
1190 rid = -1;
1191 dev = sc->dev;
1194 * For simplicity, only use MSI-X if there is a single message.
1201 sc->pcie_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
1203 if (sc->pcie_mem == NULL) {
1205 "Failed to allocate BAR for MSI-X table\n");
1223 sc->pcie_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
1225 if (sc->pcie_irq == NULL) {
1227 "Failed to allocate interrupt for PCI-e events\n");
1233 error = bus_setup_intr(dev, sc->pcie_irq, INTR_TYPE_MISC|INTR_MPSAFE,
1234 NULL, pcib_pcie_intr_hotplug, sc, &sc->pcie_ihand);
1236 device_printf(dev, "Failed to setup PCI-e interrupt handler\n");
1237 bus_release_resource(dev, SYS_RES_IRQ, rid, sc->pcie_irq);
1251 dev = sc->dev;
1252 error = bus_teardown_intr(dev, sc->pcie_irq, sc->pcie_ihand);
1255 error = bus_free_resource(dev, SYS_RES_IRQ, sc->pcie_irq);
1261 if (sc->pcie_mem != NULL)
1262 error = bus_free_resource(dev, SYS_RES_MEMORY, sc->pcie_mem);
1272 dev = sc->dev;
1273 TASK_INIT(&sc->pcie_hp_task, 0, pcib_pcie_hotplug_task, sc);
1274 TIMEOUT_TASK_INIT(taskqueue_pci_hp, &sc->pcie_ab_task, 0,
1276 TIMEOUT_TASK_INIT(taskqueue_pci_hp, &sc->pcie_cc_task, 0,
1278 TIMEOUT_TASK_INIT(taskqueue_pci_hp, &sc->pcie_dll_task, 0,
1280 sc->pcie_hp_lock = bus_topo_mtx();
1286 sc->pcie_link_sta = pcie_read_config(dev, PCIER_LINK_STA, 2);
1287 sc->pcie_slot_sta = pcie_read_config(dev, PCIER_SLOT_STA, 2);
1290 pcie_write_config(dev, PCIER_SLOT_STA, sc->pcie_slot_sta, 2);
1297 if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_APB)
1299 if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_PCP)
1301 if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_MRLSP)
1303 if (!(sc->pcie_slot_cap & PCIEM_SLOT_CAP_NCCS))
1307 if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_AIP) {
1322 if (sc->flags & PCIB_DETACH_PENDING) {
1323 sc->flags &= ~PCIB_DETACH_PENDING;
1324 taskqueue_cancel_timeout(taskqueue_pci_hp, &sc->pcie_ab_task,
1327 sc->flags |= PCIB_DETACHING;
1329 if (sc->flags & PCIB_HOTPLUG_CMD_PENDING) {
1330 taskqueue_cancel_timeout(taskqueue_pci_hp, &sc->pcie_cc_task,
1333 sc->flags &= ~PCIB_HOTPLUG_CMD_PENDING;
1343 if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_AIP) {
1353 taskqueue_drain(taskqueue_pci_hp, &sc->pcie_hp_task);
1354 taskqueue_drain_timeout(taskqueue_pci_hp, &sc->pcie_ab_task);
1355 taskqueue_drain_timeout(taskqueue_pci_hp, &sc->pcie_cc_task);
1356 taskqueue_drain_timeout(taskqueue_pci_hp, &sc->pcie_dll_task);
1378 device_set_desc(dev, "PCI-PCI bridge");
1379 return(-10000);
1393 sc->dev = dev;
1398 sc->domain = pci_get_domain(dev);
1399 sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2);
1405 sc->pribus = pci_get_bus(dev);
1406 pci_write_config(dev, PCIR_PRIBUS_1, sc->pribus, 1);
1414 CTLFLAG_RD, &sc->domain, 0, "Domain number");
1416 CTLFLAG_RD, &sc->pribus, 0, "Primary bus number");
1418 CTLFLAG_RD, &sc->bus.sec, 0, "Secondary bus number");
1420 CTLFLAG_RD, &sc->bus.sub, 0, "Subordinate bus number");
1427 * The i82380FB mobile docking controller is a PCI-PCI bridge,
1436 sc->flags |= PCIB_SUBTRACTIVE;
1441 sc->flags |= PCIB_DISABLE_MSI;
1444 sc->flags |= PCIB_DISABLE_MSIX;
1447 * Intel 815, 845 and other chipsets say they are PCI-PCI bridges,
1449 * BA/CA/DB and E) PCI bridges are HUB-PCI bridges, in Intelese.
1456 sc->flags |= PCIB_SUBTRACTIVE;
1461 pcib_setup_secbus(dev, &sc->bus, 1);
1464 if (sc->flags & PCIB_HOTPLUG)
1468 device_printf(dev, " domain %d\n", sc->domain);
1469 device_printf(dev, " secondary bus %d\n", sc->bus.sec);
1470 device_printf(dev, " subordinate bus %d\n", sc->bus.sub);
1471 if (pcib_is_window_open(&sc->io))
1472 device_printf(dev, " I/O decode 0x%jx-0x%jx\n",
1473 (uintmax_t)sc->io.base, (uintmax_t)sc->io.limit);
1474 if (pcib_is_window_open(&sc->mem))
1475 device_printf(dev, " memory decode 0x%jx-0x%jx\n",
1476 (uintmax_t)sc->mem.base, (uintmax_t)sc->mem.limit);
1477 if (pcib_is_window_open(&sc->pmem))
1478 device_printf(dev, " prefetched decode 0x%jx-0x%jx\n",
1479 (uintmax_t)sc->pmem.base, (uintmax_t)sc->pmem.limit);
1480 if (sc->bridgectl & (PCIB_BCR_ISA_ENABLE | PCIB_BCR_VGA_ENABLE) ||
1481 sc->flags & PCIB_SUBTRACTIVE) {
1484 if (sc->bridgectl & PCIB_BCR_ISA_ENABLE) {
1488 if (sc->bridgectl & PCIB_BCR_VGA_ENABLE) {
1492 if (sc->flags & PCIB_SUBTRACTIVE)
1511 if (sc->flags & PCIB_HOTPLUG)
1523 if (sc->bus.sec == 0) {
1535 sc->child = device_add_child(dev, "pci", DEVICE_UNIT_ANY);
1558 if (sc->flags & PCIB_HOTPLUG) {
1568 pcib_free_secbus(dev, &sc->bus);
1609 if (retval != 0 && sc->flags & PCIB_HOTPLUG)
1624 *result = sc->domain;
1627 *result = sc->bus.sec;
1660 res = rman_reserve_resource(&w->rman, start, end, count,
1666 device_printf(sc->dev,
1667 "allocated %s range (%#jx-%#jx) for rid %x of %s\n",
1668 w->name, rman_get_start(res), rman_get_end(res), *rid,
1689 rman_res_t base, limit, wmask;
1697 * was larger than the non-aliased range size of 0x100 our
1701 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
1703 for (base = 0xf000; (long)base >= 0; base -= 0x1000) {
1704 limit = base + 0xfff;
1709 * window that overlaps are the non-alias
1710 * ranges within [base, limit], so this isn't
1713 if (start + count > limit - 0x400)
1715 if (base == 0) {
1718 * 0 is 0x400-0x4ff.
1720 if (end - count + 1 < 0x400)
1723 if (end - count + 1 < base)
1727 if (pcib_alloc_nonisa_ranges(sc, base, limit) == 0) {
1728 w->base = base;
1729 w->limit = limit;
1736 wmask = ((rman_res_t)1 << w->step) - 1;
1737 if (RF_ALIGNMENT(flags) < w->step) {
1739 flags |= RF_ALIGNMENT_LOG2(w->step);
1743 count = roundup2(count, (rman_res_t)1 << w->step);
1744 rid = w->reg;
1745 res = bus_alloc_resource(sc->dev, type, &rid, start, end, count,
1751 w->base = rman_get_start(res);
1752 w->limit = rman_get_end(res);
1756 /* Try to expand an existing window to the requested base and limit. */
1759 rman_res_t base, rman_res_t limit)
1764 KASSERT(base <= w->base && limit >= w->limit,
1771 KASSERT(limit == w->limit || base == w->base,
1776 * window behind an ISA-enabled bridge. Since I/O windows
1782 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
1783 (limit <= 65535 || (base <= 65535 && base != w->base))) {
1784 KASSERT(limit == w->limit || limit <= 65535,
1787 if (base != w->base)
1788 error = pcib_alloc_nonisa_ranges(sc, base, w->base - 1);
1790 error = pcib_alloc_nonisa_ranges(sc, w->limit + 1,
1793 w->base = base;
1794 w->limit = limit;
1801 * but for an ISA-enabled bridge we might be growing the I/O window
1805 for (i = 0; i < w->count; i++) {
1806 if (rman_get_end(w->res[i]) == w->limit)
1809 KASSERT(i != w->count, ("did not find existing resource"));
1810 res = w->res[i];
1814 * existing range. The one exception is the ISA-enabled case
1818 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
1819 w->base <= 65535) {
1824 KASSERT(w->base == rman_get_start(res),
1829 error = bus_adjust_resource(sc->dev, type, res, force_64k_base ?
1830 rman_get_start(res) : base, limit);
1835 if (w->base != base) {
1836 error = rman_manage_region(&w->rman, base, w->base - 1);
1837 w->base = base;
1839 error = rman_manage_region(&w->rman, w->limit + 1, limit);
1840 w->limit = limit;
1844 device_printf(sc->dev,
1845 "failed to expand %s resource manager\n", w->name);
1846 (void)bus_adjust_resource(sc->dev, type, res, force_64k_base ?
1847 rman_get_start(res) : w->base, w->limit);
1869 if (!w->valid)
1871 if (sc->bridgectl & PCIB_BCR_ISA_ENABLE && count > 0x100 &&
1874 if (end > w->rman.rm_end)
1875 end = w->rman.rm_end;
1876 if (start + count - 1 > end || start + count < start)
1878 wmask = ((rman_res_t)1 << w->step) - 1;
1884 if (w->res == NULL) {
1889 device_printf(sc->dev,
1890 "failed to allocate initial %s window (%#jx-%#jx,%#jx)\n",
1891 w->name, start, end, count);
1895 device_printf(sc->dev,
1896 "allocated initial %s window of %#jx-%#jx\n",
1897 w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
1914 * non-alias ranges when it is grown in either direction.
1916 * XXX: Special case: if w->res is completely empty and the
1917 * request size is larger than w->res, we should find the
1918 * optimal aligned buffer containing w->res and allocate that.
1921 device_printf(sc->dev,
1922 "attempting to grow %s window for (%#jx-%#jx,%#jx)\n",
1923 w->name, start, end, count);
1925 if (start < w->base) {
1926 if (rman_first_free_region(&w->rman, &start_free, &end_free) !=
1927 0 || start_free != w->base)
1928 end_free = w->base;
1933 end_free &= ~(align - 1);
1934 end_free--;
1935 front = end_free - (count - 1);
1946 printf("\tfront candidate range: %#jx-%#jx\n",
1949 front = w->base - front;
1954 if (end > w->limit) {
1955 if (rman_last_free_region(&w->rman, &start_free, &end_free) !=
1956 0 || end_free != w->limit)
1957 start_free = w->limit + 1;
1963 back = start_free + count - 1;
1974 printf("\tback candidate range: %#jx-%#jx\n",
1977 back -= w->limit;
1990 error = pcib_expand_window(sc, w, type, w->base - front,
1991 w->limit);
1996 error = pcib_expand_window(sc, w, type, w->base,
1997 w->limit + back);
2007 device_printf(sc->dev, "grew %s window to %#jx-%#jx\n",
2008 w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
2012 KASSERT((w->base & wmask) == 0, ("start address is not aligned"));
2013 KASSERT((w->limit & wmask) == wmask, ("end address is not aligned"));
2014 pcib_write_windows(sc, w->mask);
2038 if (sc->bridgectl & PCIB_BCR_VGA_ENABLE)
2047 return (pcib_alloc_subbus(&sc->bus, child, rid, start, end,
2052 r = pcib_suballoc_resource(sc, &sc->io, child, type, rid, start,
2054 if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0)
2056 if (pcib_grow_window(sc, &sc->io, type, start, end, count,
2058 r = pcib_suballoc_resource(sc, &sc->io, child, type,
2071 r = pcib_suballoc_resource(sc, &sc->pmem, child, type,
2076 r = pcib_suballoc_resource(sc, &sc->mem, child, type, rid,
2078 if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0)
2081 if (pcib_grow_window(sc, &sc->pmem, type, start, end,
2083 r = pcib_suballoc_resource(sc, &sc->pmem, child,
2089 if (pcib_grow_window(sc, &sc->mem, type, start, end, count,
2091 r = pcib_suballoc_resource(sc, &sc->mem, child, type,
2103 if (sc->flags & PCIB_SUBTRACTIVE && r == NULL)
2122 * If the resource wasn't sub-allocated from one of our region
2130 * If our bus range isn't big enough to grow the sub-allocation
2136 if (start >= sc->bus.sec && end > sc->bus.sub) {
2137 error = pcib_grow_subbus(&sc->bus, end);
2148 ("%s: no window for resource (%#jx-%#jx) type %d",
2152 * If our window isn't big enough to grow the sub-allocation
2155 if (start < w->base || end > w->limit) {
2156 wmask = ((rman_res_t)1 << w->step) - 1;
2158 MIN(start & ~wmask, w->base),
2159 MAX(end | wmask, w->limit));
2163 device_printf(sc->dev,
2164 "grew %s window to %#jx-%#jx\n",
2165 w->name, (uintmax_t)w->base,
2166 (uintmax_t)w->limit);
2167 pcib_write_windows(sc, w->mask);
2246 for (int i = 0; i < w->count; i++) {
2247 if (rman_get_start(w->res[i]) <= rman_get_start(r) &&
2248 rman_get_end(w->res[i]) >= rman_get_end(r))
2249 return (w->res[i]);
2282 args.offset = start - rman_get_start(pres);
2307 * to the non-ARI slot/function. The downstream port will convert it back in
2319 if (sc->flags & PCIB_ENABLE_ARI) {
2321 ("Non-zero slot number with ARI enabled!"));
2332 ctl2 = pci_read_config(sc->dev, pcie_pos + PCIER_DEVICE_CTL2, 4);
2334 pci_write_config(sc->dev, pcie_pos + PCIER_DEVICE_CTL2, ctl2, 4);
2336 sc->flags |= PCIB_ENABLE_ARI;
2371 if (sc->flags & PCIB_ENABLE_ARI)
2384 if (sc->flags & PCIB_ENABLE_ARI)
2399 if (sc->flags & PCIB_ENABLE_ARI) {
2461 * The PCI standard defines a swizzle of the child-side device/intpin to
2462 * the parent-side intpin as follows.
2465 * child_intpin = intpin on child bus slot (0-3)
2466 * parent_intpin = intpin on parent bus slot (0-3)
2470 parent_intpin = (pci_get_slot(dev) + (pin - 1)) % 4;
2480 pci_get_slot(dev), 'A' + pin - 1, intnum);
2485 /* Pass request to alloc MSI/MSI-X messages up to the parent bridge. */
2492 if (sc->flags & PCIB_DISABLE_MSI)
2499 /* Pass request to release MSI/MSI-X messages up to the parent bridge. */
2509 /* Pass request to alloc an MSI-X message up to the parent bridge. */
2516 if (sc->flags & PCIB_DISABLE_MSIX)
2522 /* Pass request to release an MSI-X message up to the parent bridge. */
2532 /* Pass request to map MSI/MSI-X message up to parent bridge. */
2566 return ((sc->flags & PCIB_ENABLE_ARI) != 0);
2584 if (sc->flags & PCIB_ENABLE_ARI) {
2682 * the firmware overrides the method of PCI-PCI bridges.
2722 if (pdinfo->cfg.pcie.pcie_location != 0 &&
2723 (pdinfo->cfg.pcie.pcie_type == PCIEM_TYPE_DOWNSTREAM_PORT ||
2724 pdinfo->cfg.pcie.pcie_type == PCIEM_TYPE_ROOT_PORT)) {
2728 pdinfo->cfg.pcie.pcie_location);