Lines Matching +full:pci +full:- +full:dev
1 /*-
51 #include <dev/ofw/openfirm.h>
52 #include <dev/ofw/ofw_bus.h>
53 #include <dev/ofw/ofw_bus_subr.h>
54 #include <dev/ofw/ofw_pci.h>
56 #include <dev/pci/pcivar.h>
57 #include <dev/pci/pcireg.h>
58 #include <dev/pci/pcib_private.h>
59 #include <dev/pci/pci_host_generic.h>
60 #include <dev/pci/pci_host_generic_fdt.h>
82 static int generic_pcie_fdt_probe(device_t dev);
89 generic_pcie_fdt_probe(device_t dev) in generic_pcie_fdt_probe() argument
92 if (!ofw_bus_status_okay(dev)) in generic_pcie_fdt_probe()
95 if (ofw_bus_is_compatible(dev, "pci-host-ecam-generic")) { in generic_pcie_fdt_probe()
96 device_set_desc(dev, "Generic PCI host controller"); in generic_pcie_fdt_probe()
99 if (ofw_bus_is_compatible(dev, "arm,gem5_pcie")) { in generic_pcie_fdt_probe()
100 device_set_desc(dev, "GEM5 PCIe host controller"); in generic_pcie_fdt_probe()
108 pci_host_generic_setup_fdt(device_t dev) in pci_host_generic_setup_fdt() argument
114 sc = device_get_softc(dev); in pci_host_generic_setup_fdt()
116 STAILQ_INIT(&sc->pci_ofw_devlist); in pci_host_generic_setup_fdt()
120 device_printf(dev, "parsing FDT for ECAM%d:\n", sc->base.ecam); in pci_host_generic_setup_fdt()
121 if (parse_pci_mem_ranges(dev, &sc->base)) in pci_host_generic_setup_fdt()
125 if (generic_pcie_ofw_bus_attach(dev) != 0) in pci_host_generic_setup_fdt()
128 node = ofw_bus_get_node(dev); in pci_host_generic_setup_fdt()
129 if (sc->base.coherent == 0) { in pci_host_generic_setup_fdt()
130 sc->base.coherent = OF_hasprop(node, "dma-coherent"); in pci_host_generic_setup_fdt()
133 device_printf(dev, "Bus is%s cache-coherent\n", in pci_host_generic_setup_fdt()
134 sc->base.coherent ? "" : " not"); in pci_host_generic_setup_fdt()
137 sc->base.bus_start = 0; in pci_host_generic_setup_fdt()
138 sc->base.bus_end = 0xFF; in pci_host_generic_setup_fdt()
141 * ofw_pcib uses device unit as PCI domain number. in pci_host_generic_setup_fdt()
146 sc->base.ecam = device_get_unit(dev); in pci_host_generic_setup_fdt()
148 error = pci_host_generic_core_attach(dev); in pci_host_generic_setup_fdt()
152 if (ofw_bus_is_compatible(dev, "marvell,armada8k-pcie-ecam") || in pci_host_generic_setup_fdt()
153 ofw_bus_is_compatible(dev, "socionext,synquacer-pcie-ecam") || in pci_host_generic_setup_fdt()
154 ofw_bus_is_compatible(dev, "snps,dw-pcie-ecam")) { in pci_host_generic_setup_fdt()
155 device_set_desc(dev, "Synopsys DesignWare PCIe Controller"); in pci_host_generic_setup_fdt()
156 sc->base.quirks |= PCIE_ECAM_DESIGNWARE_QUIRK; in pci_host_generic_setup_fdt()
159 ofw_bus_setup_iinfo(node, &sc->pci_iinfo, sizeof(cell_t)); in pci_host_generic_setup_fdt()
165 pci_host_generic_fdt_attach(device_t dev) in pci_host_generic_fdt_attach() argument
169 error = pci_host_generic_setup_fdt(dev); in pci_host_generic_fdt_attach()
173 device_add_child(dev, "pci", DEVICE_UNIT_ANY); in pci_host_generic_fdt_attach()
174 bus_attach_children(dev); in pci_host_generic_fdt_attach()
179 parse_pci_mem_ranges(device_t dev, struct generic_pcie_core_softc *sc) in parse_pci_mem_ranges() argument
188 node = ofw_bus_get_node(dev); in parse_pci_mem_ranges()
190 OF_getencprop(node, "#address-cells", &pci_addr_cells, in parse_pci_mem_ranges()
192 OF_getencprop(node, "#size-cells", &size_cells, in parse_pci_mem_ranges()
194 OF_getencprop(OF_parent(node), "#address-cells", &parent_addr_cells, in parse_pci_mem_ranges()
198 device_printf(dev, in parse_pci_mem_ranges()
204 sc->nranges = nbase_ranges / sizeof(cell_t) / in parse_pci_mem_ranges()
209 for (i = 0, j = 0; i < sc->nranges; i++) { in parse_pci_mem_ranges()
213 sc->ranges[i].flags |= FLAG_TYPE_IO; in parse_pci_mem_ranges()
215 sc->ranges[i].flags |= FLAG_TYPE_MEM; in parse_pci_mem_ranges()
218 sc->ranges[i].rid = -1; in parse_pci_mem_ranges()
219 sc->ranges[i].pci_base = 0; in parse_pci_mem_ranges()
220 for (k = 0; k < (pci_addr_cells - 1); k++) { in parse_pci_mem_ranges()
221 sc->ranges[i].pci_base <<= 32; in parse_pci_mem_ranges()
222 sc->ranges[i].pci_base |= base_ranges[j++]; in parse_pci_mem_ranges()
224 sc->ranges[i].phys_base = 0; in parse_pci_mem_ranges()
226 sc->ranges[i].phys_base <<= 32; in parse_pci_mem_ranges()
227 sc->ranges[i].phys_base |= base_ranges[j++]; in parse_pci_mem_ranges()
229 sc->ranges[i].size = 0; in parse_pci_mem_ranges()
231 sc->ranges[i].size <<= 32; in parse_pci_mem_ranges()
232 sc->ranges[i].size |= base_ranges[j++]; in parse_pci_mem_ranges()
237 /* zero-fill remaining tuples to mark empty elements in array */ in parse_pci_mem_ranges()
238 sc->ranges[i].pci_base = 0; in parse_pci_mem_ranges()
239 sc->ranges[i].phys_base = 0; in parse_pci_mem_ranges()
240 sc->ranges[i].size = 0; in parse_pci_mem_ranges()
248 generic_pcie_fdt_route_interrupt(device_t bus, device_t dev, int pin) in generic_pcie_fdt_route_interrupt() argument
260 reg.phys_hi = (pci_get_bus(dev) << OFW_PCI_PHYS_HI_BUSSHIFT) | in generic_pcie_fdt_route_interrupt()
261 (pci_get_slot(dev) << OFW_PCI_PHYS_HI_DEVICESHIFT) | in generic_pcie_fdt_route_interrupt()
262 (pci_get_function(dev) << OFW_PCI_PHYS_HI_FUNCTIONSHIFT); in generic_pcie_fdt_route_interrupt()
264 intrcells = ofw_bus_lookup_imap(ofw_bus_get_node(dev), in generic_pcie_fdt_route_interrupt()
265 &sc->pci_iinfo, ®, sizeof(reg), &pintr, sizeof(pintr), in generic_pcie_fdt_route_interrupt()
268 pintr = ofw_bus_map_intr(dev, iparent, intrcells, mintr); in generic_pcie_fdt_route_interrupt()
273 pin, pci_get_slot(dev), pci_get_function(dev)); in generic_pcie_fdt_route_interrupt()
278 generic_pcie_fdt_alloc_msi(device_t pci, device_t child, int count, in generic_pcie_fdt_alloc_msi() argument
285 err = ofw_bus_msimap(ofw_bus_get_node(pci), pci_get_rid(child), in generic_pcie_fdt_alloc_msi()
289 return (intr_alloc_msi(pci, child, msi_parent, count, maxcount, in generic_pcie_fdt_alloc_msi()
297 generic_pcie_fdt_release_msi(device_t pci, device_t child, int count, int *irqs) in generic_pcie_fdt_release_msi() argument
303 err = ofw_bus_msimap(ofw_bus_get_node(pci), pci_get_rid(child), in generic_pcie_fdt_release_msi()
307 return (intr_release_msi(pci, child, msi_parent, count, irqs)); in generic_pcie_fdt_release_msi()
314 generic_pcie_fdt_map_msi(device_t pci, device_t child, int irq, uint64_t *addr, in generic_pcie_fdt_map_msi() argument
321 err = ofw_bus_msimap(ofw_bus_get_node(pci), pci_get_rid(child), in generic_pcie_fdt_map_msi()
325 return (intr_map_msi(pci, child, msi_parent, irq, addr, data)); in generic_pcie_fdt_map_msi()
332 generic_pcie_fdt_alloc_msix(device_t pci, device_t child, int *irq) in generic_pcie_fdt_alloc_msix() argument
338 err = ofw_bus_msimap(ofw_bus_get_node(pci), pci_get_rid(child), in generic_pcie_fdt_alloc_msix()
342 return (intr_alloc_msix(pci, child, msi_parent, irq)); in generic_pcie_fdt_alloc_msix()
349 generic_pcie_fdt_release_msix(device_t pci, device_t child, int irq) in generic_pcie_fdt_release_msix() argument
355 err = ofw_bus_msimap(ofw_bus_get_node(pci), pci_get_rid(child), in generic_pcie_fdt_release_msix()
359 return (intr_release_msix(pci, child, msi_parent, irq)); in generic_pcie_fdt_release_msix()
366 generic_pcie_get_iommu(device_t pci, device_t child, uintptr_t *id) in generic_pcie_get_iommu() argument
375 node = ofw_bus_get_node(pci); in generic_pcie_get_iommu()
382 iommu->id = iommu_rid; in generic_pcie_get_iommu()
383 iommu->xref = iommu_xref; in generic_pcie_get_iommu()
390 generic_pcie_get_id(device_t pci, device_t child, enum pci_id_type type, in generic_pcie_get_id() argument
399 return (generic_pcie_get_iommu(pci, child, id)); in generic_pcie_get_id()
402 return (pcib_get_id(pci, child, type, id)); in generic_pcie_get_id()
404 node = ofw_bus_get_node(pci); in generic_pcie_get_id()
427 STAILQ_FOREACH(di, &sc->pci_ofw_devlist, pci_ofw_link) in generic_pcie_ofw_get_devinfo()
428 if (slot == di->slot && func == di->func && busno == di->bus) in generic_pcie_ofw_get_devinfo()
429 return (&di->di_dinfo); in generic_pcie_ofw_get_devinfo()
437 generic_pcie_ofw_bus_attach(device_t dev) in generic_pcie_ofw_bus_attach() argument
445 sc = device_get_softc(dev); in generic_pcie_ofw_bus_attach()
446 parent = ofw_bus_get_node(dev); in generic_pcie_ofw_bus_attach()
458 if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node) != 0) { in generic_pcie_ofw_bus_attach()
462 di->func = OFW_PCI_PHYS_HI_FUNCTION(reg[0]); in generic_pcie_ofw_bus_attach()
463 di->slot = OFW_PCI_PHYS_HI_DEVICE(reg[0]); in generic_pcie_ofw_bus_attach()
464 di->bus = OFW_PCI_PHYS_HI_BUS(reg[0]); in generic_pcie_ofw_bus_attach()
465 STAILQ_INSERT_TAIL(&sc->pci_ofw_devlist, di, pci_ofw_link); in generic_pcie_ofw_bus_attach()