1 /*-
40 #include <dev/pci/pcivar.h>
41 #include <dev/pci/pcireg.h>
42 #include <dev/pci/pcib_private.h>
43 #include <dev/pci/pci_host_generic.h>
44 #include <dev/pci/pci_host_generic_acpi.h>
68 	root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0;  in pci_host_acpi_smccc_probe()
74 	 * Check if we have memory resources. We may have a non-memory  in pci_host_acpi_smccc_probe()
75 	 * mapped device, e.g. using the Arm PCI Configuration Space  in pci_host_acpi_smccc_probe()
90 	device_set_desc(dev, "ARM PCI Firmware config space host controller");  in pci_host_acpi_smccc_probe()
116 #define	SMCCC_PCI_MAJOR(x)	(((x) >> 16) & 0x7fff)  argument
117 #define	SMCCC_PCI_MINOR(x)	((x) & 0xffff)  argument
119 #define	SMCCC_PCI_SEG_END(x)	(((x) >> 8) & 0xff)  argument
120 #define	SMCCC_PCI_SEG_START(x)	((x) & 0xff)  argument
160 	sc->base.quirks |= PCIE_CUSTOM_CONFIG_SPACE_QUIRK;  in pci_host_acpi_smccc_attach()
167 		    "Failed to read the SMCCC PCI version\n");  in pci_host_acpi_smccc_attach()
187 	    arm_smccc_invoke(SMCCC_PCI_GET_SEG_INFO, sc->base.ecam,  in pci_host_acpi_smccc_attach()
192 		sc->base.bus_start = MAX(sc->base.bus_start, start);  in pci_host_acpi_smccc_attach()
193 		sc->base.bus_end = MIN(sc->base.bus_end, end);  in pci_host_acpi_smccc_attach()
196 	device_add_child(dev, "pci", DEVICE_UNIT_ANY);  in pci_host_acpi_smccc_attach()
211 	if ((bus < sc->base.bus_start) || (bus > sc->base.bus_end))  in pci_host_acpi_smccc_read_config()
217 	addr = (sc->base.ecam << 16) | (bus << 8) | (slot << 3) | (func << 0);  in pci_host_acpi_smccc_read_config()
235 	if ((bus < sc->base.bus_start) || (bus > sc->base.bus_end))  in pci_host_acpi_smccc_write_config()
241 	addr = (sc->base.ecam << 16) | (bus << 8) | (slot << 3) | (func << 0);  in pci_host_acpi_smccc_write_config()