Lines Matching +full:dev +full:- +full:handle
1 /*-
48 #include <contrib/dev/acpica/include/acpi.h>
49 #include <contrib/dev/acpica/include/accommon.h>
51 #include <dev/acpica/acpivar.h>
52 #include <dev/acpica/acpi_pcibvar.h>
54 #include <dev/pci/pcivar.h>
55 #include <dev/pci/pcireg.h>
56 #include <dev/pci/pcib_private.h>
57 #include <dev/pci/pci_host_generic.h>
58 #include <dev/pci/pci_host_generic_acpi.h>
106 static int generic_pcie_acpi_probe(device_t dev);
111 * generic_pcie_acpi_probe - look for root bridge flag
114 generic_pcie_acpi_probe(device_t dev) in generic_pcie_acpi_probe() argument
120 if (acpi_disabled("pcib") || (h = acpi_get_handle(dev)) == NULL || in generic_pcie_acpi_probe()
123 root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0; in generic_pcie_acpi_probe()
128 device_set_desc(dev, "Generic PCI host controller"); in generic_pcie_acpi_probe()
133 * pci_host_generic_acpi_parse_resource - parse PCI memory, IO and bus spaces
139 device_t dev = (device_t)arg; in pci_host_generic_acpi_parse_resource() local
144 sc = device_get_softc(dev); in pci_host_generic_acpi_parse_resource()
145 r = sc->base.nranges; in pci_host_generic_acpi_parse_resource()
146 switch (res->Type) { in pci_host_generic_acpi_parse_resource()
148 restype = res->Data.Address16.ResourceType; in pci_host_generic_acpi_parse_resource()
149 min = res->Data.Address16.Address.Minimum; in pci_host_generic_acpi_parse_resource()
150 max = res->Data.Address16.Address.Maximum; in pci_host_generic_acpi_parse_resource()
153 restype = res->Data.Address32.ResourceType; in pci_host_generic_acpi_parse_resource()
154 min = res->Data.Address32.Address.Minimum; in pci_host_generic_acpi_parse_resource()
155 max = res->Data.Address32.Address.Maximum; in pci_host_generic_acpi_parse_resource()
156 off = res->Data.Address32.Address.TranslationOffset; in pci_host_generic_acpi_parse_resource()
159 restype = res->Data.Address64.ResourceType; in pci_host_generic_acpi_parse_resource()
160 min = res->Data.Address64.Address.Minimum; in pci_host_generic_acpi_parse_resource()
161 max = res->Data.Address64.Address.Maximum; in pci_host_generic_acpi_parse_resource()
162 off = res->Data.Address64.Address.TranslationOffset; in pci_host_generic_acpi_parse_resource()
166 * The Microsoft Dev Kit 2023 uses a fixed memory region in pci_host_generic_acpi_parse_resource()
173 min = res->Data.FixedMemory32.Address; in pci_host_generic_acpi_parse_resource()
174 max = res->Data.FixedMemory32.Address + in pci_host_generic_acpi_parse_resource()
175 res->Data.FixedMemory32.AddressLength - 1; in pci_host_generic_acpi_parse_resource()
183 if (res->Data.Address.ResourceType == ACPI_MEMORY_RANGE || in pci_host_generic_acpi_parse_resource()
184 res->Data.Address.ResourceType == ACPI_IO_RANGE) { in pci_host_generic_acpi_parse_resource()
185 sc->base.ranges[r].rid = -1; in pci_host_generic_acpi_parse_resource()
186 sc->base.ranges[r].pci_base = min; in pci_host_generic_acpi_parse_resource()
187 sc->base.ranges[r].phys_base = min + off; in pci_host_generic_acpi_parse_resource()
188 sc->base.ranges[r].size = max - min + 1; in pci_host_generic_acpi_parse_resource()
190 sc->base.ranges[r].flags |= FLAG_TYPE_MEM; in pci_host_generic_acpi_parse_resource()
192 sc->base.ranges[r].flags |= FLAG_TYPE_IO; in pci_host_generic_acpi_parse_resource()
193 sc->base.nranges++; in pci_host_generic_acpi_parse_resource()
194 } else if (res->Data.Address.ResourceType == ACPI_BUS_NUMBER_RANGE) { in pci_host_generic_acpi_parse_resource()
195 sc->base.bus_start = min; in pci_host_generic_acpi_parse_resource()
196 sc->base.bus_end = max; in pci_host_generic_acpi_parse_resource()
208 if (memcmp(hdr->OemId, pci_acpi_quirks[i].oem_id, in pci_host_acpi_get_oem_quirks()
211 if (memcmp(hdr->OemTableId, pci_acpi_quirks[i].oem_table_id, in pci_host_acpi_get_oem_quirks()
214 sc->base.quirks |= pci_acpi_quirks[i].quirks; in pci_host_acpi_get_oem_quirks()
219 pci_host_acpi_get_ecam_resource(device_t dev) in pci_host_acpi_get_ecam_resource() argument
226 ACPI_HANDLE handle; in pci_host_acpi_get_ecam_resource() local
231 sc = device_get_softc(dev); in pci_host_acpi_get_ecam_resource()
232 handle = acpi_get_handle(dev); in pci_host_acpi_get_ecam_resource()
238 mcfg_end = (ACPI_MCFG_ALLOCATION *)((char *)hdr + hdr->Length); in pci_host_acpi_get_ecam_resource()
241 if (mcfg_entry->PciSegment == sc->base.ecam && in pci_host_acpi_get_ecam_resource()
242 mcfg_entry->StartBusNumber <= sc->base.bus_start && in pci_host_acpi_get_ecam_resource()
243 mcfg_entry->EndBusNumber >= sc->base.bus_start) in pci_host_acpi_get_ecam_resource()
249 if (mcfg_entry->EndBusNumber < sc->base.bus_end) in pci_host_acpi_get_ecam_resource()
250 sc->base.bus_end = mcfg_entry->EndBusNumber; in pci_host_acpi_get_ecam_resource()
251 base = mcfg_entry->Address; in pci_host_acpi_get_ecam_resource()
253 device_printf(dev, "MCFG exists, but does not have bus %d-%d\n", in pci_host_acpi_get_ecam_resource()
254 sc->base.bus_start, sc->base.bus_end); in pci_host_acpi_get_ecam_resource()
258 if (sc->base.quirks & PCIE_ECAM_DESIGNWARE_QUIRK) in pci_host_acpi_get_ecam_resource()
259 device_set_desc(dev, "Synopsys DesignWare PCIe Controller"); in pci_host_acpi_get_ecam_resource()
261 status = acpi_GetInteger(handle, "_CBA", &val); in pci_host_acpi_get_ecam_resource()
269 ad = device_get_ivars(dev); in pci_host_acpi_get_ecam_resource()
270 rl = &ad->ad_rl; in pci_host_acpi_get_ecam_resource()
271 start = base + (sc->base.bus_start << PCIE_BUS_SHIFT); in pci_host_acpi_get_ecam_resource()
272 end = base + ((sc->base.bus_end + 1) << PCIE_BUS_SHIFT) - 1; in pci_host_acpi_get_ecam_resource()
273 resource_list_add(rl, SYS_RES_MEMORY, 0, start, end, end - start + 1); in pci_host_acpi_get_ecam_resource()
275 device_printf(dev, "ECAM for bus %d-%d at mem %jx-%jx\n", in pci_host_acpi_get_ecam_resource()
276 sc->base.bus_start, sc->base.bus_end, start, end); in pci_host_acpi_get_ecam_resource()
281 pci_host_generic_acpi_init(device_t dev) in pci_host_generic_acpi_init() argument
284 ACPI_HANDLE handle; in pci_host_generic_acpi_init() local
288 sc = device_get_softc(dev); in pci_host_generic_acpi_init()
289 handle = acpi_get_handle(dev); in pci_host_generic_acpi_init()
291 acpi_pcib_osc(dev, &sc->osc_ctl, 0); in pci_host_generic_acpi_init()
294 status = acpi_GetInteger(handle, "_BBN", &sc->base.bus_start); in pci_host_generic_acpi_init()
296 device_printf(dev, "No _BBN, using start bus 0\n"); in pci_host_generic_acpi_init()
297 sc->base.bus_start = 0; in pci_host_generic_acpi_init()
299 sc->base.bus_end = 255; in pci_host_generic_acpi_init()
302 status = acpi_GetInteger(handle, "_SEG", &sc->base.ecam); in pci_host_generic_acpi_init()
304 device_printf(dev, "No _SEG for PCI Bus, using segment 0\n"); in pci_host_generic_acpi_init()
305 sc->base.ecam = 0; in pci_host_generic_acpi_init()
309 status = AcpiWalkResources(handle, "_CRS", in pci_host_generic_acpi_init()
310 pci_host_generic_acpi_parse_resource, (void *)dev); in pci_host_generic_acpi_init()
315 if (ACPI_FAILURE(acpi_GetInteger(handle, "_CCA", &sc->base.coherent))) in pci_host_generic_acpi_init()
316 sc->base.coherent = 0; in pci_host_generic_acpi_init()
318 device_printf(dev, "Bus is%s cache-coherent\n", in pci_host_generic_acpi_init()
319 sc->base.coherent ? "" : " not"); in pci_host_generic_acpi_init()
322 pci_host_acpi_get_ecam_resource(dev); in pci_host_generic_acpi_init()
323 acpi_pcib_fetch_prt(dev, &sc->ap_prt); in pci_host_generic_acpi_init()
325 error = pci_host_generic_core_attach(dev); in pci_host_generic_acpi_init()
333 pci_host_generic_acpi_attach(device_t dev) in pci_host_generic_acpi_attach() argument
337 error = pci_host_generic_acpi_init(dev); in pci_host_generic_acpi_attach()
341 device_add_child(dev, "pci", DEVICE_UNIT_ANY); in pci_host_generic_acpi_attach()
342 bus_attach_children(dev); in pci_host_generic_acpi_attach()
347 generic_pcie_acpi_read_ivar(device_t dev, device_t child, int index, in generic_pcie_acpi_read_ivar() argument
350 ACPI_HANDLE handle; in generic_pcie_acpi_read_ivar() local
354 handle = acpi_get_handle(dev); in generic_pcie_acpi_read_ivar()
355 *result = (uintptr_t)handle; in generic_pcie_acpi_read_ivar()
359 return (generic_pcie_read_ivar(dev, child, index, result)); in generic_pcie_acpi_read_ivar()
363 generic_pcie_acpi_route_interrupt(device_t bus, device_t dev, int pin) in generic_pcie_acpi_route_interrupt() argument
368 return (acpi_pcib_route_interrupt(bus, dev, pin, &sc->ap_prt)); in generic_pcie_acpi_route_interrupt()
383 err = acpi_iort_map_pci_msi(sc->base.ecam, rid, &xref, &devid); in generic_pcie_get_xref()
401 err = acpi_iort_map_pci_msi(sc->base.ecam, rid, &xref, &devid); in generic_pcie_map_id()
424 err = acpi_iort_map_pci_smmuv3(sc->base.ecam, rid, &iommu_xref, in generic_pcie_get_iommu()
427 iommu->id = iommu_sid; in generic_pcie_get_iommu()
428 iommu->xref = iommu_xref; in generic_pcie_get_iommu()
511 generic_pcie_acpi_request_feature(device_t pcib, device_t dev, in generic_pcie_acpi_request_feature() argument
530 return (acpi_pcib_osc(pcib, &sc->osc_ctl, osc_ctl)); in generic_pcie_acpi_request_feature()