Lines Matching refs:DW_IATU_UR_REG
186 IATU_UR_WR4(sc, DW_IATU_UR_REG(i, LWR_TARGET_ADDR), in pci_dw_detect_out_atu_regions_unroll()
188 reg = IATU_UR_RD4(sc, DW_IATU_UR_REG(i, LWR_TARGET_ADDR)); in pci_dw_detect_out_atu_regions_unroll()
252 IATU_UR_WR4(sc, DW_IATU_UR_REG(idx, LWR_BASE_ADDR), in pci_dw_map_out_atu_unroll()
254 IATU_UR_WR4(sc, DW_IATU_UR_REG(idx, UPPER_BASE_ADDR), in pci_dw_map_out_atu_unroll()
256 IATU_UR_WR4(sc, DW_IATU_UR_REG(idx, LIMIT_ADDR), in pci_dw_map_out_atu_unroll()
258 IATU_UR_WR4(sc, DW_IATU_UR_REG(idx, LWR_TARGET_ADDR), in pci_dw_map_out_atu_unroll()
260 IATU_UR_WR4(sc, DW_IATU_UR_REG(idx, UPPER_TARGET_ADDR), in pci_dw_map_out_atu_unroll()
262 IATU_UR_WR4(sc, DW_IATU_UR_REG(idx, CTRL1), in pci_dw_map_out_atu_unroll()
264 IATU_UR_WR4(sc, DW_IATU_UR_REG(idx, CTRL2), in pci_dw_map_out_atu_unroll()
269 reg = IATU_UR_RD4(sc, DW_IATU_UR_REG(idx, CTRL2)); in pci_dw_map_out_atu_unroll()