Lines Matching +full:875 +full:v
263 * E7500, E7501, E7505, 845, 865, 875/E7210, and 855.
874 #define WREG(n, v, w) PCIB_WRITE_CONFIG(pcib, cfg->bus, cfg->slot, cfg->func, n, v, w) in pci_read_cap() argument
1251 if (vpd_ros->keyword[0] == 'R' && vpd_ros->keyword[1] == 'V') { in next_vpd_ro_elem()
6174 #define WREG(n, v) pci_write_config(dev, pos + (n), (v), 2) in pci_cfg_restore_pcie() argument
6761 uint16_t v; in pcie_link_reset() local
6763 v = pci_read_config(port, pcie_location + PCIER_LINK_CTL, 2); in pcie_link_reset()
6764 v |= PCIEM_LINK_CTL_LINK_DIS; in pcie_link_reset()
6765 pci_write_config(port, pcie_location + PCIER_LINK_CTL, v, 2); in pcie_link_reset()
6767 v &= ~PCIEM_LINK_CTL_LINK_DIS; in pcie_link_reset()
6768 v |= PCIEM_LINK_CTL_RETRAIN_LINK; in pcie_link_reset()
6769 pci_write_config(port, pcie_location + PCIER_LINK_CTL, v, 2); in pcie_link_reset()
6771 v = pci_read_config(port, pcie_location + PCIER_LINK_STA, 2); in pcie_link_reset()
6772 return ((v & PCIEM_LINK_STA_TRAINING) != 0 ? ETIMEDOUT : 0); in pcie_link_reset()