1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
9  * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37 #include <sys/bus.h>
68     "pci_n1sdp.c assumes a 4k or 16k page size when mapping the shared data");
94 	paddr = AP_NS_SHARED_MEM_BASE + sc->acpi.segment * BDF_TABLE_SIZE;  in n1sdp_init()
112 	paddr_rc = (vm_offset_t)shared_data->rc_base_addr;  in n1sdp_init()
113 	error = bus_space_map(sc->acpi.base.res->r_bustag, paddr_rc,  in n1sdp_init()
114 	    PCI_CFG_SPACE_SIZE, 0, &sc->n1_bsh);  in n1sdp_init()
119 	    sizeof(uint32_t) * shared_data->nr_bdfs;  in n1sdp_init()
120 	sc->n1_discovery_data = malloc(bdfs_size, M_DEVBUF,  in n1sdp_init()
122 	memcpy(sc->n1_discovery_data, shared_data, bdfs_size);  in n1sdp_init()
125 		table_count = sc->n1_discovery_data->nr_bdfs;  in n1sdp_init()
128 			    sc->n1_discovery_data->valid_bdfs[i]);  in n1sdp_init()
142     u_int bus, u_int slot, u_int func)  in n1sdp_check_bdf()  argument
148 	bdf = PCIE_ADDR_OFFSET(bus, slot, func, 0);  in n1sdp_check_bdf()
152 	table_count = sc->n1_discovery_data->nr_bdfs;  in n1sdp_check_bdf()
155 		if (bdf == sc->n1_discovery_data->valid_bdfs[i])  in n1sdp_check_bdf()
174 	root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0;  in n1sdp_pcie_acpi_probe()
184 	if (memcmp(hdr->OemId, "ARMLTD", ACPI_OEM_ID_SIZE) != 0 ||  in n1sdp_pcie_acpi_probe()
185 	    memcmp(hdr->OemTableId, "ARMN1SDP", ACPI_OEM_TABLE_ID_SIZE) != 0 ||  in n1sdp_pcie_acpi_probe()
186 	    hdr->OemRevision != 0x20181101)  in n1sdp_pcie_acpi_probe()
209 	status = acpi_GetInteger(handle, "_SEG", &sc->acpi.segment);  in n1sdp_pcie_acpi_attach()
211 		device_printf(dev, "No _SEG for PCI Bus\n");  in n1sdp_pcie_acpi_attach()
215 	if (sc->acpi.segment >= N1SDP_MAX_SEGMENTS) {  in n1sdp_pcie_acpi_attach()
216 		device_printf(dev, "Unknown PCI Bus segment (domain) %d\n",  in n1sdp_pcie_acpi_attach()
217 		    sc->acpi.segment);  in n1sdp_pcie_acpi_attach()
231 n1sdp_get_bus_space(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,  in n1sdp_get_bus_space()  argument
238 	if (n1sdp_check_bdf(sc, bus, slot, func) == 0)  in n1sdp_get_bus_space()
241 	if (bus == sc->acpi.base.bus_start) {  in n1sdp_get_bus_space()
244 		*bsh = sc->n1_bsh;  in n1sdp_get_bus_space()
246 		*bsh = rman_get_bushandle(sc->acpi.base.res);  in n1sdp_get_bus_space()
249 	*bst = rman_get_bustag(sc->acpi.base.res);  in n1sdp_get_bus_space()
250 	*offset = PCIE_ADDR_OFFSET(bus - sc->acpi.base.bus_start, slot, func,  in n1sdp_get_bus_space()
257 n1sdp_pcie_read_config(device_t dev, u_int bus, u_int slot,  in n1sdp_pcie_read_config()  argument
266 	uint32_t data;  in n1sdp_pcie_read_config()  local
269 	sc_acpi = &sc_n1sdp->acpi;  in n1sdp_pcie_read_config()
270 	sc = &sc_acpi->base;  in n1sdp_pcie_read_config()
272 	if ((bus < sc->bus_start) || (bus > sc->bus_end))  in n1sdp_pcie_read_config()
278 	if (n1sdp_get_bus_space(dev, bus, slot, func, reg, &t, &h, &offset) !=0)  in n1sdp_pcie_read_config()
281 	data = bus_space_read_4(t, h, offset & ~3);  in n1sdp_pcie_read_config()
285 		data >>= (offset & 3) * 8;  in n1sdp_pcie_read_config()
286 		data &= 0xff;  in n1sdp_pcie_read_config()
289 		data >>= (offset & 3) * 8;  in n1sdp_pcie_read_config()
290 		data = le16toh(data);  in n1sdp_pcie_read_config()
293 		data = le32toh(data);  in n1sdp_pcie_read_config()
299 	return (data);  in n1sdp_pcie_read_config()
303 n1sdp_pcie_write_config(device_t dev, u_int bus, u_int slot,  in n1sdp_pcie_write_config()  argument
312 	uint32_t data;  in n1sdp_pcie_write_config()  local
315 	sc_acpi = &sc_n1sdp->acpi;  in n1sdp_pcie_write_config()
316 	sc = &sc_acpi->base;  in n1sdp_pcie_write_config()
318 	if ((bus < sc->bus_start) || (bus > sc->bus_end))  in n1sdp_pcie_write_config()
324 	if (n1sdp_get_bus_space(dev, bus, slot, func, reg, &t, &h, &offset) !=0)  in n1sdp_pcie_write_config()
327 	data = bus_space_read_4(t, h, offset & ~3);  in n1sdp_pcie_write_config()
331 		data &= ~(0xff << ((offset & 3) * 8));  in n1sdp_pcie_write_config()
332 		data |= (val & 0xff) << ((offset & 3) * 8);  in n1sdp_pcie_write_config()
335 		data &= ~(0xffff << ((offset & 3) * 8));  in n1sdp_pcie_write_config()
336 		data |= (val & 0xffff) << ((offset & 3) * 8);  in n1sdp_pcie_write_config()
339 		data = val;  in n1sdp_pcie_write_config()
345 	bus_space_write_4(t, h, offset & ~3, data);  in n1sdp_pcie_write_config()