Lines Matching +full:reset +full:- +full:delay +full:- +full:us
1 /*-
47 {"w1-gpio", true},
56 #define OWC_GPIOBUS_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
57 #define OWC_GPIOBUS_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
59 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \
61 #define OWC_GPIOBUS_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
88 ofw_bus_search_compatible(dev, compat_data)->ocd_data) in owc_gpiobus_probe()
92 device_set_desc(dev, "GPIO one-wire bus"); in owc_gpiobus_probe()
104 sc->sc_dev = dev; in owc_gpiobus_attach()
107 /* Try to configure our pin from fdt data on fdt-based systems. */ in owc_gpiobus_attach()
109 &sc->sc_pin); in owc_gpiobus_attach()
116 * on fdt-based systems). in owc_gpiobus_attach()
120 err = gpio_pin_get_by_child_index(dev, OW_PIN, &sc->sc_pin); in owc_gpiobus_attach()
124 device_printf(sc->sc_dev, in owc_gpiobus_attach()
136 device_add_child(sc->sc_dev, "ow", DEVICE_UNIT_ANY); in owc_gpiobus_attach()
152 gpio_pin_release(sc->sc_pin); in owc_gpiobus_detach()
167 #define OUTPIN(sc) gpio_pin_setflags((sc)->sc_pin, GPIO_PIN_OUTPUT)
168 #define INPIN(sc) gpio_pin_setflags((sc)->sc_pin, GPIO_PIN_INPUT)
169 #define GETPIN(sc, bp) gpio_pin_is_active((sc)->sc_pin, (bp))
170 #define LOW(sc) gpio_pin_set_active((sc)->sc_pin, false)
173 * WRITE-ONE (see owll_if.m for timings) From Figure 4-1 AN-937
175 * |<---------tSLOT---->|<-tREC->|
180 * |<-tLOW1->| | |
181 * |<------15us--->| |
182 * |<--------60us---->|
196 DELAY(t->t_low1); in owc_gpiobus_write_one()
200 DELAY(t->t_slot - t->t_low1 + t->t_rec); in owc_gpiobus_write_one()
208 * WRITE-ZERO (see owll_if.m for timings) From Figure 4-2 AN-937
210 * |<---------tSLOT------>|<-tREC->|
215 * |<--15us->| | |
216 * |<------60us--->| |
217 * |<-------tLOW0------>|
231 DELAY(t->t_low0); in owc_gpiobus_write_zero()
235 DELAY(t->t_slot - t->t_low0 + t->t_rec); in owc_gpiobus_write_zero()
243 * READ-DATA (see owll_if.m for timings) From Figure 4-3 AN-937
245 * |<---------tSLOT------>|<-tREC->|
251 * |<------tRDV---->| |
252 * ->| |<-tRELEASE
254 * r -- allowed to pull high via the resitor when slave writes a 1-bit
272 DELAY(t->t_lowr); in owc_gpiobus_read_data()
283 } while (now - then < (t->t_rdv + 2) * SBT_1US && sample == false); in owc_gpiobus_read_data()
286 if (now - then < t->t_rdv * SBT_1US) in owc_gpiobus_read_data()
294 } while (now - then < (t->t_slot + t->t_rec) * SBT_1US); in owc_gpiobus_read_data()
300 * RESET AND PRESENCE PULSE (see owll_if.m for timings) From Figure 4-4 AN-937
302 * |<---------tRSTH------------>|
307 * |<----tRSTL--->| | |<-tPDL---->|
308 * | ->| |<-tR | |
311 * Note: for Regular Speed operations, tRSTL + tR should be less than 960us to
315 * -1 = Bus wiring error (stuck low).
336 *bit = -1; in owc_gpiobus_reset_and_presence()
345 DELAY(t->t_rstl); in owc_gpiobus_reset_and_presence()
347 /* Allow resistor to float line high and then wait for reset pulse */ in owc_gpiobus_reset_and_presence()
349 DELAY(t->t_pdh + t->t_pdl / 2); in owc_gpiobus_reset_and_presence()
357 DELAY(t->t_rsth - (t->t_pdh + t->t_pdl / 2)); /* Timing not critical for this one */ in owc_gpiobus_reset_and_presence()
362 * problem and should abort the reset. in owc_gpiobus_reset_and_presence()
366 *bit = -1; in owc_gpiobus_reset_and_presence()