Lines Matching refs:u0

110 	mbx->u0.s.embedded = 1;
239 hdr->u0.req.opcode = opcode;
240 hdr->u0.req.subsystem = subsys;
241 hdr->u0.req.port_number = port;
242 hdr->u0.req.domain = dom;
244 hdr->u0.req.timeout = timeout;
245 hdr->u0.req.request_length = pyld_len - sizeof(struct mbx_hdr);
246 hdr->u0.req.version = version;
303 mbx.u0.s.embedded = 1;
309 ret = fwcmd->hdr.u0.rsp.status;
314 fwcmd->hdr.u0.rsp.additional_status);
348 mbx->u0.s.embedded = 1;
396 DW_SWAP(u32ptr(&mb_cqe->u0.dw[0]), sizeof(struct oce_mq_cqe));
402 cstatus = mb_cqe->u0.s.completion_status;
412 bcopy(&mbxctx, mb_cqe->u0.s.mq_tag,
459 mbx.u0.s.embedded = 1;
465 ret = fwcmd->hdr.u0.rsp.status;
470 fwcmd->hdr.u0.rsp.additional_status);
504 mbx.u0.s.embedded = 1;
510 ret = fwcmd->hdr.u0.rsp.status;
515 fwcmd->hdr.u0.rsp.additional_status);
584 fwcmd->params.req.vlan_tag.u0.normal.vtag = LE_16(vlan_tag);
590 mbx.u0.s.embedded = 1;
596 rc = fwcmd->hdr.u0.rsp.status;
601 fwcmd->hdr.u0.rsp.additional_status);
638 mbx.u0.s.embedded = 1;
644 rc = fwcmd->hdr.u0.rsp.status;
649 fwcmd->hdr.u0.rsp.additional_status);
695 mbx.u0.s.embedded = 1;
701 rc = fwcmd->hdr.u0.rsp.status;
706 fwcmd->hdr.u0.rsp.additional_status);
748 mbx.u0.s.embedded = 1;
754 rc = fwcmd->hdr.u0.rsp.status;
759 fwcmd->hdr.u0.rsp.additional_status);
853 mbx.u0.s.embedded = 1;
859 rc = fwcmd->hdr.u0.rsp.status;
864 fwcmd->hdr.u0.rsp.additional_status);
937 mbx.u0.s.embedded = 0;
938 mbx.u0.s.sge_count = 1;
939 mbx.payload.u0.u1.sgl[0].pa_lo = ADDR_LO(sgl->paddr);
940 mbx.payload.u0.u1.sgl[0].pa_hi = ADDR_HI(sgl->paddr);
941 mbx.payload.u0.u1.sgl[0].length = mbx_sz;
947 rc = fwcmd->hdr.u0.rsp.status;
952 fwcmd->hdr.u0.rsp.additional_status);
981 mbx.u0.s.embedded = 1;
988 rc = fwcmd->hdr.u0.rsp.status;
993 fwcmd->hdr.u0.rsp.additional_status);
1031 mbx.u0.s.embedded = 0; /* stats too large for embedded mbx rsp */ \
1032 mbx.u0.s.sge_count = 1; /* using scatter gather instead */ \
1035 mbx.payload.u0.u1.sgl[0].pa_lo = ADDR_LO(pstats_dma_mem->paddr); \
1036 mbx.payload.u0.u1.sgl[0].pa_hi = ADDR_HI(pstats_dma_mem->paddr); \
1037 mbx.payload.u0.u1.sgl[0].length = sizeof(*fwcmd); \
1044 rc = fwcmd->hdr.u0.rsp.status; \
1049 fwcmd->hdr.u0.rsp.additional_status); \
1086 mbx.u0.s.embedded = 0; /* stats too large for embedded mbx rsp */
1087 mbx.u0.s.sge_count = 1; /* using scatter gather instead */
1090 mbx.payload.u0.u1.sgl[0].pa_lo = ADDR_LO(pstats_dma_mem->paddr);
1091 mbx.payload.u0.u1.sgl[0].pa_hi = ADDR_HI(pstats_dma_mem->paddr);
1092 mbx.payload.u0.u1.sgl[0].length = sizeof(struct mbx_get_pport_stats);
1101 rc = fwcmd->hdr.u0.rsp.status;
1106 fwcmd->hdr.u0.rsp.additional_status);
1140 mbx.u0.s.embedded = 0; /* stats too large for embedded mbx rsp */
1141 mbx.u0.s.sge_count = 1; /* using scatter gather instead */
1144 mbx.payload.u0.u1.sgl[0].pa_lo = ADDR_LO(pstats_dma_mem->paddr);
1145 mbx.payload.u0.u1.sgl[0].pa_hi = ADDR_HI(pstats_dma_mem->paddr);
1146 mbx.payload.u0.u1.sgl[0].length = sizeof(struct mbx_get_vport_stats);
1155 rc = fwcmd->hdr.u0.rsp.status;
1160 fwcmd->hdr.u0.rsp.additional_status);
1189 mbx.u0.s.embedded = 0; /*Non embeded*/
1191 mbx.u0.s.sge_count = 1;
1192 sgl = &mbx.payload.u0.u1.sgl[0];
1201 rc = req->hdr.u0.rsp.status;
1206 req->hdr.u0.rsp.additional_status);
1226 mbx.u0.s.embedded = 0; /*Non embeded*/
1228 mbx.u0.s.sge_count = 1;
1229 sgl = &mbx.payload.u0.u1.sgl[0];
1261 mbx.u0.s.embedded = 1;
1266 rc = fwcmd->hdr.u0.rsp.status;
1271 fwcmd->hdr.u0.rsp.additional_status);
1299 mbx.u0.s.embedded = 1;
1305 rc = fwcmd->hdr.u0.rsp.status;
1310 fwcmd->hdr.u0.rsp.additional_status);
1336 mbx.u0.s.embedded = 1;
1342 rc = fwcmd->hdr.u0.rsp.status;
1347 fwcmd->hdr.u0.rsp.additional_status);
1380 mbx.u0.s.embedded = 1;
1386 rc = fwcmd->hdr.u0.rsp.status;
1391 fwcmd->hdr.u0.rsp.additional_status);
1424 mbx.u0.s.embedded = 1;
1430 rc = fwcmd->hdr.u0.rsp.status;
1435 fwcmd->hdr.u0.rsp.additional_status);
1465 mbx.u0.s.embedded = 0; /*Non embeded*/
1467 mbx.u0.s.sge_count = 1;
1469 sgl = &mbx.payload.u0.u1.sgl[0];
1477 rc = fwcmd->hdr.u0.rsp.status;
1482 fwcmd->hdr.u0.rsp.additional_status);
1519 mbx.u0.s.embedded = 1;
1525 rc = fwcmd->hdr.u0.rsp.status;
1530 fwcmd->hdr.u0.rsp.additional_status);
1556 mbx.u0.s.embedded = 1;
1562 rc = fwcmd->hdr.u0.rsp.status;
1567 fwcmd->hdr.u0.rsp.additional_status);
1596 mbx.u0.s.embedded = 1;/* Embedded */
1666 fwcmd->hdr.u0.req.version = OCE_MBX_VER_V1;
1675 mbx.u0.s.embedded = 1;
1680 rc = fwcmd->hdr.u0.rsp.status;
1685 fwcmd->hdr.u0.rsp.additional_status);
1731 mbx.u0.s.embedded = 1;
1736 rc = fwcmd->hdr.u0.rsp.status;
1741 fwcmd->hdr.u0.rsp.additional_status);
1781 mbx.u0.s.embedded = 1;
1786 rc = fwcmd->hdr.u0.rsp.status;
1791 fwcmd->hdr.u0.rsp.additional_status);
1858 mbx.u0.s.embedded = 1;
1863 rc = fwcmd->hdr.u0.rsp.status;
1868 fwcmd->hdr.u0.rsp.additional_status);
1903 mbx.u0.s.embedded = 0;
1905 mbx.u0.s.sge_count = 1;
1906 sgl = &mbx.payload.u0.u1.sgl[0];
1918 rc = fwcmd->hdr.u0.rsp.status;
1923 fwcmd->hdr.u0.rsp.additional_status);
1964 mbx.u0.s.embedded = 1;
1981 rc = fwcmd->hdr.u0.rsp.status;
1986 fwcmd->hdr.u0.rsp.additional_status);
2028 mbx.u0.s.embedded = 0;
2030 mbx.u0.s.sge_count = 1;
2031 sgl = &mbx.payload.u0.u1.sgl[0];
2042 rc = fwcmd->hdr.u0.rsp.status;
2047 fwcmd->hdr.u0.rsp.additional_status);
2129 mbx.u0.s.embedded = 0;
2131 mbx.u0.s.sge_count = 1;
2132 sgl = &mbx.payload.u0.u1.sgl[0];
2141 rc = fwcmd->hdr.u0.rsp.status;
2146 fwcmd->hdr.u0.rsp.additional_status);
2204 mbx.u0.s.embedded = 1;
2209 rc = fwcmd->hdr.u0.rsp.status;
2214 fwcmd->hdr.u0.rsp.additional_status);
2243 mbx.u0.s.embedded = 1;
2261 rc = fwcmd->hdr.u0.rsp.status;
2266 fwcmd->hdr.u0.rsp.additional_status);
2311 mbx.u0.s.embedded = 1;
2316 rc = fwcmd->hdr.u0.rsp.status;
2321 fwcmd->hdr.u0.rsp.additional_status);