Lines Matching refs:uint32_t
248 uint32_t dw0;
251 uint32_t sli_valid:3;
252 uint32_t sli_hint2:5;
253 uint32_t sli_hint1:8;
254 uint32_t sli_if_type:4;
255 uint32_t sli_family:4;
256 uint32_t sli_rev:4;
257 uint32_t rsv0:3;
258 uint32_t sli_func_type:1;
260 uint32_t sli_func_type:1;
261 uint32_t rsv0:3;
262 uint32_t sli_rev:4;
263 uint32_t sli_family:4;
264 uint32_t sli_if_type:4;
265 uint32_t sli_hint1:8;
266 uint32_t sli_hint2:5;
267 uint32_t sli_valid:3;
275 uint32_t lo;
277 uint32_t hi;
281 uint32_t dw0;
284 uint32_t winselect:2;
285 uint32_t hostintr:1;
286 uint32_t pfnum:3;
287 uint32_t vf_cev_int_line_en:1;
288 uint32_t winaddr:23;
289 uint32_t membarwinen:1;
291 uint32_t membarwinen:1;
292 uint32_t winaddr:23;
293 uint32_t vf_cev_int_line_en:1;
294 uint32_t pfnum:3;
295 uint32_t hostintr:1;
296 uint32_t winselect:2;
302 uint32_t dw0;
305 uint32_t rsvd:31;
306 uint32_t lock:1;
308 uint32_t lock:1;
309 uint32_t rsvd:31;
315 uint32_t dw0;
318 uint32_t nec_ll_rcvdetect:8;
319 uint32_t dbg_all_reqs_62_49:14;
320 uint32_t scratchpad0:1;
321 uint32_t exception_oe:1;
322 uint32_t soft_reset:1;
323 uint32_t rsvd0:7;
325 uint32_t rsvd0:7;
326 uint32_t soft_reset:1;
327 uint32_t exception_oe:1;
328 uint32_t scratchpad0:1;
329 uint32_t dbg_all_reqs_62_49:14;
330 uint32_t nec_ll_rcvdetect:8;
336 uint32_t dw0;
339 uint32_t host8_online:1;
340 uint32_t host7_online:1;
341 uint32_t host6_online:1;
342 uint32_t host5_online:1;
343 uint32_t host4_online:1;
344 uint32_t host3_online:1;
345 uint32_t host2_online:1;
346 uint32_t ipc_online:1;
347 uint32_t arm_online:1;
348 uint32_t txp_online:1;
349 uint32_t xaui_online:1;
350 uint32_t rxpp_online:1;
351 uint32_t txpb_online:1;
352 uint32_t rr_online:1;
353 uint32_t pmem_online:1;
354 uint32_t pctl1_online:1;
355 uint32_t pctl0_online:1;
356 uint32_t pcs1online_online:1;
357 uint32_t mpu_iram_online:1;
358 uint32_t pcs0online_online:1;
359 uint32_t mgmt_mac_online:1;
360 uint32_t lpcmemhost_online:1;
362 uint32_t lpcmemhost_online:1;
363 uint32_t mgmt_mac_online:1;
364 uint32_t pcs0online_online:1;
365 uint32_t mpu_iram_online:1;
366 uint32_t pcs1online_online:1;
367 uint32_t pctl0_online:1;
368 uint32_t pctl1_online:1;
369 uint32_t pmem_online:1;
370 uint32_t rr_online:1;
371 uint32_t txpb_online:1;
372 uint32_t rxpp_online:1;
373 uint32_t xaui_online:1;
374 uint32_t txp_online:1;
375 uint32_t arm_online:1;
376 uint32_t ipc_online:1;
377 uint32_t host2_online:1;
378 uint32_t host3_online:1;
379 uint32_t host4_online:1;
380 uint32_t host5_online:1;
381 uint32_t host6_online:1;
382 uint32_t host7_online:1;
383 uint32_t host8_online:1;
389 uint32_t dw0;
392 uint32_t error:1;
393 uint32_t backup_fw:1;
394 uint32_t iscsi_no_ip:1;
395 uint32_t iscsi_ip_conflict:1;
396 uint32_t option_rom_installed:1;
397 uint32_t iscsi_drv_loaded:1;
398 uint32_t rsvd0:10;
399 uint32_t stage:16;
401 uint32_t stage:16;
402 uint32_t rsvd0:10;
403 uint32_t iscsi_drv_loaded:1;
404 uint32_t option_rom_installed:1;
405 uint32_t iscsi_ip_conflict:1;
406 uint32_t iscsi_no_ip:1;
407 uint32_t backup_fw:1;
408 uint32_t error:1;
414 uint32_t dw0;
417 uint32_t cpu_reset:1;
418 uint32_t rsvd1:15;
419 uint32_t ep_ram_init_status:1;
420 uint32_t rsvd0:12;
421 uint32_t m2_rxpbuf:1;
422 uint32_t m1_rxpbuf:1;
423 uint32_t m0_rxpbuf:1;
425 uint32_t m0_rxpbuf:1;
426 uint32_t m1_rxpbuf:1;
427 uint32_t m2_rxpbuf:1;
428 uint32_t rsvd0:12;
429 uint32_t ep_ram_init_status:1;
430 uint32_t rsvd1:15;
431 uint32_t cpu_reset:1;
438 uint32_t dw0;
441 uint32_t num_posted:8;
442 uint32_t invalidate:1;
443 uint32_t rsvd1:13;
444 uint32_t qid:10;
446 uint32_t qid:10;
447 uint32_t rsvd1:13;
448 uint32_t invalidate:1;
449 uint32_t num_posted:8;
456 uint32_t dw0;
459 uint32_t rsvd1:2;
460 uint32_t num_posted:14;
461 uint32_t rsvd0:6;
462 uint32_t qid:10;
464 uint32_t qid:10;
465 uint32_t rsvd0:6;
466 uint32_t num_posted:14;
467 uint32_t rsvd1:2;
474 uint32_t dw0;
477 uint32_t rsvd1:2;
478 uint32_t rearm:1;
479 uint32_t num_popped:13;
480 uint32_t rsvd0:5;
481 uint32_t event:1;
482 uint32_t qid:10;
484 uint32_t qid:10;
485 uint32_t event:1;
486 uint32_t rsvd0:5;
487 uint32_t num_popped:13;
488 uint32_t rearm:1;
489 uint32_t rsvd1:2;
496 uint32_t dw0;
499 uint32_t rsvd1:2;
500 uint32_t rearm:1;
501 uint32_t num_popped:13;
502 uint32_t rsvd0:5;
503 uint32_t event:1;
504 uint32_t clrint:1;
505 uint32_t qid:9;
507 uint32_t qid:9;
508 uint32_t clrint:1;
509 uint32_t event:1;
510 uint32_t rsvd0:5;
511 uint32_t num_popped:13;
512 uint32_t rearm:1;
513 uint32_t rsvd1:2;
520 uint32_t dw0;
523 uint32_t address:30;
524 uint32_t hi:1;
525 uint32_t ready:1;
527 uint32_t ready:1;
528 uint32_t hi:1;
529 uint32_t address:30;
536 uint32_t dw0;
539 uint32_t rsvd1:2;
540 uint32_t num_posted:14;
541 uint32_t rsvd0:5;
542 uint32_t mq_id:11;
544 uint32_t mq_id:11;
545 uint32_t rsvd0:5;
546 uint32_t num_posted:14;
547 uint32_t rsvd1:2;
556 uint32_t evnt;
561 uint32_t pa_lo;
562 uint32_t pa_hi;
563 uint32_t length;
573 uint32_t embedded[59];
575 uint32_t dw[59];
586 uint32_t special:8;
587 uint32_t rsvd1:16;
588 uint32_t sge_count:5;
589 uint32_t rsvd0:2;
590 uint32_t embedded:1;
592 uint32_t embedded:1;
593 uint32_t rsvd0:2;
594 uint32_t sge_count:5;
595 uint32_t rsvd1:16;
596 uint32_t special:8;
599 uint32_t dw0;
602 uint32_t payload_length;
603 uint32_t tag[2];
604 uint32_t rsvd2[1];
614 uint32_t extended_status:16;
615 uint32_t completion_status:16;
617 uint32_t mq_tag[2];
619 uint32_t valid:1;
620 uint32_t async_event:1;
621 uint32_t hpi_buffer_cmpl:1;
622 uint32_t completed:1;
623 uint32_t consumed:1;
624 uint32_t rsvd0:3;
625 uint32_t async_type:8;
626 uint32_t event_type:8;
627 uint32_t rsvd1:8;
630 uint32_t completion_status:16;
631 uint32_t extended_status:16;
633 uint32_t mq_tag[2];
635 uint32_t rsvd1:8;
636 uint32_t event_type:8;
637 uint32_t async_type:8;
638 uint32_t rsvd0:3;
639 uint32_t consumed:1;
640 uint32_t completed:1;
641 uint32_t hpi_buffer_cmpl:1;
642 uint32_t async_event:1;
643 uint32_t valid:1;
646 uint32_t dw[4];
674 uint32_t event_tag;
676 uint32_t valid:1;
677 uint32_t async_event:1;
678 uint32_t rsvd2:6;
679 uint32_t event_type:8;
680 uint32_t event_code:8;
681 uint32_t rsvd1:8;
693 uint32_t event_tag;
695 uint32_t rsvd1:8;
696 uint32_t event_code:8;
697 uint32_t event_type:8;
698 uint32_t rsvd2:6;
699 uint32_t async_event:1;
700 uint32_t valid:1;
703 uint32_t dw[4];
711 uint32_t lrn_enable:1;
712 uint32_t lrn_disable:1;
713 uint32_t mgmt_enable:1;
714 uint32_t mgmt_disable:1;
715 uint32_t rsvd0:12;
716 uint32_t vlan_tag:16;
717 uint32_t arp_filter:1;
718 uint32_t dhcp_client_filt:1;
719 uint32_t dhcp_server_filt:1;
720 uint32_t net_bios_filt:1;
721 uint32_t rsvd1:3;
722 uint32_t bcast_filt:1;
723 uint32_t ipv6_nbr_filt:1;
724 uint32_t ipv6_ra_filt:1;
725 uint32_t ipv6_ras_filt:1;
726 uint32_t rsvd2[4];
727 uint32_t mcast_filt:1;
728 uint32_t rsvd3:16;
729 uint32_t evt_tag;
730 uint32_t dword3;
732 uint32_t dword[4];
741 uint32_t event_tag;
742 uint32_t rsvd1;
743 uint32_t code;
751 uint32_t event_tag;
753 uint32_t code;
757 uint32_t dw[6];
761 uint32_t dw4rsvd1:16;
762 uint32_t num_pages:16;
764 uint32_t async_evt_bitmap;
766 uint32_t cq_id:10;
767 uint32_t dw5rsvd2:2;
768 uint32_t ring_size:4;
769 uint32_t dw5rsvd1:16;
771 uint32_t valid:1;
772 uint32_t dw6rsvd1:31;
774 uint32_t dw7rsvd1:21;
775 uint32_t async_cq_id:10;
776 uint32_t async_cq_valid:1;
779 uint32_t num_pages:16;
780 uint32_t dw4rsvd1:16;
782 uint32_t async_evt_bitmap;
784 uint32_t dw5rsvd1:16;
785 uint32_t ring_size:4;
786 uint32_t dw5rsvd2:2;
787 uint32_t cq_id:10;
789 uint32_t dw6rsvd1:31;
790 uint32_t valid:1;
792 uint32_t async_cq_valid:1;
793 uint32_t async_cq_id:10;
794 uint32_t dw7rsvd1:21;
797 uint32_t dw8rsvd1;
802 uint32_t cq_id:16;
803 uint32_t num_pages:16;
805 uint32_t async_evt_bitmap;
807 uint32_t dw5rsvd2:12;
808 uint32_t ring_size:4;
809 uint32_t async_cq_id:16;
811 uint32_t valid:1;
812 uint32_t dw6rsvd1:31;
814 uint32_t dw7rsvd1:31;
815 uint32_t async_cq_valid:1;
818 uint32_t num_pages:16;
819 uint32_t cq_id:16;
821 uint32_t async_evt_bitmap;
823 uint32_t async_cq_id:16;
824 uint32_t ring_size:4;
825 uint32_t dw5rsvd2:12;
827 uint32_t dw6rsvd1:31;
828 uint32_t valid:1;
830 uint32_t async_cq_valid:1;
831 uint32_t dw7rsvd1:31;
834 uint32_t dw8rsvd1;
972 uint32_t dw[4];
976 uint32_t domain:8;
977 uint32_t port_number:8;
978 uint32_t subsystem:8;
979 uint32_t opcode:8;
981 uint32_t timeout;
983 uint32_t request_length;
985 uint32_t rsvd0:24;
986 uint32_t version:8;
989 uint32_t opcode:8;
990 uint32_t subsystem:8;
991 uint32_t port_number:8;
992 uint32_t domain:8;
994 uint32_t timeout;
996 uint32_t request_length;
998 uint32_t version:8;
999 uint32_t rsvd0:24;
1005 uint32_t domain:8;
1006 uint32_t rsvd0:8;
1007 uint32_t subsystem:8;
1008 uint32_t opcode:8;
1010 uint32_t rsvd1:16;
1011 uint32_t additional_status:8;
1012 uint32_t status:8;
1015 uint32_t opcode:8;
1016 uint32_t subsystem:8;
1017 uint32_t rsvd0:8;
1018 uint32_t domain:8;
1020 uint32_t status:8;
1021 uint32_t additional_status:8;
1022 uint32_t rsvd1:16;
1024 uint32_t rsp_length;
1025 uint32_t actual_rsp_length;
1039 uint32_t rsvd0;
1044 uint32_t physical_port_fault:8;
1045 uint32_t physical_port_speed:8;
1046 uint32_t link_duplex:8;
1047 uint32_t pt:2;
1048 uint32_t port_number:6;
1053 uint32_t rsvd1:21;
1054 uint32_t phys_fcv:1;
1055 uint32_t phys_rxf:1;
1056 uint32_t phys_txf:1;
1057 uint32_t logical_link_status:8;
1059 uint32_t port_number:6;
1060 uint32_t pt:2;
1061 uint32_t link_duplex:8;
1062 uint32_t physical_port_speed:8;
1063 uint32_t physical_port_fault:8;
1068 uint32_t logical_link_status:8;
1069 uint32_t phys_txf:1;
1070 uint32_t phys_rxf:1;
1071 uint32_t phys_fcv:1;
1072 uint32_t rsvd1:21;
1097 uint32_t rsvd0;
1100 uint32_t dw;
1153 uint32_t rsvd0;
1156 uint32_t dw[2];
1177 uint32_t rsvd0;
1180 uint32_t dw[49];
1210 uint32_t version;
1211 uint32_t cap_flags;
1212 uint32_t enable_flags;
1220 uint32_t if_id;
1221 uint32_t pmac_id;
1223 uint32_t dw[4];
1232 uint32_t if_id;
1236 uint32_t rsvd0;
1239 uint32_t dw;
1246 uint32_t dw4rsvd1:16;
1247 uint32_t num_pages:16;
1249 uint32_t size:1;
1250 uint32_t dw5rsvd2:1;
1251 uint32_t valid:1;
1252 uint32_t dw5rsvd1:29;
1254 uint32_t armed:1;
1255 uint32_t dw6rsvd2:2;
1256 uint32_t count:3;
1257 uint32_t dw6rsvd1:26;
1259 uint32_t dw7rsvd2:9;
1260 uint32_t delay_mult:10;
1261 uint32_t dw7rsvd1:13;
1263 uint32_t dw8rsvd1;
1265 uint32_t num_pages:16;
1266 uint32_t dw4rsvd1:16;
1268 uint32_t dw5rsvd1:29;
1269 uint32_t valid:1;
1270 uint32_t dw5rsvd2:1;
1271 uint32_t size:1;
1273 uint32_t dw6rsvd1:26;
1274 uint32_t count:3;
1275 uint32_t dw6rsvd2:2;
1276 uint32_t armed:1;
1278 uint32_t dw7rsvd1:13;
1279 uint32_t delay_mult:10;
1280 uint32_t dw7rsvd2:9;
1282 uint32_t dw8rsvd1;
1317 uint32_t rsvd0;
1324 uint32_t dw[5];
1328 uint32_t dw4rsvd1:16;
1329 uint32_t num_pages:16;
1331 uint32_t eventable:1;
1332 uint32_t dw5rsvd3:1;
1333 uint32_t valid:1;
1334 uint32_t count:2;
1335 uint32_t dw5rsvd2:12;
1336 uint32_t nodelay:1;
1337 uint32_t coalesce_wm:2;
1338 uint32_t dw5rsvd1:12;
1340 uint32_t armed:1;
1341 uint32_t dw6rsvd2:1;
1342 uint32_t eq_id:8;
1343 uint32_t dw6rsvd1:22;
1346 uint32_t num_pages:16;
1347 uint32_t dw4rsvd1:16;
1349 uint32_t dw5rsvd1:12;
1350 uint32_t coalesce_wm:2;
1351 uint32_t nodelay:1;
1352 uint32_t dw5rsvd2:12;
1353 uint32_t count:2;
1354 uint32_t valid:1;
1355 uint32_t dw5rsvd3:1;
1356 uint32_t eventable:1;
1358 uint32_t dw6rsvd1:22;
1359 uint32_t eq_id:8;
1360 uint32_t dw6rsvd2:1;
1361 uint32_t armed:1;
1364 uint32_t dw7rsvd1;
1366 uint32_t dw8rsvd1;
1371 uint32_t dw4rsvd1:8;
1372 uint32_t page_size:8;
1373 uint32_t num_pages:16;
1375 uint32_t eventable:1;
1376 uint32_t dw5rsvd3:1;
1377 uint32_t valid:1;
1378 uint32_t count:2;
1379 uint32_t dw5rsvd2:11;
1380 uint32_t autovalid:1;
1381 uint32_t nodelay:1;
1382 uint32_t coalesce_wm:2;
1383 uint32_t dw5rsvd1:12;
1385 uint32_t armed:1;
1386 uint32_t dw6rsvd1:15;
1387 uint32_t eq_id:16;
1389 uint32_t dw7rsvd1:16;
1390 uint32_t cqe_count:16;
1393 uint32_t num_pages:16;
1394 uint32_t page_size:8;
1395 uint32_t dw4rsvd1:8;
1397 uint32_t dw5rsvd1:12;
1398 uint32_t coalesce_wm:2;
1399 uint32_t nodelay:1;
1400 uint32_t autovalid:1;
1401 uint32_t dw5rsvd2:11;
1402 uint32_t count:2;
1403 uint32_t valid:1;
1404 uint32_t dw5rsvd3:1;
1405 uint32_t eventable:1;
1407 uint32_t eq_id:16;
1408 uint32_t dw6rsvd1:15;
1409 uint32_t armed:1;
1411 uint32_t cqe_count:16;
1412 uint32_t dw7rsvd1:16;
1415 uint32_t dw8rsvd1;
1450 uint32_t rsvd0;
1456 uint32_t dw[5];
1460 uint32_t dw4rsvd1:16;
1461 uint32_t num_pages:16;
1463 uint32_t cq_id:10;
1464 uint32_t dw5rsvd2:2;
1465 uint32_t ring_size:4;
1466 uint32_t dw5rsvd1:16;
1468 uint32_t valid:1;
1469 uint32_t dw6rsvd1:31;
1471 uint32_t dw7rsvd1:21;
1472 uint32_t async_cq_id:10;
1473 uint32_t async_cq_valid:1;
1476 uint32_t num_pages:16;
1477 uint32_t dw4rsvd1:16;
1479 uint32_t dw5rsvd1:16;
1480 uint32_t ring_size:4;
1481 uint32_t dw5rsvd2:2;
1482 uint32_t cq_id:10;
1484 uint32_t dw6rsvd1:31;
1485 uint32_t valid:1;
1487 uint32_t async_cq_valid:1;
1488 uint32_t async_cq_id:10;
1489 uint32_t dw7rsvd1:21;
1492 uint32_t dw8rsvd1;
1510 uint32_t mq_id:16;
1511 uint32_t rsvd0:16;
1525 uint32_t mq_id:16;
1526 uint32_t rsvd0:16;
1546 uint32_t rsvd0;
1556 uint32_t rsvd0;
1571 uint32_t num_msi_msgs;
1575 uint32_t rsvd0;
1603 uint32_t flash_op_code;
1604 uint32_t flash_op_type;
1605 uint32_t data_buffer_size;
1606 uint32_t data_offset;
1614 uint32_t misc_params;
1619 uint32_t future_use[2];
1626 uint32_t rsvd0[4];
1640 uint32_t write_length: 24;
1641 uint32_t rsvd: 7;
1642 uint32_t eof: 1;
1643 uint32_t write_offset;
1645 uint32_t descriptor_count;
1646 uint32_t buffer_length;
1647 uint32_t address_lower;
1648 uint32_t address_upper;
1657 uint32_t response_length;
1658 uint32_t actual_response_length;
1659 uint32_t actual_write_length;
1676 uint32_t rsvd0[30];
1680 uint32_t config_number;
1681 uint32_t asic_revision;
1682 uint32_t port_id; /* used for stats retrieval */
1683 uint32_t function_mode;
1685 uint32_t ulp_mode;
1686 uint32_t nic_wqid_base;
1687 uint32_t nic_wq_tot;
1688 uint32_t toe_wqid_base;
1689 uint32_t toe_wq_tot;
1690 uint32_t toe_rqid_base;
1691 uint32_t toe_rqid_tot;
1692 uint32_t toe_defrqid_base;
1693 uint32_t toe_defrqid_count;
1694 uint32_t lro_rqid_base;
1695 uint32_t lro_rqid_tot;
1696 uint32_t iscsi_icd_base;
1697 uint32_t iscsi_icd_count;
1699 uint32_t function_caps;
1700 uint32_t cqid_base;
1701 uint32_t cqid_tot;
1702 uint32_t eqid_base;
1703 uint32_t eqid_tot;
1802 uint32_t rsvd;
1808 uint32_t global_flags_mask;
1809 uint32_t global_flags;
1810 uint32_t iface_flags_mask;
1811 uint32_t iface_flags;
1812 uint32_t if_id;
1814 uint32_t num_mcast;
1830 uint32_t eq_id;
1831 uint32_t phase;
1832 uint32_t dm;
1840 uint32_t num_eq;
1842 uint32_t eq_id;
1843 uint32_t phase;
1844 uint32_t dm;
1849 uint32_t rsvd0;
1859 uint32_t supp_modes;
1863 uint32_t ioctl_data_struct_ver;
1864 uint32_t ep_fw_data_struct_ver;
1866 uint32_t def_ext_to;
1876 uint32_t funcs_supp;
1888 uint32_t fw_post_status;
1889 uint32_t hba_mtu[8];
1893 uint32_t future_u32[3];
1909 uint32_t future_u32[4];
1916 uint32_t rsvd0;
1929 uint32_t if_id;
1934 uint32_t pmac_id;
1944 uint32_t if_id;
1945 uint32_t pmac_id;
1948 uint32_t rsvd0;
1957 uint32_t max_ioctl_bufsz;
1971 uint32_t page_num;
1972 uint32_t port;
1975 uint32_t page_num;
1976 uint32_t port;
1977 uint32_t page_data[32];
1988 uint32_t enable;
1991 uint32_t rsvd0;
2004 uint32_t valid_capability_flags;
2005 uint32_t capability_flags;
2009 uint32_t valid_capability_flags;
2010 uint32_t capability_flags;
2019 uint32_t loopback_type;
2020 uint32_t num_pkts;
2022 uint32_t src_port;
2023 uint32_t dest_port;
2024 uint32_t pkt_size;
2027 uint32_t status;
2028 uint32_t num_txfer;
2029 uint32_t num_rx;
2030 uint32_t miscomp_off;
2031 uint32_t ticks_compl;
2065 uint32_t desc_count;
2082 uint32_t desc_count;
2109 uint32_t rsvd5;
2110 uint32_t cap_flags;
2113 uint32_t bw_min;
2114 uint32_t bw_max;
2118 uint32_t rsvd8[7];
2125 uint32_t file_len;
2126 uint32_t cksum;
2127 uint32_t antidote;
2128 uint32_t num_imgs;
2135 uint32_t imageid;
2136 uint32_t imageoffset;
2137 uint32_t imagelength;
2138 uint32_t image_checksum;
2143 uint32_t format_rev;
2144 uint32_t cksum;
2145 uint32_t antidote;
2146 uint32_t num_images;
2148 uint32_t rsvd[4];
2152 uint32_t type;
2153 uint32_t offset;
2154 uint32_t pad_size;
2155 uint32_t image_size;
2156 uint32_t cksum;
2157 uint32_t entry_point;
2158 uint32_t rsvd0;
2159 uint32_t rsvd1;
2392 uint32_t rsvd0;
2395 uint32_t last_seg_udp_len:14;
2396 uint32_t rsvd1:18;
2399 uint32_t lso_mss:14;
2400 uint32_t num_wqe:5;
2401 uint32_t rsvd4:2;
2402 uint32_t vlan:1;
2403 uint32_t lso:1;
2404 uint32_t tcpcs:1;
2405 uint32_t udpcs:1;
2406 uint32_t ipcs:1;
2407 uint32_t mgmt:1;
2408 uint32_t lso6:1;
2409 uint32_t forward:1;
2410 uint32_t crc:1;
2411 uint32_t event:1;
2412 uint32_t complete:1;
2415 uint32_t vlan_tag:16;
2416 uint32_t total_length:16;
2419 uint32_t rsvd0;
2422 uint32_t rsvd1:18;
2423 uint32_t last_seg_udp_len:14;
2426 uint32_t complete:1;
2427 uint32_t event:1;
2428 uint32_t crc:1;
2429 uint32_t forward:1;
2430 uint32_t lso6:1;
2431 uint32_t mgmt:1;
2432 uint32_t ipcs:1;
2433 uint32_t udpcs:1;
2434 uint32_t tcpcs:1;
2435 uint32_t lso:1;
2436 uint32_t vlan:1;
2437 uint32_t rsvd4:2;
2438 uint32_t num_wqe:5;
2439 uint32_t lso_mss:14;
2442 uint32_t total_length:16;
2443 uint32_t vlan_tag:16;
2446 uint32_t dw[4];
2455 uint32_t frag_pa_hi;
2457 uint32_t frag_pa_lo;
2459 uint32_t rsvd0;
2460 uint32_t frag_len;
2462 uint32_t dw[4];
2472 uint32_t status:4;
2473 uint32_t rsvd0:8;
2474 uint32_t port:2;
2475 uint32_t ct:2;
2476 uint32_t wqe_index:16;
2479 uint32_t rsvd1:5;
2480 uint32_t cast_enc:2;
2481 uint32_t lso:1;
2482 uint32_t nwh_bytes:8;
2483 uint32_t user_bytes:16;
2486 uint32_t rsvd2;
2489 uint32_t valid:1;
2490 uint32_t rsvd3:4;
2491 uint32_t wq_id:11;
2492 uint32_t num_pkts:16;
2495 uint32_t wqe_index:16;
2496 uint32_t ct:2;
2497 uint32_t port:2;
2498 uint32_t rsvd0:8;
2499 uint32_t status:4;
2502 uint32_t user_bytes:16;
2503 uint32_t nwh_bytes:8;
2504 uint32_t lso:1;
2505 uint32_t cast_enc:2;
2506 uint32_t rsvd1:5;
2508 uint32_t rsvd2;
2511 uint32_t num_pkts:16;
2512 uint32_t wq_id:11;
2513 uint32_t rsvd3:4;
2514 uint32_t valid:1;
2517 uint32_t dw[4];
2527 uint32_t frag_pa_hi;
2528 uint32_t frag_pa_lo;
2530 uint32_t dw[2];
2540 uint32_t ip_options:1;
2541 uint32_t port:1;
2542 uint32_t pkt_size:14;
2543 uint32_t vlan_tag:16;
2546 uint32_t num_fragments:3;
2547 uint32_t switched:1;
2548 uint32_t ct:2;
2549 uint32_t frag_index:10;
2550 uint32_t rsvd0:1;
2551 uint32_t vlan_tag_present:1;
2552 uint32_t mac_dst:6;
2553 uint32_t ip_ver:1;
2554 uint32_t l4_cksum_pass:1;
2555 uint32_t ip_cksum_pass:1;
2556 uint32_t udpframe:1;
2557 uint32_t tcpframe:1;
2558 uint32_t ipframe:1;
2559 uint32_t rss_hp:1;
2560 uint32_t error:1;
2563 uint32_t valid:1;
2564 uint32_t hds_type:2;
2565 uint32_t lro_pkt:1;
2566 uint32_t rsvd4:1;
2567 uint32_t hds_hdr_size:12;
2568 uint32_t hds_hdr_frag_index:10;
2569 uint32_t rss_bank:1;
2570 uint32_t qnq:1;
2571 uint32_t pkt_type:2;
2572 uint32_t rss_flush:1;
2575 uint32_t rss_hash_value;
2578 uint32_t vlan_tag:16;
2579 uint32_t pkt_size:14;
2580 uint32_t port:1;
2581 uint32_t ip_options:1;
2583 uint32_t error:1;
2584 uint32_t rss_hp:1;
2585 uint32_t ipframe:1;
2586 uint32_t tcpframe:1;
2587 uint32_t udpframe:1;
2588 uint32_t ip_cksum_pass:1;
2589 uint32_t l4_cksum_pass:1;
2590 uint32_t ip_ver:1;
2591 uint32_t mac_dst:6;
2592 uint32_t vlan_tag_present:1;
2593 uint32_t rsvd0:1;
2594 uint32_t frag_index:10;
2595 uint32_t ct:2;
2596 uint32_t switched:1;
2597 uint32_t num_fragments:3;
2600 uint32_t rss_flush:1;
2601 uint32_t pkt_type:2;
2602 uint32_t qnq:1;
2603 uint32_t rss_bank:1;
2604 uint32_t hds_hdr_frag_index:10;
2605 uint32_t hds_hdr_size:12;
2606 uint32_t rsvd4:1;
2607 uint32_t lro_pkt:1;
2608 uint32_t hds_type:2;
2609 uint32_t valid:1;
2611 uint32_t rss_hash_value;
2614 uint32_t dw[4];
2623 uint32_t ip_options:1;
2624 uint32_t vlan_tag_present:1;
2625 uint32_t pkt_size:14;
2626 uint32_t vlan_tag:16;
2629 uint32_t num_fragments:3;
2630 uint32_t switched:1;
2631 uint32_t ct:2;
2632 uint32_t frag_index:10;
2633 uint32_t rsvd0:1;
2634 uint32_t mac_dst:7;
2635 uint32_t ip_ver:1;
2636 uint32_t l4_cksum_pass:1;
2637 uint32_t ip_cksum_pass:1;
2638 uint32_t udpframe:1;
2639 uint32_t tcpframe:1;
2640 uint32_t ipframe:1;
2641 uint32_t rss_hp:1;
2642 uint32_t error:1;
2645 uint32_t valid:1;
2646 uint32_t rsvd4:13;
2647 uint32_t hds_hdr_size:
2648 uint32_t hds_hdr_frag_index:8;
2649 uint32_t vlantag:1;
2650 uint32_t port:2;
2651 uint32_t rss_bank:1;
2652 uint32_t qnq:1;
2653 uint32_t pkt_type:2;
2654 uint32_t rss_flush:1;
2657 uint32_t rss_hash_value;
2660 uint32_t vlan_tag:16;
2661 uint32_t pkt_size:14;
2662 uint32_t vlan_tag_present:1;
2663 uint32_t ip_options:1;
2665 uint32_t error:1;
2666 uint32_t rss_hp:1;
2667 uint32_t ipframe:1;
2668 uint32_t tcpframe:1;
2669 uint32_t udpframe:1;
2670 uint32_t ip_cksum_pass:1;
2671 uint32_t l4_cksum_pass:1;
2672 uint32_t ip_ver:1;
2673 uint32_t mac_dst:7;
2674 uint32_t rsvd0:1;
2675 uint32_t frag_index:10;
2676 uint32_t ct:2;
2677 uint32_t switched:1;
2678 uint32_t num_fragments:3;
2681 uint32_t rss_flush:1;
2682 uint32_t pkt_type:2;
2683 uint32_t qnq:1;
2684 uint32_t rss_bank:1;
2685 uint32_t port:2;
2686 uint32_t vlantag:1;
2687 uint32_t hds_hdr_frag_index:8;
2688 uint32_t hds_hdr_size:2;
2689 uint32_t rsvd4:13;
2690 uint32_t valid:1;
2692 uint32_t rss_hash_value;
2695 uint32_t dw[4];
2719 uint32_t rsvd0;
2725 uint32_t dw[17];
2729 uint32_t dw4rsvd2:8;
2730 uint32_t nic_wq_type:8;
2731 uint32_t dw4rsvd1:8;
2732 uint32_t num_pages:8;
2734 uint32_t dw5rsvd2:12;
2735 uint32_t wq_size:4;
2736 uint32_t dw5rsvd1:16;
2738 uint32_t valid:1;
2739 uint32_t dw6rsvd1:31;
2741 uint32_t dw7rsvd1:16;
2742 uint32_t cq_id:16;
2745 uint32_t num_pages:8;
2747 uint32_t dw4rsvd1:8;
2750 uint32_t ulp_mask:8;
2752 uint32_t nic_wq_type:8;
2753 uint32_t dw4rsvd2:8;
2755 uint32_t dw5rsvd1:16;
2756 uint32_t wq_size:4;
2757 uint32_t dw5rsvd2:12;
2759 uint32_t dw6rsvd1:31;
2760 uint32_t valid:1;
2762 uint32_t cq_id:16;
2763 uint32_t dw7rsvd1:16;
2766 uint32_t dw8_20rsvd1[13];
2771 uint32_t dw4rsvd2:8;
2772 uint32_t nic_wq_type:8;
2773 uint32_t dw4rsvd1:8;
2774 uint32_t num_pages:8;
2776 uint32_t dw5rsvd2:12;
2777 uint32_t wq_size:4;
2778 uint32_t iface_id:16;
2780 uint32_t valid:1;
2781 uint32_t dw6rsvd1:31;
2783 uint32_t dw7rsvd1:16;
2784 uint32_t cq_id:16;
2787 uint32_t num_pages:8;
2788 uint32_t dw4rsvd1:8;
2789 uint32_t nic_wq_type:8;
2790 uint32_t dw4rsvd2:8;
2792 uint32_t iface_id:16;
2793 uint32_t wq_size:4;
2794 uint32_t dw5rsvd2:12;
2796 uint32_t dw6rsvd1:31;
2797 uint32_t valid:1;
2799 uint32_t cq_id:16;
2800 uint32_t dw7rsvd1:16;
2803 uint32_t dw8_20rsvd1[13];
2826 uint32_t rsvd2;
2829 uint32_t rsvd4[13];
2837 uint32_t db_offset;
2861 uint32_t rsvd0;
2874 uint32_t if_id;
2877 uint32_t is_rss_queue;
2908 uint32_t rsvd0;
2914 uint32_t rx_bytes_lsd; /* dword 0*/
2915 uint32_t rx_bytes_msd; /* dword 1*/
2916 uint32_t rx_total_frames; /* dword 2*/
2917 uint32_t rx_unicast_frames; /* dword 3*/
2918 uint32_t rx_multicast_frames; /* dword 4*/
2919 uint32_t rx_broadcast_frames; /* dword 5*/
2920 uint32_t rx_crc_errors; /* dword 6*/
2921 uint32_t rx_alignment_symbol_errors; /* dword 7*/
2922 uint32_t rx_pause_frames; /* dword 8*/
2923 uint32_t rx_control_frames; /* dword 9*/
2924 uint32_t rx_in_range_errors; /* dword 10*/
2925 uint32_t rx_out_range_errors; /* dword 11*/
2926 uint32_t rx_frame_too_long; /* dword 12*/
2927 uint32_t rx_address_match_errors; /* dword 13*/
2928 uint32_t rx_vlan_mismatch; /* dword 14*/
2929 uint32_t rx_dropped_too_small; /* dword 15*/
2930 uint32_t rx_dropped_too_short; /* dword 16*/
2931 uint32_t rx_dropped_header_too_small; /* dword 17*/
2932 uint32_t rx_dropped_tcp_length; /* dword 18*/
2933 uint32_t rx_dropped_runt; /* dword 19*/
2934 uint32_t rx_64_byte_packets; /* dword 20*/
2935 uint32_t rx_65_127_byte_packets; /* dword 21*/
2936 uint32_t rx_128_256_byte_packets; /* dword 22*/
2937 uint32_t rx_256_511_byte_packets; /* dword 23*/
2938 uint32_t rx_512_1023_byte_packets; /* dword 24*/
2939 uint32_t rx_1024_1518_byte_packets; /* dword 25*/
2940 uint32_t rx_1519_2047_byte_packets; /* dword 26*/
2941 uint32_t rx_2048_4095_byte_packets; /* dword 27*/
2942 uint32_t rx_4096_8191_byte_packets; /* dword 28*/
2943 uint32_t rx_8192_9216_byte_packets; /* dword 29*/
2944 uint32_t rx_ip_checksum_errs; /* dword 30*/
2945 uint32_t rx_tcp_checksum_errs; /* dword 31*/
2946 uint32_t rx_udp_checksum_errs; /* dword 32*/
2947 uint32_t rx_non_rss_packets; /* dword 33*/
2948 uint32_t rx_ipv4_packets; /* dword 34*/
2949 uint32_t rx_ipv6_packets; /* dword 35*/
2950 uint32_t rx_ipv4_bytes_lsd; /* dword 36*/
2951 uint32_t rx_ipv4_bytes_msd; /* dword 37*/
2952 uint32_t rx_ipv6_bytes_lsd; /* dword 38*/
2953 uint32_t rx_ipv6_bytes_msd; /* dword 39*/
2954 uint32_t rx_chute1_packets; /* dword 40*/
2955 uint32_t rx_chute2_packets; /* dword 41*/
2956 uint32_t rx_chute3_packets; /* dword 42*/
2957 uint32_t rx_management_packets; /* dword 43*/
2958 uint32_t rx_switched_unicast_packets; /* dword 44*/
2959 uint32_t rx_switched_multicast_packets; /* dword 45*/
2960 uint32_t rx_switched_broadcast_packets; /* dword 46*/
2961 uint32_t tx_bytes_lsd; /* dword 47*/
2962 uint32_t tx_bytes_msd; /* dword 48*/
2963 uint32_t tx_unicastframes; /* dword 49*/
2964 uint32_t tx_multicastframes; /* dword 50*/
2965 uint32_t tx_broadcastframes; /* dword 51*/
2966 uint32_t tx_pauseframes; /* dword 52*/
2967 uint32_t tx_controlframes; /* dword 53*/
2968 uint32_t tx_64_byte_packets; /* dword 54*/
2969 uint32_t tx_65_127_byte_packets; /* dword 55*/
2970 uint32_t tx_128_256_byte_packets; /* dword 56*/
2971 uint32_t tx_256_511_byte_packets; /* dword 57*/
2972 uint32_t tx_512_1023_byte_packets; /* dword 58*/
2973 uint32_t tx_1024_1518_byte_packets; /* dword 59*/
2974 uint32_t tx_1519_2047_byte_packets; /* dword 60*/
2975 uint32_t tx_2048_4095_byte_packets; /* dword 61*/
2976 uint32_t tx_4096_8191_byte_packets; /* dword 62*/
2977 uint32_t tx_8192_9216_byte_packets; /* dword 63*/
2978 uint32_t rxpp_fifo_overflow_drop; /* dword 64*/
2979 uint32_t rx_input_fifo_overflow_drop; /* dword 65*/
2984 uint32_t rx_drops_no_pbuf; /* dword 132*/
2985 uint32_t rx_drops_no_txpb; /* dword 133*/
2986 uint32_t rx_drops_no_erx_descr; /* dword 134*/
2987 uint32_t rx_drops_no_tpre_descr; /* dword 135*/
2988 uint32_t management_rx_port_packets; /* dword 136*/
2989 uint32_t management_rx_port_bytes; /* dword 137*/
2990 uint32_t management_rx_port_pause_frames;/* dword 138*/
2991 uint32_t management_rx_port_errors; /* dword 139*/
2992 uint32_t management_tx_port_packets; /* dword 140*/
2993 uint32_t management_tx_port_bytes; /* dword 141*/
2994 uint32_t management_tx_port_pause; /* dword 142*/
2995 uint32_t management_rx_port_rxfifo_overflow; /* dword 143*/
2996 uint32_t rx_drops_too_many_frags; /* dword 144*/
2997 uint32_t rx_drops_invalid_ring; /* dword 145*/
2998 uint32_t forwarded_packets; /* dword 146*/
2999 uint32_t rx_drops_mtu; /* dword 147*/
3000 uint32_t rsvd0[7];
3001 uint32_t port0_jabber_events;
3002 uint32_t port1_jabber_events;
3003 uint32_t rsvd1[6];
3007 uint32_t rsvd0[10];
3008 uint32_t roce_bytes_received_lsd;
3009 uint32_t roce_bytes_received_msd;
3010 uint32_t rsvd1[5];
3011 uint32_t roce_frames_received;
3012 uint32_t rx_crc_errors;
3013 uint32_t rx_alignment_symbol_errors;
3014 uint32_t rx_pause_frames;
3015 uint32_t rx_priority_pause_frames;
3016 uint32_t rx_control_frames;
3017 uint32_t rx_in_range_errors;
3018 uint32_t rx_out_range_errors;
3019 uint32_t rx_frame_too_long;
3020 uint32_t rx_address_match_errors;
3021 uint32_t rx_dropped_too_small;
3022 uint32_t rx_dropped_too_short;
3023 uint32_t rx_dropped_header_too_small;
3024 uint32_t rx_dropped_tcp_length;
3025 uint32_t rx_dropped_runt;
3026 uint32_t rsvd2[10];
3027 uint32_t rx_ip_checksum_errs;
3028 uint32_t rx_tcp_checksum_errs;
3029 uint32_t rx_udp_checksum_errs;
3030 uint32_t rsvd3[7];
3031 uint32_t rx_switched_unicast_packets;
3032 uint32_t rx_switched_multicast_packets;
3033 uint32_t rx_switched_broadcast_packets;
3034 uint32_t rsvd4[3];
3035 uint32_t tx_pauseframes;
3036 uint32_t tx_priority_pauseframes;
3037 uint32_t tx_controlframes;
3038 uint32_t rsvd5[10];
3039 uint32_t rxpp_fifo_overflow_drop;
3040 uint32_t rx_input_fifo_overflow_drop;
3041 uint32_t pmem_fifo_overflow_drop;
3042 uint32_t jabber_events;
3043 uint32_t rsvd6[3];
3044 uint32_t rx_drops_payload_size;
3045 uint32_t rx_drops_clipped_header;
3046 uint32_t rx_drops_crc;
3047 uint32_t roce_drops_payload_len;
3048 uint32_t roce_drops_crc;
3049 uint32_t rsvd7[19];
3053 uint32_t rsvd0[12];
3054 uint32_t rx_crc_errors;
3055 uint32_t rx_alignment_symbol_errors;
3056 uint32_t rx_pause_frames;
3057 uint32_t rx_priority_pause_frames;
3058 uint32_t rx_control_frames;
3059 uint32_t rx_in_range_errors;
3060 uint32_t rx_out_range_errors;
3061 uint32_t rx_frame_too_long;
3062 uint32_t rx_address_match_errors;
3063 uint32_t rx_dropped_too_small;
3064 uint32_t rx_dropped_too_short;
3065 uint32_t rx_dropped_header_too_small;
3066 uint32_t rx_dropped_tcp_length;
3067 uint32_t rx_dropped_runt;
3068 uint32_t rsvd1[10];
3069 uint32_t rx_ip_checksum_errs;
3070 uint32_t rx_tcp_checksum_errs;
3071 uint32_t rx_udp_checksum_errs;
3072 uint32_t rsvd2[7];
3073 uint32_t rx_switched_unicast_packets;
3074 uint32_t rx_switched_multicast_packets;
3075 uint32_t rx_switched_broadcast_packets;
3076 uint32_t rsvd3[3];
3077 uint32_t tx_pauseframes;
3078 uint32_t tx_priority_pauseframes;
3079 uint32_t tx_controlframes;
3080 uint32_t rsvd4[10];
3081 uint32_t rxpp_fifo_overflow_drop;
3082 uint32_t rx_input_fifo_overflow_drop;
3083 uint32_t pmem_fifo_overflow_drop;
3084 uint32_t jabber_events;
3085 uint32_t rsvd5[3];
3090 uint32_t rsvd0[2];
3091 uint32_t rx_drops_no_pbuf;
3092 uint32_t rx_drops_no_txpb;
3093 uint32_t rx_drops_no_erx_descr;
3094 uint32_t rx_drops_no_tpre_descr;
3095 uint32_t rsvd1[6];
3096 uint32_t rx_drops_too_many_frags;
3097 uint32_t rx_drops_invalid_ring;
3098 uint32_t forwarded_packets;
3099 uint32_t rx_drops_mtu;
3100 uint32_t rsvd2[35];
3105 uint32_t rsvd0[2];
3106 uint32_t rx_drops_no_pbuf;
3107 uint32_t rx_drops_no_txpb;
3108 uint32_t rx_drops_no_erx_descr;
3109 uint32_t rx_drops_no_tpre_descr;
3110 uint32_t rsvd1[6];
3111 uint32_t rx_drops_too_many_frags;
3112 uint32_t rx_drops_invalid_ring;
3113 uint32_t forwarded_packets;
3114 uint32_t rx_drops_mtu;
3115 uint32_t rsvd2[14];
3119 uint32_t rx_drops_no_fragments[136];
3120 uint32_t rsvd[3];
3124 uint32_t rx_drops_no_fragments[68];
3125 uint32_t rsvd[4];
3129 uint32_t rx_drops_no_fragments[44];
3130 uint32_t rsvd[4];
3134 uint32_t eth_red_drops;
3135 uint32_t rsvd[5];
3140 uint32_t rsvd0[OCE_TXP_SW_SZ];
3143 uint32_t rsvd1[18];
3148 uint32_t rsvd0[OCE_TXP_SW_SZ];
3151 uint32_t rsvd1[18];
3156 uint32_t rsvd[48];
3166 uint32_t rsvd0; \
3214 uint32_t rx_unknown_protos;
3215 uint32_t reserved_word69;
3226 uint32_t rx_undersize_pkts;
3227 uint32_t rx_oversize_pkts;
3228 uint32_t rx_fragment_pkts;
3229 uint32_t rx_jabbers;
3232 uint32_t rx_in_range_errors;
3233 uint32_t rx_out_of_range_errors;
3234 uint32_t rx_address_match_errors;
3235 uint32_t rx_vlan_mismatch_errors;
3236 uint32_t rx_dropped_too_small;
3237 uint32_t rx_dropped_too_short;
3238 uint32_t rx_dropped_header_too_small;
3239 uint32_t rx_dropped_invalid_tcp_length;
3240 uint32_t rx_dropped_runt;
3241 uint32_t rx_ip_checksum_errors;
3242 uint32_t rx_tcp_checksum_errors;
3243 uint32_t rx_udp_checksum_errors;
3244 uint32_t rx_non_rss_pkts;
3258 uint32_t rx_fifo_overflow;
3259 uint32_t rx_input_fifo_overflow;
3261 uint32_t rx_drops_invalid_queue;
3262 uint32_t reserved_word141;
3283 uint32_t reset_stats:8;
3284 uint32_t rsvd0:8;
3285 uint32_t port_number:16;
3287 uint32_t port_number:16;
3288 uint32_t rsvd0:8;
3289 uint32_t reset_stats:8;
3295 uint32_t pport_stats[164 - 4 + 1];
3346 uint32_t reset_stats:8;
3347 uint32_t rsvd0:8;
3348 uint32_t vport_number:16;
3350 uint32_t vport_number:16;
3351 uint32_t rsvd0:8;
3352 uint32_t reset_stats:8;
3358 uint32_t vport_stats[75 - 4 + 1];
3387 uint32_t reset_stats:8;
3388 uint32_t queue_type:8;
3389 uint32_t queue_id:16;
3391 uint32_t queue_id:16;
3392 uint32_t queue_type:8;
3393 uint32_t reset_stats:8;
3399 uint32_t queue_stats[13 - 4 + 1];
3413 uint32_t if_id;
3416 uint32_t hash[OCE_HASH_TBL_SZ];
3421 uint32_t if_id;
3424 uint32_t hash[OCE_HASH_TBL_SZ];
3439 typedef uint32_t oce_stat_t; /* statistic counter */
3789 uint32_t rsvd[6];
3793 uint32_t lro_flags;
3796 uint32_t rsvd[4];
3798 uint32_t lro_flags;
3801 uint32_t rsvd[4];
3812 uint32_t lro_flags;
3813 uint32_t iface_id;
3814 uint32_t max_clsc_byte_cnt;
3815 uint32_t max_clsc_seg_cnt;
3816 uint32_t max_clsc_usec_delay;
3817 uint32_t min_clsc_frame_byte_cnt;
3818 uint32_t rsvd[2];
3820 uint32_t lro_flags;
3821 uint32_t iface_id;
3822 uint32_t max_clsc_byte_cnt;
3823 uint32_t max_clsc_seg_cnt;
3824 uint32_t max_clsc_usec_delay;
3825 uint32_t min_clsc_frame_byte_cnt;
3826 uint32_t rsvd[2];
3831 uint32_t lro_flags;
3832 uint32_t rsvd[7];
3834 uint32_t lro_flags;
3835 uint32_t rsvd[7];
3850 uint32_t if_id;
3868 uint32_t rbq_id;
3870 uint32_t rsvd2[8];
3878 uint32_t if_id;
3896 uint32_t rbq_id;
3898 uint32_t rsvd2[8];
3913 uint32_t db_offset;
3915 uint32_t rsvd2;
3929 uint32_t db_offset;
3931 uint32_t rsvd2;
3958 uint32_t rsvd[2];
3966 uint32_t ip_opt:1;
3967 uint32_t vtp:1;
3968 uint32_t pkt_size:14;
3969 uint32_t vlan_tag:16;
3972 uint32_t num_frags:3;
3973 uint32_t rsvd1:3;
3974 uint32_t frag_index:10;
3975 uint32_t rsvd:8;
3976 uint32_t ipv6_frame:1;
3977 uint32_t l4_cksum_pass:1;
3978 uint32_t ip_cksum_pass:1;
3979 uint32_t udpframe:1;
3980 uint32_t tcpframe:1;
3981 uint32_t ipframe:1;
3982 uint32_t rss_hp:1;
3983 uint32_t error:1;
3986 uint32_t valid:1;
3987 uint32_t cqe_type:2;
3988 uint32_t debug:7;
3989 uint32_t rsvd4:6;
3990 uint32_t data_offset:8;
3991 uint32_t rsvd3:3;
3992 uint32_t rss_bank:1;
3993 uint32_t qnq:1;
3994 uint32_t rsvd2:3;
3997 uint32_t rss_hash_value;
4000 uint32_t vlan_tag:16;
4001 uint32_t pkt_size:14;
4002 uint32_t vtp:1;
4003 uint32_t ip_opt:1;
4006 uint32_t error:1;
4007 uint32_t rss_hp:1;
4008 uint32_t ipframe:1;
4009 uint32_t tcpframe:1;
4010 uint32_t udpframe:1;
4011 uint32_t ip_cksum_pass:1;
4012 uint32_t l4_cksum_pass:1;
4013 uint32_t ipv6_frame:1;
4014 uint32_t rsvd:8;
4015 uint32_t frag_index:10;
4016 uint32_t rsvd1:3;
4017 uint32_t num_frags:3;
4020 uint32_t rsvd2:3;
4021 uint32_t qnq:1;
4022 uint32_t rss_bank:1;
4023 uint32_t rsvd3:3;
4024 uint32_t data_offset:8;
4025 uint32_t rsvd4:6;
4026 uint32_t debug:7;
4027 uint32_t cqe_type:2;
4028 uint32_t valid:1;
4031 uint32_t rss_hash_value;
4038 uint32_t tcp_timestamp_val;
4041 uint32_t tcp_timestamp_ecr;
4044 uint32_t valid:1;
4045 uint32_t cqe_type:2;
4046 uint32_t rsvd3:7;
4047 uint32_t rss_policy:4;
4048 uint32_t rsvd2:2;
4049 uint32_t data_offset:8;
4050 uint32_t rsvd1:1;
4051 uint32_t lro_desc:1;
4052 uint32_t lro_timer_pop:1;
4053 uint32_t rss_bank:1;
4054 uint32_t qnq:1;
4055 uint32_t rsvd:2;
4056 uint32_t rss_flush:1;
4059 uint32_t rss_hash_value;
4062 uint32_t tcp_timestamp_val;
4065 uint32_t tcp_timestamp_ecr;
4068 uint32_t rss_flush:1;
4069 uint32_t rsvd:2;
4070 uint32_t qnq:1;
4071 uint32_t rss_bank:1;
4072 uint32_t lro_timer_pop:1;
4073 uint32_t lro_desc:1;
4074 uint32_t rsvd1:1;
4075 uint32_t data_offset:8;
4076 uint32_t rsvd2:2;
4077 uint32_t rss_policy:4;
4078 uint32_t rsvd3:7;
4079 uint32_t cqe_type:2;
4080 uint32_t valid:1;
4083 uint32_t rss_hash_value;
4090 uint32_t ip_opt:1;
4091 uint32_t vtp:1;
4092 uint32_t pkt_size:14;
4093 uint32_t vlan_tag:16;
4096 uint32_t tcp_window:16;
4097 uint32_t coalesced_size:16;
4100 uint32_t valid:1;
4101 uint32_t cqe_type:2;
4102 uint32_t rsvd:2;
4103 uint32_t push:1;
4104 uint32_t ts_opt:1;
4105 uint32_t threshold:1;
4106 uint32_t seg_cnt:8;
4107 uint32_t frame_lifespan:8;
4108 uint32_t ipv6_frame:1;
4109 uint32_t l4_cksum_pass:1;
4110 uint32_t ip_cksum_pass:1;
4111 uint32_t udpframe:1;
4112 uint32_t tcpframe:1;
4113 uint32_t ipframe:1;
4114 uint32_t rss_hp:1;
4115 uint32_t error:1;
4118 uint32_t tcp_ack_num;
4121 uint32_t vlan_tag:16;
4122 uint32_t pkt_size:14;
4123 uint32_t vtp:1;
4124 uint32_t ip_opt:1;
4127 uint32_t coalesced_size:16;
4128 uint32_t tcp_window:16;
4131 uint32_t error:1;
4132 uint32_t rss_hp:1;
4133 uint32_t ipframe:1;
4134 uint32_t tcpframe:1;
4135 uint32_t udpframe:1;
4136 uint32_t ip_cksum_pass:1;
4137 uint32_t l4_cksum_pass:1;
4138 uint32_t ipv6_frame:1;
4139 uint32_t frame_lifespan:8;
4140 uint32_t seg_cnt:8;
4141 uint32_t threshold:1;
4142 uint32_t ts_opt:1;
4143 uint32_t push:1;
4144 uint32_t rsvd:2;
4145 uint32_t cqe_type:2;
4146 uint32_t valid:1;
4149 uint32_t tcp_ack_num;