Lines Matching refs:NGE_CSR
264 CSR_READ_4(sc, NGE_CSR); in nge_delay()
603 reg = CSR_READ_4(sc, NGE_CSR); in nge_miibus_statchg()
605 CSR_WRITE_4(sc, NGE_CSR, reg); in nge_miibus_statchg()
641 reg = CSR_READ_4(sc, NGE_CSR); in nge_miibus_statchg()
643 CSR_WRITE_4(sc, NGE_CSR, reg); in nge_miibus_statchg()
645 if ((CSR_READ_4(sc, NGE_CSR) & NGE_CSR_RX_ENABLE) != 0) in nge_miibus_statchg()
754 NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RESET); in nge_reset()
757 if (!(CSR_READ_4(sc, NGE_CSR) & NGE_CSR_RESET)) in nge_reset()
1780 NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE); in nge_poll()
1837 NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE); in nge_intr()
2028 NGE_SETBIT(sc, NGE_CSR, NGE_CSR_TX_ENABLE); in nge_start_locked()
2425 reg = CSR_READ_4(sc, NGE_CSR); in nge_stop_mac()
2429 CSR_WRITE_4(sc, NGE_CSR, reg); in nge_stop_mac()
2432 if ((CSR_READ_4(sc, NGE_CSR) & in nge_stop_mac()
2537 NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE); in nge_wol()
2538 CSR_BARRIER_4(sc, NGE_CSR, BUS_SPACE_BARRIER_WRITE); in nge_wol()