Lines Matching refs:NFE_WRITE
453 NFE_WRITE(sc, NFE_MSIX_MAP0, 0); in nfe_attach()
454 NFE_WRITE(sc, NFE_MSIX_MAP1, 0); in nfe_attach()
456 NFE_WRITE(sc, NFE_MSI_MAP0, 0); in nfe_attach()
457 NFE_WRITE(sc, NFE_MSI_MAP1, 0); in nfe_attach()
857 NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_RESET | NFE_RXTX_BIT2); in nfe_power()
858 NFE_WRITE(sc, NFE_MAC_RESET, NFE_MAC_RESET_MAGIC); in nfe_power()
860 NFE_WRITE(sc, NFE_MAC_RESET, 0); in nfe_power()
862 NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_BIT2); in nfe_power()
869 NFE_WRITE(sc, NFE_PWR2_CTL, pwr); in nfe_power()
909 NFE_WRITE(sc, NFE_TX_CTL, txctl); in nfe_miibus_statchg()
910 NFE_WRITE(sc, NFE_RX_CTL, rxctl); in nfe_miibus_statchg()
959 NFE_WRITE(sc, NFE_SETUP_R1, val); in nfe_mac_config()
961 NFE_WRITE(sc, NFE_RNDSEED, seed); /* XXX: gigabit NICs only? */ in nfe_mac_config()
963 NFE_WRITE(sc, NFE_PHY_IFACE, phy); in nfe_mac_config()
964 NFE_WRITE(sc, NFE_MISC1, misc); in nfe_mac_config()
965 NFE_WRITE(sc, NFE_LINKSPEED, link); in nfe_mac_config()
975 NFE_WRITE(sc, NFE_RXFILTER, val); in nfe_mac_config()
980 NFE_WRITE(sc, NFE_TX_PAUSE_FRAME, in nfe_mac_config()
985 NFE_WRITE(sc, NFE_TX_PAUSE_FRAME, in nfe_mac_config()
988 NFE_WRITE(sc, NFE_MISC1, val); in nfe_mac_config()
994 NFE_WRITE(sc, NFE_RXFILTER, val); in nfe_mac_config()
996 NFE_WRITE(sc, NFE_TX_PAUSE_FRAME, in nfe_mac_config()
1000 NFE_WRITE(sc, NFE_MISC1, val); in nfe_mac_config()
1012 NFE_WRITE(sc, NFE_PHY_STATUS, 0xf); in nfe_miibus_readreg()
1015 NFE_WRITE(sc, NFE_PHY_CTL, NFE_PHY_BUSY); in nfe_miibus_readreg()
1019 NFE_WRITE(sc, NFE_PHY_CTL, (phy << NFE_PHYADD_SHIFT) | reg); in nfe_miibus_readreg()
1052 NFE_WRITE(sc, NFE_PHY_STATUS, 0xf); in nfe_miibus_writereg()
1055 NFE_WRITE(sc, NFE_PHY_CTL, NFE_PHY_BUSY); in nfe_miibus_writereg()
1059 NFE_WRITE(sc, NFE_PHY_DATA, val); in nfe_miibus_writereg()
1061 NFE_WRITE(sc, NFE_PHY_CTL, ctl); in nfe_miibus_writereg()
1629 NFE_WRITE(sc, sc->nfe_irq_status, r); in nfe_poll()
1633 NFE_WRITE(sc, NFE_PHY_STATUS, 0xf); in nfe_poll()
1647 NFE_WRITE(sc, NFE_IRQ_MASK, NFE_IRQ_WANTED); in nfe_set_intr()
1658 NFE_WRITE(sc, sc->nfe_irq_mask, sc->nfe_intrs); in nfe_enable_intr()
1660 NFE_WRITE(sc, sc->nfe_irq_mask, sc->nfe_intrs); in nfe_enable_intr()
1670 NFE_WRITE(sc, sc->nfe_irq_mask, sc->nfe_nointrs); in nfe_disable_intr()
1672 NFE_WRITE(sc, sc->nfe_irq_mask, sc->nfe_nointrs); in nfe_disable_intr()
1858 NFE_WRITE(sc, sc->nfe_irq_status, r); in nfe_int_task()
1871 NFE_WRITE(sc, NFE_PHY_STATUS, 0xf); in nfe_int_task()
2564 NFE_WRITE(sc, NFE_MULTIADDR_HI, ctx.addr[3] << 24 | ctx.addr[2] << 16 | in nfe_setmulti()
2566 NFE_WRITE(sc, NFE_MULTIADDR_LO, in nfe_setmulti()
2568 NFE_WRITE(sc, NFE_MULTIMASK_HI, ctx.mask[3] << 24 | ctx.mask[2] << 16 | in nfe_setmulti()
2570 NFE_WRITE(sc, NFE_MULTIMASK_LO, in nfe_setmulti()
2577 NFE_WRITE(sc, NFE_RXFILTER, filter); in nfe_setmulti()
2625 NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_KICKTX | sc->rxtxctl); in nfe_start_locked()
2658 NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_KICKTX | sc->rxtxctl); in nfe_watchdog()
2715 NFE_WRITE(sc, NFE_TX_UNK, val); in nfe_init_locked()
2716 NFE_WRITE(sc, NFE_STATUS, 0); in nfe_init_locked()
2719 NFE_WRITE(sc, NFE_TX_PAUSE_FRAME, NFE_TX_PAUSE_FRAME_DISABLE); in nfe_init_locked()
2732 NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_RESET | sc->rxtxctl); in nfe_init_locked()
2734 NFE_WRITE(sc, NFE_RXTX_CTL, sc->rxtxctl); in nfe_init_locked()
2737 NFE_WRITE(sc, NFE_VTAG_CTL, NFE_VTAG_ENABLE); in nfe_init_locked()
2739 NFE_WRITE(sc, NFE_VTAG_CTL, 0); in nfe_init_locked()
2741 NFE_WRITE(sc, NFE_SETUP_R6, 0); in nfe_init_locked()
2748 NFE_WRITE(sc, NFE_RX_RING_ADDR_HI, in nfe_init_locked()
2750 NFE_WRITE(sc, NFE_RX_RING_ADDR_LO, in nfe_init_locked()
2753 NFE_WRITE(sc, NFE_RX_RING_ADDR_HI, in nfe_init_locked()
2755 NFE_WRITE(sc, NFE_RX_RING_ADDR_LO, in nfe_init_locked()
2758 NFE_WRITE(sc, NFE_TX_RING_ADDR_HI, NFE_ADDR_HI(sc->txq.physaddr)); in nfe_init_locked()
2759 NFE_WRITE(sc, NFE_TX_RING_ADDR_LO, NFE_ADDR_LO(sc->txq.physaddr)); in nfe_init_locked()
2761 NFE_WRITE(sc, NFE_RING_SIZE, in nfe_init_locked()
2765 NFE_WRITE(sc, NFE_RXBUFSZ, sc->nfe_framesize); in nfe_init_locked()
2770 NFE_WRITE(sc, NFE_PWR_STATE, val | NFE_PWR_WAKEUP); in nfe_init_locked()
2773 NFE_WRITE(sc, NFE_PWR_STATE, val | NFE_PWR_VALID); in nfe_init_locked()
2777 NFE_WRITE(sc, NFE_IMTIMER, NFE_IM_DEFAULT); in nfe_init_locked()
2780 NFE_WRITE(sc, NFE_IMTIMER, 970); in nfe_init_locked()
2783 NFE_WRITE(sc, NFE_SETUP_R1, NFE_R1_MAGIC_10_100); in nfe_init_locked()
2784 NFE_WRITE(sc, NFE_SETUP_R2, NFE_R2_MAGIC); in nfe_init_locked()
2785 NFE_WRITE(sc, NFE_SETUP_R6, NFE_R6_MAGIC); in nfe_init_locked()
2788 NFE_WRITE(sc, NFE_STATUS, sc->mii_phyaddr << 24 | NFE_STATUS_MAGIC); in nfe_init_locked()
2790 NFE_WRITE(sc, NFE_SETUP_R4, NFE_R4_MAGIC); in nfe_init_locked()
2792 NFE_WRITE(sc, NFE_WOL_CTL, 0); in nfe_init_locked()
2795 NFE_WRITE(sc, NFE_RXTX_CTL, sc->rxtxctl); in nfe_init_locked()
2797 NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_BIT1 | sc->rxtxctl); in nfe_init_locked()
2803 NFE_WRITE(sc, NFE_RX_CTL, NFE_RX_START); in nfe_init_locked()
2806 NFE_WRITE(sc, NFE_TX_CTL, NFE_TX_START); in nfe_init_locked()
2808 NFE_WRITE(sc, NFE_PHY_STATUS, 0xf); in nfe_init_locked()
2849 NFE_WRITE(sc, NFE_TX_CTL, 0); in nfe_stop()
2852 NFE_WRITE(sc, NFE_RX_CTL, 0); in nfe_stop()
2994 NFE_WRITE(sc, NFE_MACADDR_LO, addr[5] << 8 | addr[4]); in nfe_set_macaddr()
2995 NFE_WRITE(sc, NFE_MACADDR_HI, addr[3] << 24 | addr[2] << 16 | in nfe_set_macaddr()
3322 NFE_WRITE(sc, NFE_WOL_CTL, wolctl); in nfe_set_wol()
3326 NFE_WRITE(sc, NFE_PWR2_CTL, in nfe_set_wol()
3329 NFE_WRITE(sc, NFE_RX_RING_ADDR_HI, 0); in nfe_set_wol()
3330 NFE_WRITE(sc, NFE_RX_RING_ADDR_LO, 0); in nfe_set_wol()
3331 NFE_WRITE(sc, NFE_RX_CTL, NFE_READ(sc, NFE_RX_CTL) | in nfe_set_wol()