Lines Matching +full:rx +full:- +full:queues +full:- +full:config
46 /* XXX: Currently multi-queue can be used on the Tx side only */
53 #if MVNETA_TX_QNUM_MAX & (MVNETA_TX_QNUM_MAX - 1) != 0
56 #if MVNETA_RX_QNUM_MAX & (MVNETA_RX_QNUM_MAX - 1) != 0
62 #define MVNETA_TX_QUEUE_ALL ((1<<MVNETA_TX_QNUM_MAX)-1)
63 #define MVNETA_RX_QUEUE_ALL ((1<<MVNETA_RX_QNUM_MAX)-1)
99 /* Rx DMA Hardware Parser Registers */
117 /* Rx DMA Miscellaneous Registers */
118 #define MVNETA_PMFS 0x247c /* Port Rx Minimal Frame Size */
119 #define MVNETA_PDFC 0x2484 /* Port Rx Discard Frame Counter */
123 /* Rx DMA Networking Controller Miscellaneous Registers */
124 #define MVNETA_PRXC(q) (0x1400 + ((q) << 2)) /*Port RX queues Config*/
125 #define MVNETA_PRXSNP(q) (0x1420 + ((q) << 2)) /* Port RX queues Snoop */
129 #define MVNETA_PRXS(q) (0x14e0 + ((q) << 2)) /*Port RX queues Status */
132 #define MVNETA_PRXINIT 0x1cc0 /* Port RX Initialization */
134 /* Rx DMA Wake on LAN Registers 0x3690 - 0x36b8 */
146 #define MVNETA_PTXS(q) (0x3c40 + ((q) << 2)) /* Port TX queues Status*/
149 #define MVNETA_TXTBC(q) (0x3ca0 + ((q) << 2)) /* TX Trans-ed Buf Count*/
159 #define MVNETA_TQTBC_V1 0x24e0 /* Transmit Queue Token-Bucket Cfg */
161 #define MVNETA_PMTBS_V1 0x24ec /* Port Max Token-Bucket Size */
163 /* Transmit Queue Token-Bucket Counter */
165 /* Transmit Queue Token-Bucket Configuration */
174 #define MVNETA_PMTBS_V3 0x3e14 /* Port Max Token-Bucket Size */
178 /* Transmit Queue Max Token-Bucket Size */
180 /* Transmit Queue Token-Bucket Counter */
204 #define MVNETA_PSPC 0x2c14 /* Port Serial Parameters Config */
205 #define MVNETA_PSP1C 0x2c94 /* Port Serial Parameters 1 Config */
207 /* Gigabit Ethernet Auto-Negotiation Configuration Registers */
208 #define MVNETA_PANC 0x2c0c /* Port Auto-Negotiation Configuration*/
239 /* Port Rx Interrupt Threshold */
247 #define MVNETA_PSNPCFG 0x25e4 /* Port Snoop Config */
269 /* MAC MIB Counters 0x3000 - 0x307c */
274 /* Rx */
330 #define MVNETA_S_SIZE(size) (((size) - 1) & 0xffff0000)
333 #define MVNETA_BARE_EN_MASK ((1 << MVNETA_NWINDOW) - 1)
420 * Rx DMA Hardware Parser Registers
433 #define MVNETA_DF_QUEUE_ALL ((MVNETA_RX_QNUM_MAX-1) << 1)
434 #define MVNETA_DF_QUEUE_MASK ((MVNETA_RX_QNUM_MAX-1) << 1)
437 * Rx DMA Miscellaneous Registers
439 /* Port Rx Minimal Frame Size (MVNETA_PMFS) */
440 #define MVNETA_PMFS_RXMFS(rxmfs) (((rxmfs) - 40) & 0x7c)
451 * Rx DMA Networking Controller Miscellaneous Registers
453 /* Port RX queues Configuration (MVNETA_PRXC) */
456 /* Port RX queues Snoop (MVNETA_PRXSNP) */
460 /* Port RX queues Descriptors Queue Size (MVNETA_PRXDQS) */
464 /* Port RX queues Descriptors Queue Threshold (MVNETA_PRXDQTH) */
470 /* Port RX queues Status (MVNETA_PRXS) */
478 /* Port RX queues Status Update (MVNETA_PRXSU) */
482 /* Port RX Initialization (MVNETA_PRXINIT) */
499 /* Port TX queues Descriptors Queue Size (MVNETA_PTXDQS) */
507 /* Port TX queues Status (MVNETA_PTXS) */
516 /* Port TX queues Status Update (MVNETA_PTXSU) */
608 * Gigabit Ethernet Auto-Negotiation Configuration Registers
610 /* Port Auto-Negotiation Configuration (MVNETA_PANC) */
670 #define MVNETA_PI_PCSRXPRLPI (1 << 11) /* PCS Rx path received LPI*/
672 #define MVNETA_PI_MACRXPRLPI (1 << 13) /* MAC Rx path received LPI*/
692 #define MVNETA_LPIS_PCSRXPLPIS (1 << 0) /* PCS Rx path LPI status */
694 #define MVNETA_LPIS_MACRXPLPIS (1 << 2)/* MAC Rx path LP idle status */
715 #define MVNETA_PSR_PRP (1 << 6) /* Port Rx Pause */
717 #define MVNETA_PSR_PDP (1 << 8) /*Port is Doing Back-Pressure*/
744 /* Rx Buffer Int. Coaleasing Th. Pri. Alrt Q */
748 /* Rx Descriptor Threshold Alert Queue*/