Lines Matching +full:interrupt +full:- +full:counter
46 /* XXX: Currently multi-queue can be used on the Tx side only */
53 #if MVNETA_TX_QNUM_MAX & (MVNETA_TX_QNUM_MAX - 1) != 0
56 #if MVNETA_RX_QNUM_MAX & (MVNETA_RX_QNUM_MAX - 1) != 0
62 #define MVNETA_TX_QUEUE_ALL ((1<<MVNETA_TX_QNUM_MAX)-1)
63 #define MVNETA_RX_QUEUE_ALL ((1<<MVNETA_RX_QNUM_MAX)-1)
86 #define MVNETA_EUIC 0x2080 /* Ethernet Unit Interrupt Cause */
87 #define MVNETA_EUIM 0x2084 /* Ethernet Unit Interrupt Mask */
119 #define MVNETA_PDFC 0x2484 /* Port Rx Discard Frame Counter */
120 #define MVNETA_POFC 0x2488 /* Port Overrun Frame Counter */
134 /* Rx DMA Wake on LAN Registers 0x3690 - 0x36b8 */
140 #define MVNETA_TXBADFCS 0x3cc0 /*Tx Bad FCS Transmitted Pckts Counter*/
141 #define MVNETA_TXDROPPED 0x3cc4 /* Tx Dropped Packets Counter */
149 #define MVNETA_TXTBC(q) (0x3ca0 + ((q) << 2)) /* TX Trans-ed Buf Count*/
159 #define MVNETA_TQTBC_V1 0x24e0 /* Transmit Queue Token-Bucket Cfg */
161 #define MVNETA_PMTBS_V1 0x24ec /* Port Max Token-Bucket Size */
163 /* Transmit Queue Token-Bucket Counter */
165 /* Transmit Queue Token-Bucket Configuration */
166 #define MVNETA_PTTBC_V1 0x2740 /* Port Transmit Backet Counter */
174 #define MVNETA_PMTBS_V3 0x3e14 /* Port Max Token-Bucket Size */
178 /* Transmit Queue Max Token-Bucket Size */
180 /* Transmit Queue Token-Bucket Counter */
207 /* Gigabit Ethernet Auto-Negotiation Configuration Registers */
208 #define MVNETA_PANC 0x2c0c /* Port Auto-Negotiation Configuration*/
218 /* Gigabit Ethernet MAC Interrupt Registers */
227 #define MVNETA_LPIC 0x2cd0 /* LPI counter */
231 #define MVNETA_PPRBSEC 0x2c3c /* Port PRBS Error Counter */
236 /* Networking Controller Interrupt Registers */
239 /* Port Rx Interrupt Threshold */
240 #define MVNETA_PRXTXTIC 0x25a0 /*Port RX_TX Threshold Interrupt Cause*/
241 #define MVNETA_PRXTXTIM 0x25a4 /*Port RX_TX Threshold Interrupt Mask */
242 #define MVNETA_PRXTXIC 0x25a8 /* Port RX_TX Interrupt Cause */
243 #define MVNETA_PRXTXIM 0x25ac /* Port RX_TX Interrupt Mask */
244 #define MVNETA_PMIC 0x25b0 /* Port Misc Interrupt Cause */
245 #define MVNETA_PMIM 0x25b4 /* Port Misc Interrupt Mask */
246 #define MVNETA_PIE 0x25b8 /* Port Interrupt Enable */
251 /* Miscellaneous Interrupt Registers */
257 #define MVNETA_TESTPRBSEC0 0x2e7c /* PHY Test PRBS Error Counter 0 */
258 #define MVNETA_TESTPRBSEC1 0x2e80 /* PHY Test PRBS Error Counter 1 */
269 /* MAC MIB Counters 0x3000 - 0x307c */
330 #define MVNETA_S_SIZE(size) (((size) - 1) & 0xffff0000)
333 #define MVNETA_BARE_EN_MASK ((1 << MVNETA_NWINDOW) - 1)
364 /* Ethernet Unit Interrupt Cause (MVNETA_EUIC) */
433 #define MVNETA_DF_QUEUE_ALL ((MVNETA_RX_QNUM_MAX-1) << 1)
434 #define MVNETA_DF_QUEUE_MASK ((MVNETA_RX_QNUM_MAX-1) << 1)
440 #define MVNETA_PMFS_RXMFS(rxmfs) (((rxmfs) - 40) & 0x7c)
471 /* Occupied Descriptors Counter */
473 /* Non Occupied Descriptors Counter */
508 /* Transmitted Buffer Counter */
512 /* Pending Descriptors Counter */
522 /* TX Transmitted Buffers Counter (MVNETA_TXTBC) */
523 /* Transmitted Buffers Counter */
608 * Gigabit Ethernet Auto-Negotiation Configuration Registers
610 /* Port Auto-Negotiation Configuration (MVNETA_PANC) */
659 * Gigabit Ethernet MAC Interrupt Registers
661 /* Port Interrupt Cause/Mask (MVNETA_PIC/MVNETA_PIM) */
668 #define MVNETA_PI_MIBCWA (1 << 15) /* MIB counter wrap around */
717 #define MVNETA_PSR_PDP (1 << 8) /*Port is Doing Back-Pressure*/
724 * Networking Controller Interrupt Registers
733 /* Port RX_TX Interrupt Threshold */
736 /* Port RX_TX Threshold Interrupt Cause/Mask (MVNETA_PRXTXTIC/MVNETA_PRXTXTIM) */
753 /* Port RX_TX Interrupt Cause/Mask (MVNETA_PRXTXIC/MVNETA_PRXTXIM) */
767 /* Port Misc Interrupt Cause/Mask (MVNETA_PMIC/MVNETA_PMIM) */
781 /* Port Interrupt Enable (MVNETA_PIE) */
788 * Miscellaneous Interrupt Registers