Lines Matching +full:8 +full:- +full:port
44 #define MVNETA_MAX_QUEUE_SIZE 8
46 /* XXX: Currently multi-queue can be used on the Tx side only */
53 #if MVNETA_TX_QNUM_MAX & (MVNETA_TX_QNUM_MAX - 1) != 0
56 #if MVNETA_RX_QNUM_MAX & (MVNETA_RX_QNUM_MAX - 1) != 0
62 #define MVNETA_TX_QUEUE_ALL ((1<<MVNETA_TX_QNUM_MAX)-1)
63 #define MVNETA_RX_QUEUE_ALL ((1<<MVNETA_RX_QNUM_MAX)-1)
77 #define MVNETA_EPAP 0x2294 /* Ethernet Port Access Protect */
96 #define MVNETA_PACC 0x2500 /* Port Acceleration Mode */
97 #define MVNETA_PV 0x25bc /* Port Version */
118 #define MVNETA_PMFS 0x247c /* Port Rx Minimal Frame Size */
119 #define MVNETA_PDFC 0x2484 /* Port Rx Discard Frame Counter */
120 #define MVNETA_POFC 0x2488 /* Port Overrun Frame Counter */
124 #define MVNETA_PRXC(q) (0x1400 + ((q) << 2)) /*Port RX queues Config*/
125 #define MVNETA_PRXSNP(q) (0x1420 + ((q) << 2)) /* Port RX queues Snoop */
129 #define MVNETA_PRXS(q) (0x14e0 + ((q) << 2)) /*Port RX queues Status */
132 #define MVNETA_PRXINIT 0x1cc0 /* Port RX Initialization */
134 /* Rx DMA Wake on LAN Registers 0x3690 - 0x36b8 */
139 #define MVNETA_PXTFTT 0x2478 /* Port Tx FIFO Threshold */
146 #define MVNETA_PTXS(q) (0x3c40 + ((q) << 2)) /* Port TX queues Status*/
149 #define MVNETA_TXTBC(q) (0x3ca0 + ((q) << 2)) /* TX Trans-ed Buf Count*/
150 #define MVNETA_PTXINIT 0x3cf0 /* Port TX Initialization */
159 #define MVNETA_TQTBC_V1 0x24e0 /* Transmit Queue Token-Bucket Cfg */
161 #define MVNETA_PMTBS_V1 0x24ec /* Port Max Token-Bucket Size */
163 /* Transmit Queue Token-Bucket Counter */
165 /* Transmit Queue Token-Bucket Configuration */
166 #define MVNETA_PTTBC_V1 0x2740 /* Port Transmit Backet Counter */
173 #define MVNETA_PREFILL_V3 0x3e10 /* Port Backet Refill */
174 #define MVNETA_PMTBS_V3 0x3e14 /* Port Max Token-Bucket Size */
178 /* Transmit Queue Max Token-Bucket Size */
180 /* Transmit Queue Token-Bucket Counter */
191 #define MVNETA_PXC 0x2400 /* Port Configuration */
192 #define MVNETA_PXCX 0x2404 /* Port Configuration Extend */
196 #define MVNETA_PSC0 0x243c /* Port Serial Control0 */
197 #define MVNETA_PS0 0x2444 /* Ethernet Port Status */
204 #define MVNETA_PSPC 0x2c14 /* Port Serial Parameters Config */
205 #define MVNETA_PSP1C 0x2c94 /* Port Serial Parameters 1 Config */
207 /* Gigabit Ethernet Auto-Negotiation Configuration Registers */
208 #define MVNETA_PANC 0x2c0c /* Port Auto-Negotiation Configuration*/
211 #define MVNETA_PMACC0 0x2c00 /* Port MAC Control 0 */
212 #define MVNETA_PMACC1 0x2c04 /* Port MAC Control 1 */
213 #define MVNETA_PMACC2 0x2c08 /* Port MAC Control 2 */
214 #define MVNETA_PMACC3 0x2c48 /* Port MAC Control 3 */
215 #define MVNETA_CCFCPST(p) (0x2c58 + ((p) << 2)) /*CCFC Port Speed Timerp*/
216 #define MVNETA_PMACC4 0x2c90 /* Port MAC Control 4 */
230 #define MVNETA_PPRBSS 0x2c38 /* Port PRBS Status */
231 #define MVNETA_PPRBSEC 0x2c3c /* Port PRBS Error Counter */
234 #define MVNETA_PSR 0x2c10 /* Port Status Register0 */
239 /* Port Rx Interrupt Threshold */
240 #define MVNETA_PRXTXTIC 0x25a0 /*Port RX_TX Threshold Interrupt Cause*/
241 #define MVNETA_PRXTXTIM 0x25a4 /*Port RX_TX Threshold Interrupt Mask */
242 #define MVNETA_PRXTXIC 0x25a8 /* Port RX_TX Interrupt Cause */
243 #define MVNETA_PRXTXIM 0x25ac /* Port RX_TX Interrupt Mask */
244 #define MVNETA_PMIC 0x25b0 /* Port Misc Interrupt Cause */
245 #define MVNETA_PMIM 0x25b4 /* Port Misc Interrupt Mask */
246 #define MVNETA_PIE 0x25b8 /* Port Interrupt Enable */
247 #define MVNETA_PSNPCFG 0x25e4 /* Port Snoop Config */
249 #define MVNETA_PSNPCFG_BUFSNP_MASK (0x3 << 8)
252 #define MVNETA_PEUIAE 0x2494 /* Port Internal Address Error */
269 /* MAC MIB Counters 0x3000 - 0x307c */
326 #define MVNETA_BASEADDR_ATTR(attr) (((attr) & 0xff) << 8)
330 #define MVNETA_S_SIZE(size) (((size) - 1) & 0xffff0000)
333 #define MVNETA_BARE_EN_MASK ((1 << MVNETA_NWINDOW) - 1)
336 /* Ethernet Port Access Protect (MVNETA_EPAP) */
410 /* Port Acceleration Mode (MVNETA_PACC) */
414 /* Port Version (MVNETA_PV) */
430 #define MVNETA_DF(n, x) ((x) << (8 * (n)))
433 #define MVNETA_DF_QUEUE_ALL ((MVNETA_RX_QNUM_MAX-1) << 1)
434 #define MVNETA_DF_QUEUE_MASK ((MVNETA_RX_QNUM_MAX-1) << 1)
439 /* Port Rx Minimal Frame Size (MVNETA_PMFS) */
440 #define MVNETA_PMFS_RXMFS(rxmfs) (((rxmfs) - 40) & 0x7c)
446 #define MVNETA_RQC_DIS_MASK (0xff << 8) /* Disable Q */
447 #define MVNETA_RQC_DISQ(q) (1 << (8 + (q)))
448 #define MVNETA_RQC_DIS(n) ((n) << 8)
453 /* Port RX queues Configuration (MVNETA_PRXC) */
454 #define MVNETA_PRXC_PACKETOFFSET(o) (((o) & 0xf) << 8)
456 /* Port RX queues Snoop (MVNETA_PRXSNP) */
460 /* Port RX queues Descriptors Queue Size (MVNETA_PRXDQS) */
464 /* Port RX queues Descriptors Queue Threshold (MVNETA_PRXDQTH) */
470 /* Port RX queues Status (MVNETA_PRXS) */
478 /* Port RX queues Status Update (MVNETA_PRXSU) */
482 /* Port RX Initialization (MVNETA_PRXINIT) */
492 #define MVNETA_TQC_DIS_MASK (0xff << 8)
493 #define MVNETA_TQC_DISQ(q) (1 << ((q) + 8))/* Disable Q */
494 #define MVNETA_TQC_DIS(n) ((n) << 8)
499 /* Port TX queues Descriptors Queue Size (MVNETA_PTXDQS) */
507 /* Port TX queues Status (MVNETA_PTXS) */
516 /* Port TX queues Status Update (MVNETA_PTXSU) */
526 /* Port TX Initialization (MVNETA_PTXINIT) */
538 /* Port Configuration (MVNETA_PXC) */
545 #define MVNETA_PXC_RBIP (1 << 8)
559 /* Port Configuration Extend (MVNETA_PXCX) */
567 #define MVNETA_MH_MHMASK (0x3 << 8)
568 #define MVNETA_MH_MHMASK_8QUEUES (0x0 << 8)
569 #define MVNETA_MH_MHMASK_4QUEUES (0x1 << 8)
570 #define MVNETA_MH_MHMASK_2QUEUES (0x3 << 8)
582 /* Port Seiral Control0 (MVNETA_PSC0) */
596 /* Ethernet Port Status0 (MVNETA_PS0) */
598 #define MVNETA_PS0_TXFIFOEMP (1 << 8)
608 * Gigabit Ethernet Auto-Negotiation Configuration Registers
610 /* Port Auto-Negotiation Configuration (MVNETA_PANC) */
619 #define MVNETA_PANC_SETFCEN (1 << 8)
629 /* Port MAC Control 0 (MVNETA_PMACC0) */
636 /* Port MAC Control 1 (MVNETA_PMACC1) */
639 /* Port MAC Control 2 (MVNETA_PMACC2) */
655 /* Port MAC Control 3 (MVNETA_PMACC3) */
661 /* Port Interrupt Cause/Mask (MVNETA_PIC/MVNETA_PIM) */
680 #define MVNETA_LPIC0_TSLIMIT(x) (((x) & 0xff) << 8)
701 /* Port PRBS Status (MVNETA_PPRBSS) */
708 /* Port Status Register (MVNETA_PSR) */
715 #define MVNETA_PSR_PRP (1 << 6) /* Port Rx Pause */
716 #define MVNETA_PSR_PTP (1 << 7) /* Port Tx Pause */
717 #define MVNETA_PSR_PDP (1 << 8) /*Port is Doing Back-Pressure*/
726 /* Port CPU to Queue */
728 #define MVNETA_PCP2Q_TXQEN(q) (1 << ((q) + 8))
729 #define MVNETA_PCP2Q_TXQEN_MASK (0xff << 8)
733 /* Port RX_TX Interrupt Threshold */
736 /* Port RX_TX Threshold Interrupt Cause/Mask (MVNETA_PRXTXTIC/MVNETA_PRXTXTIM) */
741 #define MVNETA_PRXTXTI_RBICTAPQ(q) (1 << ((q) + 8))
742 #define MVNETA_PRXTXTI_RBICTAPQ_MASK (0xff << 8)
743 #define MVNETA_PRXTXTI_GET_RBICTAPQ(reg) (((reg) >> 8) & 0xff)
753 /* Port RX_TX Interrupt Cause/Mask (MVNETA_PRXTXIC/MVNETA_PRXTXIM) */
757 #define MVNETA_PRXTXI_RPQ(q) (1 << ((q) + 8))
758 #define MVNETA_PRXTXI_RPQ_MASK (0xff << 8)
759 #define MVNETA_PRXTXI_GET_RPQ(reg) (((reg) >> 8) & 0xff)
767 /* Port Misc Interrupt Cause/Mask (MVNETA_PMIC/MVNETA_PMIM) */
771 #define MVNETA_PMI_RXOVERRUN (1 << 8)
781 /* Port Interrupt Enable (MVNETA_PIE) */
783 #define MVNETA_PIE_TXPKTINTRPTENB(q) (1 << ((q) + 8))
785 #define MVNETA_PIE_TXPKTINTRPTENB_MASK (0xff << 8)
802 #define MVNETA_PPLLC_PLL_LOCK (1 << 8)
900 #define MVNETA_TX_CMD_IP_HEADER_LEN_MASK (0x1f << 8) /* IP header len >> 2 */
901 #define MVNETA_TX_CMD_IP_HEADER_LEN(v) (((v) & 0x1f) << 8)
911 /* bit 29:8 reserved */