Lines Matching full:receive
39 #define MY_TCRRCR 0x18 /* receive & transmit configuration */
42 #define MY_RXPDR 0x24 /* receive polling demand */
43 #define MY_RXCWP 0x28 /* receive current word pointer */
45 #define MY_RXLBA 0x30 /* receive list base address */
55 * Receive Configuration Register
57 #define MY_RXRUN 0x00008000 /* receive running status */
59 #define MY_RFCEN 0x00002000 /* receive flow control packet enable */
61 #define MY_RBLEN 0x00000800 /* receive burst length enable */
73 #define MY_ARP 0x000000008 /* receive runt pkt */
74 #define MY_ALP 0x000000004 /* receive long pkt */
75 #define MY_SEP 0x000000002 /* receive error pkt */
76 #define MY_RE 0x000000001 /* receive enable */
121 * Receive Poll Demand Register
128 #define MY_RFCON 0x00020000 /* receive flow control xon packet */
129 #define MY_RFCOFF 0x00010000 /* receive flow control xoff packet */
138 #define MY_ROVF 0x00000200 /* receive overflow */
140 #define MY_ERI 0x00000080 /* receive early int */
142 #define MY_RBU 0x00000020 /* receive buffer unavailable */
145 #define MY_RI 0x00000004 /* receive interrupt */
146 #define MY_RxErr 0x00000002 /* receive error */
151 #define MY_MRFCON 0x00020000 /* receive flow control xon packet */
152 #define MY_MRFCOFF 0x00010000 /* receive flow control xoff packet */
158 #define MY_MROVF 0x00000200 /* receive overflow */
160 #define MY_MERI 0x00000080 /* receive early int */
162 #define MY_MRBU 0x00000020 /* receive buffer unavailable */
165 #define MY_MRI 0x00000004 /* receive interrupt */
166 #define MY_MRxErr 0x00000002 /* receive error */
225 * receive descriptor 0
240 #define MY_RXER 0x00000004 /* receive error */
245 * receive descriptor 1
248 #define MY_RBSMASK 0x000007ff /* receive buffer size */