Lines Matching +full:poll +full:- +full:retry +full:- +full:count

1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
33 #define MY_PAR0         0x0     /* physical address 0-3 */
34 #define MY_PAR1         0x04    /* physical address 4-5 */
35 #define MY_MAR0         0x08    /* multicast address 0-3 */
36 #define MY_MAR1         0x0C    /* multicast address 4-7 */
37 #define MY_FAR0         0x10    /* flow-control address 0-3 */
38 #define MY_FAR1         0x14    /* flow-control address 4-5 */
116  * Transmit Poll Demand Register
121  * Receive Poll Demand Register
191 #define MY_CRCMask      0x7fff0000      /* crc number: bit 16-30 */
194 #define MY_MPAMask      0x00007fff      /* mpa number: bit 0-14 */
204 #define MY_NCRMask        0x0000ffff    /* transmit retry number */
262 #define MY_NCRMASK      0x000000ff      /* collision retry count */
276 #define MY_RetryTxLC	0x02000000	/* retry late collision */
289  * multi-fragment descriptor layout found in devices such as the
303 #define MY_TXSTATUS(x)  x->my_ptr->my_frag[x->my_lastdesc].my_status
304 #define MY_TXCTL(x)     x->my_ptr->my_frag[x->my_lastdesc].my_ctl
305 #define MY_TXDATA(x)    x->my_ptr->my_frag[x->my_lastdesc].my_data
306 #define MY_TXNEXT(x)    x->my_ptr->my_frag[x->my_lastdesc].my_next
308 #define MY_TXOWN(x)     x->my_ptr->my_frag[0].my_status
381 #define	MY_LOCK(_sc)		mtx_lock(&(_sc)->my_mtx)
382 #define	MY_UNLOCK(_sc)		mtx_unlock(&(_sc)->my_mtx)
383 #define	MY_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->my_mtx, MA_OWNED)
389         bus_space_write_4(sc->my_btag, sc->my_bhandle, reg, val)
391         bus_space_write_2(sc->my_btag, sc->my_bhandle, reg, val)
393         bus_space_write_1(sc->my_btag, sc->my_bhandle, reg, val)
396         bus_space_read_4(sc->my_btag, sc->my_bhandle, reg)
398         bus_space_read_2(sc->my_btag, sc->my_bhandle, reg)
400         bus_space_read_1(sc->my_btag, sc->my_bhandle, reg)
549  * Link speed is selected byt his bit or if auto-negotiation if bit