Lines Matching refs:mh
98 pCmd = (type *)&mh->mh_cmdbuf[0]; \
127 struct mwl_hal_priv *mh; /* back pointer */ member
136 #define MWLVAP(_vap) ((_vap)->mh)
197 MWL_HAL_LOCK(struct mwl_hal_priv *mh) in MWL_HAL_LOCK() argument
199 mtx_lock(&mh->mh_mtx); in MWL_HAL_LOCK()
203 MWL_HAL_LOCK_ASSERT(struct mwl_hal_priv *mh) in MWL_HAL_LOCK_ASSERT() argument
205 mtx_assert(&mh->mh_mtx, MA_OWNED); in MWL_HAL_LOCK_ASSERT()
209 MWL_HAL_UNLOCK(struct mwl_hal_priv *mh) in MWL_HAL_UNLOCK() argument
211 mtx_unlock(&mh->mh_mtx); in MWL_HAL_UNLOCK()
215 RD4(struct mwl_hal_priv *mh, bus_size_t off) in RD4() argument
217 return bus_space_read_4(mh->public.mh_iot, mh->public.mh_ioh, off); in RD4()
221 WR4(struct mwl_hal_priv *mh, bus_size_t off, uint32_t val) in WR4() argument
223 bus_space_write_4(mh->public.mh_iot, mh->public.mh_ioh, off, val); in WR4()
246 struct mwl_hal_priv *mh; in mwl_hal_attach() local
250 mh = malloc(sizeof(struct mwl_hal_priv), M_DEVBUF, M_NOWAIT | M_ZERO); in mwl_hal_attach()
251 if (mh == NULL) in mwl_hal_attach()
253 mh->mh_dev = dev; in mwl_hal_attach()
254 mh->public.mh_ioh = ioh; in mwl_hal_attach()
255 mh->public.mh_iot = iot; in mwl_hal_attach()
257 mh->mh_streams[i].public.txq = ba2qid[i]; in mwl_hal_attach()
258 mh->mh_streams[i].stream = i; in mwl_hal_attach()
260 if (mh->mh_streams[i].public.txq < MWL_BAQID_MAX) in mwl_hal_attach()
261 qid2ba[mh->mh_streams[i].public.txq] = i; in mwl_hal_attach()
264 "stream %d\n", mh->mh_streams[i].public.txq, i); in mwl_hal_attach()
269 hvap = &mh->mh_vaps[i]; in mwl_hal_attach()
274 hvap = &mh->mh_vaps[i]; in mwl_hal_attach()
279 hvap = &mh->mh_vaps[i]; in mwl_hal_attach()
284 hvap = &mh->mh_vaps[i]; in mwl_hal_attach()
289 mh->mh_revs.mh_devid = devid; in mwl_hal_attach()
290 snprintf(mh->mh_mtxname, sizeof(mh->mh_mtxname), in mwl_hal_attach()
292 mtx_init(&mh->mh_mtx, mh->mh_mtxname, NULL, MTX_DEF); in mwl_hal_attach()
310 &mh->mh_dmat); in mwl_hal_attach()
318 error = bus_dmamem_alloc(mh->mh_dmat, (void**) &mh->mh_cmdbuf, in mwl_hal_attach()
320 &mh->mh_dmamap); in mwl_hal_attach()
327 error = bus_dmamap_load(mh->mh_dmat, mh->mh_dmamap, in mwl_hal_attach()
328 mh->mh_cmdbuf, MWL_CMDBUF_SIZE, in mwl_hal_attach()
329 mwl_hal_load_cb, &mh->mh_cmdaddr, in mwl_hal_attach()
349 mh->mh_SDRAMSIZE_Addr = 0x40fe70b7; /* 8M SDRAM */ in mwl_hal_attach()
352 mh->mh_SDRAMSIZE_Addr = 0x40fc70b7; /* 16M SDRAM */ in mwl_hal_attach()
357 return &mh->public; in mwl_hal_attach()
359 bus_dmamem_free(mh->mh_dmat, mh->mh_cmdbuf, mh->mh_dmamap); in mwl_hal_attach()
361 bus_dma_tag_destroy(mh->mh_dmat); in mwl_hal_attach()
363 mtx_destroy(&mh->mh_mtx); in mwl_hal_attach()
364 free(mh, M_DEVBUF); in mwl_hal_attach()
371 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_detach() local
373 bus_dmamem_free(mh->mh_dmat, mh->mh_cmdbuf, mh->mh_dmamap); in mwl_hal_detach()
374 bus_dma_tag_destroy(mh->mh_dmat); in mwl_hal_detach()
375 mtx_destroy(&mh->mh_mtx); in mwl_hal_detach()
376 free(mh, M_DEVBUF); in mwl_hal_detach()
383 mwlResetHalState(struct mwl_hal_priv *mh) in mwlResetHalState() argument
388 mh->mh_bastreams = (1<<MWL_BASTREAMS_MAX)-1; in mwlResetHalState()
390 mh->mh_vaps[i].mh = NULL; in mwlResetHalState()
394 mh->mh_RTSSuccesses = 0; in mwlResetHalState()
395 mh->mh_RTSFailures = 0; in mwlResetHalState()
396 mh->mh_RxDuplicateFrames = 0; in mwlResetHalState()
397 mh->mh_FCSErrorCount = 0; in mwlResetHalState()
403 if ((mh->mh_flags & MHF_CALDATA) == 0) in mwlResetHalState()
404 mwlGetPwrCalTable(mh); in mwlResetHalState()
412 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_newvap() local
416 MWL_HAL_LOCK(mh); in mwl_hal_newvap()
419 vap = &mh->mh_vaps[i]; in mwl_hal_newvap()
420 if (vap->vap_type == type && vap->mh == NULL) { in mwl_hal_newvap()
421 vap->mh = mh; in mwl_hal_newvap()
426 MWL_HAL_UNLOCK(mh); in mwl_hal_newvap()
434 vap->mh = NULL; in mwl_hal_delvap()
444 mwl_hal_setdebug(struct mwl_hal *mh, int debug) in mwl_hal_setdebug() argument
446 MWLPRIV(mh)->mh_debug = debug; in mwl_hal_setdebug()
450 mwl_hal_getdebug(struct mwl_hal *mh) in mwl_hal_getdebug() argument
452 return MWLPRIV(mh)->mh_debug; in mwl_hal_getdebug()
456 mwl_hal_setbastreams(struct mwl_hal *mh, int mask) in mwl_hal_setbastreams() argument
458 MWLPRIV(mh)->mh_bastreams = mask & ((1<<MWL_BASTREAMS_MAX)-1); in mwl_hal_setbastreams()
462 mwl_hal_getbastreams(struct mwl_hal *mh) in mwl_hal_getbastreams() argument
464 return MWLPRIV(mh)->mh_bastreams; in mwl_hal_getbastreams()
468 mwl_hal_ismbsscapable(struct mwl_hal *mh) in mwl_hal_ismbsscapable() argument
470 return (MWLPRIV(mh)->mh_flags & MHF_MBSS) != 0; in mwl_hal_ismbsscapable()
482 struct mwl_hal_priv *mh = MWLPRIV(mh0);
485 cause = RD4(mh, MACREG_REG_A2H_INTERRUPT_CAUSE);
487 device_printf(mh->mh_dev, "%s: cause 0x%x\n", __func__, cause);
491 WR4(mh, MACREG_REG_A2H_INTERRUPT_CAUSE,
492 cause &~ mh->public.mh_imask);
493 RD4(mh, MACREG_REG_INT_CODE); /* XXX flush write? */
505 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_intrset() local
507 WR4(mh, MACREG_REG_A2H_INTERRUPT_MASK, 0); in mwl_hal_intrset()
508 RD4(mh, MACREG_REG_INT_CODE); in mwl_hal_intrset()
510 mh->public.mh_imask = mask; in mwl_hal_intrset()
511 WR4(mh, MACREG_REG_A2H_INTERRUPT_MASK, mask); in mwl_hal_intrset()
512 RD4(mh, MACREG_REG_INT_CODE); in mwl_hal_intrset()
525 struct mwl_hal_priv *mh = MWLPRIV(mh0);
528 WR4(mh, MACREG_REG_H2A_INTERRUPT_EVENTS, MACREG_H2ARIC_BIT_PPA_READY);
529 dummy = RD4(mh, MACREG_REG_INT_CODE);
542 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_cmddone()
544 if (mh->mh_debug & MWL_HAL_DEBUG_CMDDONE) { in mwl_hal_cmddone()
545 device_printf(mh->mh_dev, "cmd done interrupt:\n"); in mwl_hal_cmddone()
546 dumpresult(mh, 1); in mwl_hal_cmddone()
560 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_gethwspecs() local
564 MWL_HAL_LOCK(mh); in mwl_hal_gethwspecs()
567 pCmd->ulFwAwakeCookie = htole32((unsigned int)mh->mh_cmdaddr+2048); in mwl_hal_gethwspecs()
569 retval = mwlExecuteCmd(mh, HostCmd_CMD_GET_HW_SPEC); in mwl_hal_gethwspecs()
586 mh->mh_revs.mh_macRev = hw->hwVersion; /* XXX */ in mwl_hal_gethwspecs()
587 mh->mh_revs.mh_phyRev = hw->hostInterface; /* XXX */ in mwl_hal_gethwspecs()
592 mh->mh_bastreams &= (1<<MWL_BASTREAMS_MAX)-1; in mwl_hal_gethwspecs()
594 mh->mh_bastreams &= (1<<2)-1; in mwl_hal_gethwspecs()
596 MWL_HAL_UNLOCK(mh); in mwl_hal_gethwspecs()
608 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_sethwdma() local
612 MWL_HAL_LOCK(mh); in mwl_hal_sethwdma()
628 if (mh->mh_revs.mh_macRev < 5) in mwl_hal_sethwdma()
631 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_HW_SPEC); in mwl_hal_sethwdma()
634 mh->mh_flags &= ~MHF_MBSS; in mwl_hal_sethwdma()
636 mh->mh_flags |= MHF_MBSS; in mwl_hal_sethwdma()
638 MWL_HAL_UNLOCK(mh); in mwl_hal_sethwdma()
649 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_gethwstats() local
653 MWL_HAL_LOCK(mh); in mwl_hal_gethwstats()
657 retval = mwlExecuteCmd(mh, HostCmd_CMD_802_11_GET_STAT); in mwl_hal_gethwstats()
671 mh->mh_RTSSuccesses += RD4(mh, 0xa834); in mwl_hal_gethwstats()
672 mh->mh_RTSFailures += RD4(mh, 0xa830); in mwl_hal_gethwstats()
673 mh->mh_RxDuplicateFrames += RD4(mh, 0xa84c); in mwl_hal_gethwstats()
674 mh->mh_FCSErrorCount += RD4(mh, 0xa840); in mwl_hal_gethwstats()
676 MWL_HAL_UNLOCK(mh); in mwl_hal_gethwstats()
678 stats->RTSSuccesses = mh->mh_RTSSuccesses; in mwl_hal_gethwstats()
679 stats->RTSFailures = mh->mh_RTSFailures; in mwl_hal_gethwstats()
680 stats->RxDuplicateFrames = mh->mh_RxDuplicateFrames; in mwl_hal_gethwstats()
681 stats->FCSErrorCount = mh->mh_FCSErrorCount; in mwl_hal_gethwstats()
692 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_sethtgi() local
696 MWL_HAL_LOCK(mh); in mwl_hal_sethtgi()
709 retval = mwlExecuteCmd(mh, HostCmd_CMD_HT_GUARD_INTERVAL); in mwl_hal_sethtgi()
710 MWL_HAL_UNLOCK(mh); in mwl_hal_sethtgi()
722 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setradio() local
726 MWL_HAL_LOCK(mh); in mwl_hal_setradio()
736 retval = mwlExecuteCmd(mh, HostCmd_CMD_802_11_RADIO_CONTROL); in mwl_hal_setradio()
737 MWL_HAL_UNLOCK(mh); in mwl_hal_setradio()
750 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setantenna() local
757 MWL_HAL_LOCK(mh); in mwl_hal_setantenna()
765 retval = mwlExecuteCmd(mh, HostCmd_CMD_802_11_RF_ANTENNA); in mwl_hal_setantenna()
766 MWL_HAL_UNLOCK(mh); in mwl_hal_setantenna()
778 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_setrtsthreshold() local
782 MWL_HAL_LOCK(mh); in mwl_hal_setrtsthreshold()
788 retval = mwlExecuteCmd(mh, HostCmd_CMD_802_11_RTS_THSD); in mwl_hal_setrtsthreshold()
789 MWL_HAL_UNLOCK(mh); in mwl_hal_setrtsthreshold()
799 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_setinframode() local
803 MWL_HAL_LOCK(mh); in mwl_hal_setinframode()
807 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_INFRA_MODE); in mwl_hal_setinframode()
808 MWL_HAL_UNLOCK(mh); in mwl_hal_setinframode()
818 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setradardetection() local
822 MWL_HAL_LOCK(mh); in mwl_hal_setradardetection()
827 if (mh->mh_regioncode == DOMAIN_CODE_ETSI_131) in mwl_hal_setradardetection()
830 retval = mwlExecuteCmd(mh, HostCmd_CMD_802_11H_DETECT_RADAR); in mwl_hal_setradardetection()
831 MWL_HAL_UNLOCK(mh); in mwl_hal_setradardetection()
887 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setchannelswitchie() local
891 MWL_HAL_LOCK(mh); in mwl_hal_setchannelswitchie()
899 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_SWITCH_CHANNEL); in mwl_hal_setchannelswitchie()
900 MWL_HAL_UNLOCK(mh); in mwl_hal_setchannelswitchie()
910 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setregioncode() local
914 MWL_HAL_LOCK(mh); in mwl_hal_setregioncode()
927 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_REGION_CODE); in mwl_hal_setregioncode()
929 mh->mh_regioncode = regionCode; in mwl_hal_setregioncode()
930 MWL_HAL_UNLOCK(mh); in mwl_hal_setregioncode()
941 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_settxrate() local
946 MWL_HAL_LOCK(mh); in mwl_hal_settxrate()
986 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_FIXED_RATE); in mwl_hal_settxrate()
987 MWL_HAL_UNLOCK(mh); in mwl_hal_settxrate()
994 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_settxrate_auto() local
998 MWL_HAL_LOCK(mh); in mwl_hal_settxrate_auto()
1009 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_FIXED_RATE); in mwl_hal_settxrate_auto()
1010 MWL_HAL_UNLOCK(mh); in mwl_hal_settxrate_auto()
1020 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setslottime() local
1027 MWL_HAL_LOCK(mh); in mwl_hal_setslottime()
1033 retval = mwlExecuteCmd(mh, HostCmd_CMD_802_11_SET_SLOT); in mwl_hal_setslottime()
1034 MWL_HAL_UNLOCK(mh); in mwl_hal_setslottime()
1041 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_adjusttxpower() local
1045 MWL_HAL_LOCK(mh); in mwl_hal_adjusttxpower()
1058 retval = mwlExecuteCmd(mh, HostCmd_CMD_802_11_RF_TX_POWER); in mwl_hal_adjusttxpower()
1059 MWL_HAL_UNLOCK(mh); in mwl_hal_adjusttxpower()
1064 findchannel(const struct mwl_hal_priv *mh, const MWL_HAL_CHANNEL *c) in findchannel() argument
1073 ci = &mh->mh_40M; in findchannel()
1077 ci = &mh->mh_20M; in findchannel()
1082 ci = &mh->mh_40M_5G; in findchannel()
1086 ci = &mh->mh_20M_5G; in findchannel()
1100 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_settxpower() local
1105 hc = findchannel(mh, c); in mwl_hal_settxpower()
1108 device_printf(mh->mh_dev, in mwl_hal_settxpower()
1115 MWL_HAL_LOCK(mh); in mwl_hal_settxpower()
1129 retval = mwlExecuteCmd(mh, HostCmd_CMD_802_11_RF_TX_POWER); in mwl_hal_settxpower()
1130 MWL_HAL_UNLOCK(mh); in mwl_hal_settxpower()
1138 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_getchannelinfo() local
1142 *ci = (chw == MWL_CH_20_MHz_WIDTH) ? &mh->mh_20M : &mh->mh_40M; in mwl_hal_getchannelinfo()
1146 &mh->mh_20M_5G : &mh->mh_40M_5G; in mwl_hal_getchannelinfo()
1157 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setmcast() local
1164 MWL_HAL_LOCK(mh); in mwl_hal_setmcast()
1171 retval = mwlExecuteCmd(mh, HostCmd_CMD_MAC_MULTICAST_ADR); in mwl_hal_setmcast()
1172 MWL_HAL_UNLOCK(mh); in mwl_hal_setmcast()
1180 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_keyset() local
1184 MWL_HAL_LOCK(mh); in mwl_hal_keyset()
1221 retval = mwlExecuteCmd(mh, HostCmd_CMD_UPDATE_ENCRYPTION); in mwl_hal_keyset()
1222 MWL_HAL_UNLOCK(mh); in mwl_hal_keyset()
1229 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_keyreset() local
1233 MWL_HAL_LOCK(mh); in mwl_hal_keyreset()
1246 retval = mwlExecuteCmd(mh, HostCmd_CMD_UPDATE_ENCRYPTION); in mwl_hal_keyreset()
1247 MWL_HAL_UNLOCK(mh); in mwl_hal_keyreset()
1255 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_setmac_locked() local
1264 return mwlExecuteCmd(mh, HostCmd_CMD_SET_MAC_ADDR); in mwl_hal_setmac_locked()
1270 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_setmac() local
1273 MWL_HAL_LOCK(mh); in mwl_hal_setmac()
1275 MWL_HAL_UNLOCK(mh); in mwl_hal_setmac()
1282 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_setbeacon() local
1287 MWL_HAL_LOCK(mh); in mwl_hal_setbeacon()
1294 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_BEACON); in mwl_hal_setbeacon()
1295 MWL_HAL_UNLOCK(mh); in mwl_hal_setbeacon()
1302 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_setpowersave_bss() local
1306 MWL_HAL_LOCK(mh); in mwl_hal_setpowersave_bss()
1311 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_POWERSAVESTATION); in mwl_hal_setpowersave_bss()
1312 MWL_HAL_UNLOCK(mh); in mwl_hal_setpowersave_bss()
1319 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_setpowersave_sta() local
1323 MWL_HAL_LOCK(mh); in mwl_hal_setpowersave_sta()
1328 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_TIM); in mwl_hal_setpowersave_sta()
1329 MWL_HAL_UNLOCK(mh); in mwl_hal_setpowersave_sta()
1337 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_setassocid() local
1338 HostCmd_FW_SET_AID *pCmd = (HostCmd_FW_SET_AID *) &mh->mh_cmdbuf[0]; in mwl_hal_setassocid()
1341 MWL_HAL_LOCK(mh); in mwl_hal_setassocid()
1346 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_AID); in mwl_hal_setassocid()
1347 MWL_HAL_UNLOCK(mh); in mwl_hal_setassocid()
1354 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setchannel() local
1358 MWL_HAL_LOCK(mh); in mwl_hal_setchannel()
1364 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_RF_CHANNEL); in mwl_hal_setchannel()
1365 MWL_HAL_UNLOCK(mh); in mwl_hal_setchannel()
1374 struct mwl_hal_priv *mh = MWLVAP(vap); in bastream_check_available() local
1378 MWL_HAL_LOCK_ASSERT(mh); in bastream_check_available()
1399 retval = mwlExecuteCmd(mh, HostCmd_CMD_BASTREAM); in bastream_check_available()
1417 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_bastream_alloc() local
1421 MWL_HAL_LOCK(mh); in mwl_hal_bastream_alloc()
1422 if (mh->mh_bastreams == 0) { in mwl_hal_bastream_alloc()
1424 MWL_HAL_UNLOCK(mh); in mwl_hal_bastream_alloc()
1427 for (s = 0; (mh->mh_bastreams & (1<<s)) == 0; s++) in mwl_hal_bastream_alloc()
1430 MWL_HAL_UNLOCK(mh); in mwl_hal_bastream_alloc()
1433 sp = &mh->mh_streams[s]; in mwl_hal_bastream_alloc()
1434 mh->mh_bastreams &= ~(1<<s); in mwl_hal_bastream_alloc()
1442 MWL_HAL_UNLOCK(mh); in mwl_hal_bastream_alloc()
1449 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_bastream_lookup() local
1453 if (mh->mh_bastreams & (1<<s)) in mwl_hal_bastream_lookup()
1455 return &mh->mh_streams[s].public; in mwl_hal_bastream_lookup()
1466 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_bastream_create() local
1471 MWL_HAL_LOCK(mh); in mwl_hal_bastream_create()
1500 retval = mwlExecuteCmd(mh, HostCmd_CMD_BASTREAM); in mwl_hal_bastream_create()
1512 MWL_HAL_UNLOCK(mh); in mwl_hal_bastream_create()
1519 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_bastream_destroy() local
1528 MWL_HAL_LOCK(mh); in mwl_hal_bastream_destroy()
1535 retval = mwlExecuteCmd(mh, HostCmd_CMD_BASTREAM); in mwl_hal_bastream_destroy()
1539 mh->mh_bastreams |= 1<<sp->stream; in mwl_hal_bastream_destroy()
1543 MWL_HAL_UNLOCK(mh); in mwl_hal_bastream_destroy()
1552 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_bastream_get_seqno() local
1557 MWL_HAL_LOCK(mh); in mwl_hal_bastream_get_seqno()
1562 retval = mwlExecuteCmd(mh, HostCmd_CMD_GET_SEQNO); in mwl_hal_bastream_get_seqno()
1565 MWL_HAL_UNLOCK(mh); in mwl_hal_bastream_get_seqno()
1572 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_getwatchdogbitmap() local
1576 MWL_HAL_LOCK(mh); in mwl_hal_getwatchdogbitmap()
1580 retval = mwlExecuteCmd(mh, HostCmd_CMD_GET_WATCHDOG_BITMAP); in mwl_hal_getwatchdogbitmap()
1587 MWL_HAL_UNLOCK(mh); in mwl_hal_getwatchdogbitmap()
1597 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setaggampduratemode() local
1601 MWL_HAL_LOCK(mh); in mwl_hal_setaggampduratemode()
1608 retval = mwlExecuteCmd(mh, HostCmd_CMD_AMPDU_RETRY_RATEDROP_MODE); in mwl_hal_setaggampduratemode()
1609 MWL_HAL_UNLOCK(mh); in mwl_hal_setaggampduratemode()
1616 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_getaggampduratemode() local
1620 MWL_HAL_LOCK(mh); in mwl_hal_getaggampduratemode()
1625 retval = mwlExecuteCmd(mh, HostCmd_CMD_AMPDU_RETRY_RATEDROP_MODE); in mwl_hal_getaggampduratemode()
1626 MWL_HAL_UNLOCK(mh); in mwl_hal_getaggampduratemode()
1638 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setcfend() local
1642 MWL_HAL_LOCK(mh); in mwl_hal_setcfend()
1647 retval = mwlExecuteCmd(mh, HostCmd_CMD_CFEND_ENABLE); in mwl_hal_setcfend()
1648 MWL_HAL_UNLOCK(mh); in mwl_hal_setcfend()
1656 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setdwds() local
1659 MWL_HAL_LOCK(mh); in mwl_hal_setdwds()
1662 retval = mwlExecuteCmd(mh, HostCmd_CMD_DWDS_ENABLE); in mwl_hal_setdwds()
1663 MWL_HAL_UNLOCK(mh); in mwl_hal_setdwds()
1687 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_newstation() local
1691 MWL_HAL_LOCK(mh); in mwl_hal_newstation()
1704 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_NEW_STN); in mwl_hal_newstation()
1707 MWL_HAL_UNLOCK(mh); in mwl_hal_newstation()
1715 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_delstation() local
1719 MWL_HAL_LOCK(mh); in mwl_hal_delstation()
1726 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_NEW_STN); in mwl_hal_delstation()
1731 MWL_HAL_UNLOCK(mh); in mwl_hal_delstation()
1742 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setkeepalive() local
1746 MWL_HAL_LOCK(mh); in mwl_hal_setkeepalive()
1755 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_KEEP_ALIVE); in mwl_hal_setkeepalive()
1756 MWL_HAL_UNLOCK(mh); in mwl_hal_setkeepalive()
1763 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_setapmode() local
1769 MWL_HAL_LOCK(mh); in mwl_hal_setapmode()
1773 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_APMODE); in mwl_hal_setapmode()
1774 MWL_HAL_UNLOCK(mh); in mwl_hal_setapmode()
1781 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_stop() local
1785 MWL_HAL_LOCK(mh); in mwl_hal_stop()
1790 retval = mwlExecuteCmd(mh, HostCmd_CMD_BSS_START); in mwl_hal_stop()
1795 MWL_HAL_UNLOCK(mh); in mwl_hal_stop()
1802 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_start() local
1806 MWL_HAL_LOCK(mh); in mwl_hal_start()
1810 retval = mwlExecuteCmd(mh, HostCmd_CMD_BSS_START); in mwl_hal_start()
1813 MWL_HAL_UNLOCK(mh); in mwl_hal_start()
1820 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setgprot() local
1824 MWL_HAL_LOCK(mh); in mwl_hal_setgprot()
1829 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_G_PROTECT_FLAG); in mwl_hal_setgprot()
1830 MWL_HAL_UNLOCK(mh); in mwl_hal_setgprot()
1837 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setwmm() local
1841 MWL_HAL_LOCK(mh); in mwl_hal_setwmm()
1846 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_WMM_MODE); in mwl_hal_setwmm()
1847 MWL_HAL_UNLOCK(mh); in mwl_hal_setwmm()
1855 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setedcaparams() local
1859 MWL_HAL_LOCK(mh); in mwl_hal_setedcaparams()
1874 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_EDCA_PARAMS); in mwl_hal_setedcaparams()
1875 MWL_HAL_UNLOCK(mh); in mwl_hal_setedcaparams()
1883 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setrateadaptmode() local
1887 MWL_HAL_LOCK(mh); in mwl_hal_setrateadaptmode()
1893 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_RATE_ADAPT_MODE); in mwl_hal_setrateadaptmode()
1894 MWL_HAL_UNLOCK(mh); in mwl_hal_setrateadaptmode()
1901 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setcsmode() local
1905 MWL_HAL_LOCK(mh); in mwl_hal_setcsmode()
1911 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_LINKADAPT_CS_MODE); in mwl_hal_setcsmode()
1912 MWL_HAL_UNLOCK(mh); in mwl_hal_setcsmode()
1919 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_setnprot() local
1924 MWL_HAL_LOCK(mh); in mwl_hal_setnprot()
1929 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_N_PROTECT_FLAG); in mwl_hal_setnprot()
1930 MWL_HAL_UNLOCK(mh); in mwl_hal_setnprot()
1937 struct mwl_hal_priv *mh = MWLVAP(vap); in mwl_hal_setnprotmode() local
1941 MWL_HAL_LOCK(mh); in mwl_hal_setnprotmode()
1946 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_N_PROTECT_OPMODE); in mwl_hal_setnprotmode()
1947 MWL_HAL_UNLOCK(mh); in mwl_hal_setnprotmode()
1954 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setoptimizationlevel() local
1958 MWL_HAL_LOCK(mh); in mwl_hal_setoptimizationlevel()
1963 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_OPTIMIZATION_LEVEL); in mwl_hal_setoptimizationlevel()
1964 MWL_HAL_UNLOCK(mh); in mwl_hal_setoptimizationlevel()
1972 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setmimops() local
1976 MWL_HAL_LOCK(mh); in mwl_hal_setmimops()
1982 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_MIMOPSHT); in mwl_hal_setmimops()
1983 MWL_HAL_UNLOCK(mh); in mwl_hal_setmimops()
1988 mwlGetCalTable(struct mwl_hal_priv *mh, uint8_t annex, uint8_t index) in mwlGetCalTable() argument
1993 MWL_HAL_LOCK_ASSERT(mh); in mwlGetCalTable()
2000 retval = mwlExecuteCmd(mh, HostCmd_CMD_GET_CALTABLE); in mwlGetCalTable()
2097 mwlGetPwrCalTable(struct mwl_hal_priv *mh) in mwlGetPwrCalTable() argument
2103 MWL_HAL_LOCK(mh); in mwlGetPwrCalTable()
2105 data = ((const HostCmd_FW_GET_CALTABLE *) mh->mh_cmdbuf)->calTbl; in mwlGetPwrCalTable()
2106 if (mwlGetCalTable(mh, 33, 0) == 0) { in mwlGetPwrCalTable()
2113 get2Ghz(&mh->mh_20M, &data[12], len); in mwlGetPwrCalTable()
2115 if (mwlGetCalTable(mh, 34, 0) == 0) { in mwlGetPwrCalTable()
2122 ci = &mh->mh_40M; in mwlGetPwrCalTable()
2125 if (mwlGetCalTable(mh, 35, 0) == 0) { in mwlGetPwrCalTable()
2132 get5Ghz(&mh->mh_20M_5G, &data[20], len); in mwlGetPwrCalTable()
2134 if (mwlGetCalTable(mh, 36, 0) == 0) { in mwlGetPwrCalTable()
2141 ci = &mh->mh_40M_5G; in mwlGetPwrCalTable()
2144 mh->mh_flags |= MHF_CALDATA; in mwlGetPwrCalTable()
2145 MWL_HAL_UNLOCK(mh); in mwlGetPwrCalTable()
2152 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_getregioncode() local
2155 MWL_HAL_LOCK(mh); in mwl_hal_getregioncode()
2156 retval = mwlGetCalTable(mh, 0, 0); in mwl_hal_getregioncode()
2159 (const HostCmd_FW_GET_CALTABLE *) mh->mh_cmdbuf; in mwl_hal_getregioncode()
2162 MWL_HAL_UNLOCK(mh); in mwl_hal_getregioncode()
2169 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_setpromisc() local
2172 MWL_HAL_LOCK(mh); in mwl_hal_setpromisc()
2173 v = RD4(mh, MACREG_REG_PROMISCUOUS); in mwl_hal_setpromisc()
2174 WR4(mh, MACREG_REG_PROMISCUOUS, ena ? v | 1 : v &~ 1); in mwl_hal_setpromisc()
2175 MWL_HAL_UNLOCK(mh); in mwl_hal_setpromisc()
2182 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_getpromisc() local
2185 MWL_HAL_LOCK(mh); in mwl_hal_getpromisc()
2186 v = RD4(mh, MACREG_REG_PROMISCUOUS); in mwl_hal_getpromisc()
2187 MWL_HAL_UNLOCK(mh); in mwl_hal_getpromisc()
2194 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_GetBeacon() local
2198 MWL_HAL_LOCK(mh); in mwl_hal_GetBeacon()
2202 retval = mwlExecuteCmd(mh, HostCmd_CMD_GET_BEACON); in mwl_hal_GetBeacon()
2208 MWL_HAL_UNLOCK(mh); in mwl_hal_GetBeacon()
2215 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_SetRifs() local
2219 MWL_HAL_LOCK(mh); in mwl_hal_SetRifs()
2223 retval = mwlExecuteCmd(mh, HostCmd_CMD_SET_RIFS); in mwl_hal_SetRifs()
2224 MWL_HAL_UNLOCK(mh); in mwl_hal_SetRifs()
2233 getRFReg(struct mwl_hal_priv *mh, int flag, uint32_t reg, uint32_t *val) in getRFReg() argument
2238 MWL_HAL_LOCK(mh); in getRFReg()
2244 retval = mwlExecuteCmd(mh, HostCmd_CMD_RF_REG_ACCESS); in getRFReg()
2247 MWL_HAL_UNLOCK(mh); in getRFReg()
2252 getBBReg(struct mwl_hal_priv *mh, int flag, uint32_t reg, uint32_t *val) in getBBReg() argument
2257 MWL_HAL_LOCK(mh); in getBBReg()
2263 retval = mwlExecuteCmd(mh, HostCmd_CMD_BBP_REG_ACCESS); in getBBReg()
2266 MWL_HAL_UNLOCK(mh); in getBBReg()
2271 mwl_hal_getregdump(struct mwl_hal_priv *mh, const MWL_DIAG_REGRANGE *regs, in mwl_hal_getregdump() argument
2284 *dp = RD4(mh, r); in mwl_hal_getregdump()
2286 getBBReg(mh, HostCmd_ACT_GEN_READ, in mwl_hal_getregdump()
2289 getRFReg(mh, HostCmd_ACT_GEN_READ, in mwl_hal_getregdump()
2292 *dp = RD4(mh, r); in mwl_hal_getregdump()
2308 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_getdiagstate() local
2312 *result = &mh->mh_revs; in mwl_hal_getdiagstate()
2313 *resultsize = sizeof(mh->mh_revs); in mwl_hal_getdiagstate()
2316 *resultsize = mwl_hal_getregdump(mh, args, *result, *resultsize); in mwl_hal_getdiagstate()
2319 FWCmdHdr *pCmd = (FWCmdHdr *) &mh->mh_cmdbuf[0]; in mwl_hal_getdiagstate()
2322 MWL_HAL_LOCK(mh); in mwl_hal_getdiagstate()
2324 retval = mwlExecuteCmd(mh, le16toh(pCmd->Cmd)); in mwl_hal_getdiagstate()
2326 MWL_HAL_UNLOCK(mh); in mwl_hal_getdiagstate()
2331 device_printf(mh->mh_dev, "problem loading fw image\n"); in mwl_hal_getdiagstate()
2344 mwlSendCmd(struct mwl_hal_priv *mh) in mwlSendCmd() argument
2347 bus_dmamap_sync(mh->mh_dmat, mh->mh_dmamap, in mwlSendCmd()
2350 WR4(mh, MACREG_REG_GEN_PTR, mh->mh_cmdaddr); in mwlSendCmd()
2351 RD4(mh, MACREG_REG_INT_CODE); in mwlSendCmd()
2353 WR4(mh, MACREG_REG_H2A_INTERRUPT_EVENTS, MACREG_H2ARIC_BIT_DOOR_BELL); in mwlSendCmd()
2357 mwlWaitForCmdComplete(struct mwl_hal_priv *mh, uint16_t cmdCode) in mwlWaitForCmdComplete() argument
2363 if (mh->mh_cmdbuf[0] == le16toh(cmdCode)) in mwlWaitForCmdComplete()
2372 mwlExecuteCmd(struct mwl_hal_priv *mh, unsigned short cmd) in mwlExecuteCmd() argument
2375 MWL_HAL_LOCK_ASSERT(mh); in mwlExecuteCmd()
2377 if ((mh->mh_flags & MHF_FWHANG) && in mwlExecuteCmd()
2378 (mh->mh_debug & MWL_HAL_DEBUG_IGNHANG) == 0) { in mwlExecuteCmd()
2380 device_printf(mh->mh_dev, "firmware hung, skipping cmd %s\n", in mwlExecuteCmd()
2383 device_printf(mh->mh_dev, "firmware hung, skipping cmd 0x%x\n", in mwlExecuteCmd()
2388 if (RD4(mh, MACREG_REG_INT_CODE) == 0xffffffff) { in mwlExecuteCmd()
2389 device_printf(mh->mh_dev, "%s: device not present!\n", in mwlExecuteCmd()
2394 if (mh->mh_debug & MWL_HAL_DEBUG_SENDCMD) in mwlExecuteCmd()
2395 dumpresult(mh, 0); in mwlExecuteCmd()
2397 mwlSendCmd(mh); in mwlExecuteCmd()
2398 if (!mwlWaitForCmdComplete(mh, 0x8000 | cmd)) { in mwlExecuteCmd()
2400 device_printf(mh->mh_dev, in mwlExecuteCmd()
2403 device_printf(mh->mh_dev, in mwlExecuteCmd()
2406 mh->mh_flags |= MHF_FWHANG; in mwlExecuteCmd()
2409 bus_dmamap_sync(mh->mh_dmat, mh->mh_dmamap, in mwlExecuteCmd()
2412 if (mh->mh_debug & MWL_HAL_DEBUG_CMDDONE) in mwlExecuteCmd()
2413 dumpresult(mh, 1); in mwlExecuteCmd()
2432 mwlFwReset(struct mwl_hal_priv *mh) in mwlFwReset() argument
2434 if (RD4(mh, MACREG_REG_INT_CODE) == 0xffffffff) { in mwlFwReset()
2435 device_printf(mh->mh_dev, "%s: device not present!\n", in mwlFwReset()
2439 WR4(mh, MACREG_REG_H2A_INTERRUPT_EVENTS, ISR_RESET); in mwlFwReset()
2440 mh->mh_flags &= ~MHF_FWHANG; in mwlFwReset()
2444 mwlTriggerPciCmd(struct mwl_hal_priv *mh) in mwlTriggerPciCmd() argument
2447 bus_dmamap_sync(mh->mh_dmat, mh->mh_dmamap, BUS_DMASYNC_PREWRITE); in mwlTriggerPciCmd()
2449 WR4(mh, MACREG_REG_GEN_PTR, mh->mh_cmdaddr); in mwlTriggerPciCmd()
2450 RD4(mh, MACREG_REG_INT_CODE); in mwlTriggerPciCmd()
2452 WR4(mh, MACREG_REG_INT_CODE, 0x00); in mwlTriggerPciCmd()
2453 RD4(mh, MACREG_REG_INT_CODE); in mwlTriggerPciCmd()
2455 WR4(mh, MACREG_REG_H2A_INTERRUPT_EVENTS, MACREG_H2ARIC_BIT_DOOR_BELL); in mwlTriggerPciCmd()
2456 RD4(mh, MACREG_REG_INT_CODE); in mwlTriggerPciCmd()
2460 mwlWaitFor(struct mwl_hal_priv *mh, uint32_t val) in mwlWaitFor() argument
2466 if (RD4(mh, MACREG_REG_INT_CODE) == val) in mwlWaitFor()
2476 mwlSendBlock(struct mwl_hal_priv *mh, int bsize, const void *data, size_t dsize) in mwlSendBlock() argument
2478 mh->mh_cmdbuf[0] = htole16(HostCmd_CMD_CODE_DNLD); in mwlSendBlock()
2479 mh->mh_cmdbuf[1] = htole16(bsize); in mwlSendBlock()
2480 memcpy(&mh->mh_cmdbuf[4], data , dsize); in mwlSendBlock()
2481 mwlTriggerPciCmd(mh); in mwlSendBlock()
2483 if (mwlWaitFor(mh, MACREG_INT_CODE_CMD_FINISHED)) { in mwlSendBlock()
2484 WR4(mh, MACREG_REG_INT_CODE, 0); in mwlSendBlock()
2487 device_printf(mh->mh_dev, in mwlSendBlock()
2489 __func__, RD4(mh, MACREG_REG_INT_CODE)); in mwlSendBlock()
2497 mwlSendBlock2(struct mwl_hal_priv *mh, const void *data, size_t dsize) in mwlSendBlock2() argument
2499 memcpy(&mh->mh_cmdbuf[0], data, dsize); in mwlSendBlock2()
2500 mwlTriggerPciCmd(mh); in mwlSendBlock2()
2501 if (mwlWaitFor(mh, MACREG_INT_CODE_CMD_FINISHED)) { in mwlSendBlock2()
2502 WR4(mh, MACREG_REG_INT_CODE, 0); in mwlSendBlock2()
2505 device_printf(mh->mh_dev, in mwlSendBlock2()
2507 __func__, RD4(mh, MACREG_REG_INT_CODE)); in mwlSendBlock2()
2512 mwlPokeSdramController(struct mwl_hal_priv *mh, int SDRAMSIZE_Addr) in mwlPokeSdramController() argument
2515 WR4(mh, 0x00006014, 0x33); in mwlPokeSdramController()
2516 WR4(mh, 0x00006018, 0xa3a2632); in mwlPokeSdramController()
2517 WR4(mh, 0x00006010, SDRAMSIZE_Addr); in mwlPokeSdramController()
2523 struct mwl_hal_priv *mh = MWLPRIV(mh0); in mwl_hal_fwload() local
2538 device_printf(mh->mh_dev, in mwl_hal_fwload()
2545 device_printf(mh->mh_dev, "firmware image %s too small\n", in mwl_hal_fwload()
2557 device_printf(mh->mh_dev, in mwl_hal_fwload()
2565 mwlFwReset(mh); in mwl_hal_fwload()
2567 WR4(mh, MACREG_REG_A2H_INTERRUPT_CLEAR_SEL, MACREG_A2HRIC_BIT_MASK); in mwl_hal_fwload()
2568 WR4(mh, MACREG_REG_A2H_INTERRUPT_CAUSE, 0x00); in mwl_hal_fwload()
2569 WR4(mh, MACREG_REG_A2H_INTERRUPT_MASK, 0x00); in mwl_hal_fwload()
2570 WR4(mh, MACREG_REG_A2H_INTERRUPT_STATUS_MASK, MACREG_A2HRIC_BIT_MASK); in mwl_hal_fwload()
2571 if (mh->mh_SDRAMSIZE_Addr != 0) { in mwl_hal_fwload()
2573 mwlPokeSdramController(mh, mh->mh_SDRAMSIZE_Addr); in mwl_hal_fwload()
2575 device_printf(mh->mh_dev, "load %s firmware image (%u bytes)\n", in mwl_hal_fwload()
2588 if (!mwlSendBlock(mh, fwboot->datasize, fwboot->data, fwboot->datasize) || in mwl_hal_fwload()
2589 !mwlSendBlock(mh, 0, NULL, 0)) { in mwl_hal_fwload()
2594 if (mh->mh_SDRAMSIZE_Addr != 0) { in mwl_hal_fwload()
2596 mwlPokeSdramController(mh, mh->mh_SDRAMSIZE_Addr); in mwl_hal_fwload()
2600 WR4(mh, MACREG_REG_INT_CODE, 0); in mwl_hal_fwload()
2601 blocksize = RD4(mh, MACREG_REG_SCRATCH); in mwl_hal_fwload()
2629 if (!mwlSendBlock2(mh, fp, nbytes)) { in mwl_hal_fwload()
2639 if (!mwlSendBlock(mh, FW_DOWNLOAD_BLOCK_SIZE, fp, nbytes)) { in mwl_hal_fwload()
2655 mh->mh_cmdbuf[1] = 0; in mwl_hal_fwload()
2660 mwlTriggerPciCmd(mh); in mwl_hal_fwload()
2662 WR4(mh, MACREG_REG_GEN_PTR, OpMode); in mwl_hal_fwload()
2664 if (RD4(mh, MACREG_REG_INT_CODE) == FwReadySignature) { in mwl_hal_fwload()
2665 WR4(mh, MACREG_REG_INT_CODE, 0x00); in mwl_hal_fwload()
2666 return mwlResetHalState(mh); in mwl_hal_fwload()
2671 mwlFwReset(mh); in mwl_hal_fwload()
2742 dumpresult(struct mwl_hal_priv *mh, int showresult) in dumpresult() argument
2744 const FWCmdHdr *h = (const FWCmdHdr *)mh->mh_cmdbuf; in dumpresult()
2750 device_printf(mh->mh_dev, "Cmd %s Length %d SeqNum %d MacId %d", in dumpresult()
2753 device_printf(mh->mh_dev, "Cmd %s Length %d SeqNum %d", in dumpresult()