Lines Matching refs:slot

81 static void mvs_legacy_execute_transaction(struct mvs_slot *slot);
86 static void mvs_execute_transaction(struct mvs_slot *slot);
87 static void mvs_end_transaction(struct mvs_slot *slot, enum mvs_err_type et);
430 bzero(ch->slot, sizeof(ch->slot)); in mvs_slotsalloc()
432 struct mvs_slot *slot = &ch->slot[i]; in mvs_slotsalloc() local
434 slot->dev = dev; in mvs_slotsalloc()
435 slot->slot = i; in mvs_slotsalloc()
436 slot->state = MVS_SLOT_EMPTY; in mvs_slotsalloc()
437 slot->eprd_offset = MVS_EPRD_OFFSET + MVS_EPRD_SIZE * i; in mvs_slotsalloc()
438 slot->ccb = NULL; in mvs_slotsalloc()
439 callout_init_mtx(&slot->timeout, &ch->mtx, 0); in mvs_slotsalloc()
441 if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) in mvs_slotsalloc()
454 struct mvs_slot *slot = &ch->slot[i]; in mvs_slotsfree() local
456 callout_drain(&slot->timeout); in mvs_slotsfree()
457 if (slot->dma.data_map) { in mvs_slotsfree()
458 bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); in mvs_slotsfree()
459 slot->dma.data_map = NULL; in mvs_slotsfree()
776 ch->slot[i].ccb->ccb_h.target_id != port) in mvs_ch_intr()
802 mvs_end_transaction(&ch->slot[i], et); in mvs_ch_intr()
839 struct mvs_slot *slot = &ch->slot[0]; /* PIO is always in slot 0. */ in mvs_legacy_intr() local
840 union ccb *ccb = slot->ccb; in mvs_legacy_intr()
848 if (slot->state < MVS_SLOT_RUNNING) in mvs_legacy_intr()
876 ch->toslots |= (1 << slot->slot); in mvs_legacy_intr()
897 ch->toslots |= (1 << slot->slot); in mvs_legacy_intr()
1010 mvs_end_transaction(slot, et); in mvs_legacy_intr()
1019 int in_idx, fin_idx, cin_idx, slot; in mvs_crbq_intr() local
1036 slot = le16toh(crpb->id) & MVS_CRPB_TAG_MASK; in mvs_crbq_intr()
1046 cin_idx, fin_idx, in_idx, slot, flags, ch->rslots); in mvs_crbq_intr()
1055 if (ch->slot[slot].state >= MVS_SLOT_RUNNING) { in mvs_crbq_intr()
1056 ccb = ch->slot[slot].ccb; in mvs_crbq_intr()
1060 mvs_end_transaction(&ch->slot[slot], MVS_ERR_NONE); in mvs_crbq_intr()
1064 cin_idx, fin_idx, in_idx, slot, flags, in mvs_crbq_intr()
1070 cin_idx, slot, flags); in mvs_crbq_intr()
1181 struct mvs_slot *slot; in mvs_begin_transaction() local
1203 slot = &ch->slot[slotn]; in mvs_begin_transaction()
1204 slot->ccb = ccb; in mvs_begin_transaction()
1205 slot->tag = tag; in mvs_begin_transaction()
1210 ch->oslots |= (1 << slot->slot); in mvs_begin_transaction()
1215 ch->otagspd[ccb->ccb_h.target_id] |= (1 << slot->tag); in mvs_begin_transaction()
1229 ch->aslots |= (1 << slot->slot); in mvs_begin_transaction()
1253 slot->state = MVS_SLOT_LOADING; in mvs_begin_transaction()
1254 bus_dmamap_load_ccb(ch->dma.data_tag, slot->dma.data_map, in mvs_begin_transaction()
1255 ccb, mvs_dmasetprd, slot, 0); in mvs_begin_transaction()
1257 mvs_legacy_execute_transaction(slot); in mvs_begin_transaction()
1264 struct mvs_slot *slot = arg; in mvs_dmasetprd() local
1265 struct mvs_channel *ch = device_get_softc(slot->dev); in mvs_dmasetprd()
1270 device_printf(slot->dev, "DMA load error\n"); in mvs_dmasetprd()
1271 mvs_end_transaction(slot, MVS_ERR_INVALID); in mvs_dmasetprd()
1277 slot->dma.addr = segs[0].ds_addr; in mvs_dmasetprd()
1278 slot->dma.len = segs[0].ds_len; in mvs_dmasetprd()
1280 slot->dma.addr = 0; in mvs_dmasetprd()
1282 eprd = (struct mvs_eprd *)(ch->dma.workrq + slot->eprd_offset); in mvs_dmasetprd()
1291 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, in mvs_dmasetprd()
1292 ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? in mvs_dmasetprd()
1295 mvs_legacy_execute_transaction(slot); in mvs_dmasetprd()
1297 mvs_execute_transaction(slot); in mvs_dmasetprd()
1301 mvs_legacy_execute_transaction(struct mvs_slot *slot) in mvs_legacy_execute_transaction() argument
1303 device_t dev = slot->dev; in mvs_legacy_execute_transaction()
1306 union ccb *ccb = slot->ccb; in mvs_legacy_execute_transaction()
1310 slot->state = MVS_SLOT_RUNNING; in mvs_legacy_execute_transaction()
1311 ch->rslots |= (1 << slot->slot); in mvs_legacy_execute_transaction()
1342 ch->toslots |= (1 << slot->slot); in mvs_legacy_execute_transaction()
1343 mvs_end_transaction(slot, MVS_ERR_TIMEOUT); in mvs_legacy_execute_transaction()
1370 ch->toslots |= (1 << slot->slot); in mvs_legacy_execute_transaction()
1371 mvs_end_transaction(slot, MVS_ERR_TIMEOUT); in mvs_legacy_execute_transaction()
1388 ch->toslots |= (1 << slot->slot); in mvs_legacy_execute_transaction()
1389 mvs_end_transaction(slot, MVS_ERR_TIMEOUT); in mvs_legacy_execute_transaction()
1400 eprd = ch->dma.workrq_bus + slot->eprd_offset; in mvs_legacy_execute_transaction()
1409 callout_reset_sbt(&slot->timeout, SBT_1MS * ccb->ccb_h.timeout, 0, in mvs_legacy_execute_transaction()
1410 mvs_timeout, slot, 0); in mvs_legacy_execute_transaction()
1415 mvs_execute_transaction(struct mvs_slot *slot) in mvs_execute_transaction() argument
1417 device_t dev = slot->dev; in mvs_execute_transaction()
1422 union ccb *ccb = slot->ccb; in mvs_execute_transaction()
1427 eprd = ch->dma.workrq_bus + slot->eprd_offset; in mvs_execute_transaction()
1434 (slot->tag << MVS_CRQB2E_DTAG_SHIFT) | in mvs_execute_transaction()
1436 (slot->slot << MVS_CRQB2E_HTAG_SHIFT)); in mvs_execute_transaction()
1438 if (slot->dma.addr != 0) { in mvs_execute_transaction()
1439 eprd = slot->dma.addr; in mvs_execute_transaction()
1441 crqb2e->drbc = slot->dma.len; in mvs_execute_transaction()
1458 crqb2e->cmd[12] = slot->tag << 3; in mvs_execute_transaction()
1473 (slot->slot << MVS_CRQB_TAG_SHIFT) | in mvs_execute_transaction()
1487 crqb->cmd[i++] = (slot->tag << 3) | in mvs_execute_transaction()
1517 slot->state = MVS_SLOT_RUNNING; in mvs_execute_transaction()
1518 ch->rslots |= (1 << slot->slot); in mvs_execute_transaction()
1524 callout_reset_sbt(&slot->timeout, SBT_1MS * ccb->ccb_h.timeout, 0, in mvs_execute_transaction()
1525 mvs_timeout, slot, 0); in mvs_execute_transaction()
1540 if (ch->slot[i].state < MVS_SLOT_RUNNING) in mvs_process_timeout()
1542 mvs_end_transaction(&ch->slot[i], MVS_ERR_TIMEOUT); in mvs_process_timeout()
1555 struct mvs_slot *slot = &ch->slot[i]; in mvs_rearm_timeout() local
1558 if (slot->state < MVS_SLOT_RUNNING) in mvs_rearm_timeout()
1562 callout_reset_sbt(&slot->timeout, in mvs_rearm_timeout()
1563 SBT_1MS * slot->ccb->ccb_h.timeout / 2, 0, in mvs_rearm_timeout()
1564 mvs_timeout, slot, 0); in mvs_rearm_timeout()
1572 struct mvs_slot *slot = arg; in mvs_timeout() local
1573 device_t dev = slot->dev; in mvs_timeout()
1577 if (slot->state < MVS_SLOT_RUNNING) in mvs_timeout()
1579 device_printf(dev, "Timeout on slot %d\n", slot->slot); in mvs_timeout()
1592 ch->toslots |= (1 << slot->slot); in mvs_timeout()
1602 mvs_end_transaction(struct mvs_slot *slot, enum mvs_err_type et) in mvs_end_transaction() argument
1604 device_t dev = slot->dev; in mvs_end_transaction()
1606 union ccb *ccb = slot->ccb; in mvs_end_transaction()
1630 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, in mvs_end_transaction()
1633 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); in mvs_end_transaction()
1637 ch->eslots |= (1 << slot->slot); in mvs_end_transaction()
1690 ch->oslots &= ~(1 << slot->slot); in mvs_end_transaction()
1691 ch->rslots &= ~(1 << slot->slot); in mvs_end_transaction()
1692 ch->aslots &= ~(1 << slot->slot); in mvs_end_transaction()
1693 slot->state = MVS_SLOT_EMPTY; in mvs_end_transaction()
1694 slot->ccb = NULL; in mvs_end_transaction()
1700 ch->otagspd[ccb->ccb_h.target_id] &= ~(1 << slot->tag); in mvs_end_transaction()
1714 lastto = (ch->toslots == (1 << slot->slot)); in mvs_end_transaction()
1715 ch->toslots &= ~(1 << slot->slot); in mvs_end_transaction()
1729 ch->hold[slot->slot] = ccb; in mvs_end_transaction()
1730 ch->holdtag[slot->slot] = slot->tag; in mvs_end_transaction()
2048 if (ch->slot[i].state < MVS_SLOT_RUNNING) in mvs_reset()
2051 mvs_end_transaction(&ch->slot[i], MVS_ERR_INNOCENT); in mvs_reset()