Lines Matching +full:0 +full:x41000000
69 #define MPT_OFFSET_DOORBELL 0x00
70 #define MPT_OFFSET_SEQUENCE 0x04
71 #define MPT_OFFSET_DIAGNOSTIC 0x08
72 #define MPT_OFFSET_TEST 0x0C
73 #define MPT_OFFSET_DIAG_DATA 0x10
74 #define MPT_OFFSET_DIAG_ADDR 0x14
75 #define MPT_OFFSET_INTR_STATUS 0x30
76 #define MPT_OFFSET_INTR_MASK 0x34
77 #define MPT_OFFSET_REQUEST_Q 0x40
78 #define MPT_OFFSET_REPLY_Q 0x44
79 #define MPT_OFFSET_HOST_INDEX 0x50
80 #define MPT_OFFSET_FUBAR 0x90
81 #define MPT_OFFSET_RESET_1078 0x10fc
85 MPT_DB_STATE_RESET = 0x00000000,
86 MPT_DB_STATE_READY = 0x10000000,
87 MPT_DB_STATE_RUNNING = 0x20000000,
88 MPT_DB_STATE_FAULT = 0x40000000,
89 MPT_DB_STATE_MASK = 0xf0000000
95 #define MPT_DB_DATA_MASK (0xffff)
97 #define MPT_DB_DB_USED 0x08000000
98 #define MPT_DB_IS_IN_USE(v) (((v) & MPT_DB_DB_USED) != 0)
103 #define MPT_DB_INIT_NOONE 0x00
104 #define MPT_DB_INIT_BIOS 0x01
105 #define MPT_DB_INIT_ROMBIOS 0x02
106 #define MPT_DB_INIT_PCIPEER 0x03
107 #define MPT_DB_INIT_HOST 0x04
108 #define MPT_DB_INIT_MANUFACTURE 0x05
115 MPT_FUNC_IOC_RESET = 0x40000000,
116 MPT_FUNC_UNIT_RESET = 0x41000000,
117 MPT_FUNC_HANDSHAKE = 0x42000000,
118 MPT_FUNC_REPLY_REMOVE = 0x43000000,
119 MPT_FUNC_MASK = 0xff000000
124 MPT_INTR_DB_BUSY = 0x80000000,
125 MPT_INTR_REPLY_READY = 0x00000008,
126 MPT_INTR_DB_READY = 0x00000001
129 #define MPT_DB_IS_BUSY(v) (((v) & MPT_INTR_DB_BUSY) != 0)
130 #define MPT_DB_INTR(v) (((v) & MPT_INTR_DB_READY) != 0)
131 #define MPT_REPLY_INTR(v) (((v) & MPT_INTR_REPLY_READY) != 0)
135 MPT_INTR_REPLY_MASK = 0x00000008,
136 MPT_INTR_DB_MASK = 0x00000001
140 #define MPT_DIAG_IOP_BASE (0x00000000)
141 #define MPT_DIAG_IOP_SIZE (0x00002000)
142 #define MPT_DIAG_GPIO (0x00030010)
143 #define MPT_DIAG_IOPQ_REG_BASE0 (0x00050004)
144 #define MPT_DIAG_IOPQ_REG_BASE1 (0x00051004)
145 #define MPT_DIAG_CTX0_BASE (0x000E0000)
146 #define MPT_DIAG_CTX0_SIZE (0x00002000)
147 #define MPT_DIAG_CTX1_BASE (0x001E0000)
148 #define MPT_DIAG_CTX1_SIZE (0x00002000)
149 #define MPT_DIAG_FLASH_BASE (0x00800000)
150 #define MPT_DIAG_RAM_BASE (0x01000000)
151 #define MPT_DIAG_RAM_SIZE (0x00400000)
152 #define MPT_DIAG_MEM_CFG_BASE (0x3F000000)
153 #define MPT_DIAG_MEM_CFG_BADFL (0x04000000)
156 #define MPT_DIAG_GPIO_SCL (0x00010000)
157 #define MPT_DIAG_GPIO_SDA_OUT (0x00008000)
158 #define MPT_DIAG_GPIO_SDA_IN (0x00004000)
160 #define MPT_REPLY_EMPTY (0xFFFFFFFF) /* Reply Queue Empty Symbol */