Lines Matching refs:tgtdev

3313     struct mpi3mr_target *tgtdev, Mpi3DevicePage0_t *dev_pg0,  in mpi3mr_update_device()  argument
3318 tgtdev->per_id = (dev_pg0->PersistentID); in mpi3mr_update_device()
3319 tgtdev->dev_handle = (dev_pg0->DevHandle); in mpi3mr_update_device()
3320 tgtdev->dev_type = dev_pg0->DeviceForm; in mpi3mr_update_device()
3321 tgtdev->encl_handle = (dev_pg0->EnclosureHandle); in mpi3mr_update_device()
3322 tgtdev->parent_handle = (dev_pg0->ParentDevHandle); in mpi3mr_update_device()
3323 tgtdev->slot = (dev_pg0->Slot); in mpi3mr_update_device()
3324 tgtdev->qdepth = (dev_pg0->QueueDepth); in mpi3mr_update_device()
3325 tgtdev->wwid = (dev_pg0->WWID); in mpi3mr_update_device()
3328 tgtdev->is_hidden = (flags & MPI3_DEVICE0_FLAGS_HIDDEN); in mpi3mr_update_device()
3330 tgtdev->io_throttle_enabled = in mpi3mr_update_device()
3340 tgtdev->is_hidden = 1; in mpi3mr_update_device()
3346 tgtdev->ws_len = 256; in mpi3mr_update_device()
3349 tgtdev->ws_len = 2048; in mpi3mr_update_device()
3353 tgtdev->ws_len = 0; in mpi3mr_update_device()
3357 switch (tgtdev->dev_type) { in mpi3mr_update_device()
3363 tgtdev->dev_spec.sassata_inf.dev_info = dev_info; in mpi3mr_update_device()
3364 tgtdev->dev_spec.sassata_inf.sas_address = in mpi3mr_update_device()
3368 tgtdev->is_hidden = 1; in mpi3mr_update_device()
3371 tgtdev->is_hidden = 1; in mpi3mr_update_device()
3380 tgtdev->q_depth = dev_pg0->QueueDepth; in mpi3mr_update_device()
3381 tgtdev->dev_spec.pcie_inf.dev_info = dev_info; in mpi3mr_update_device()
3382 tgtdev->dev_spec.pcie_inf.capb = in mpi3mr_update_device()
3384 tgtdev->dev_spec.pcie_inf.mdts = MPI3MR_DEFAULT_MDTS; in mpi3mr_update_device()
3386 tgtdev->dev_spec.pcie_inf.mdts = in mpi3mr_update_device()
3388 tgtdev->dev_spec.pcie_inf.pgsz = pcieinf->PageSize; in mpi3mr_update_device()
3389 tgtdev->dev_spec.pcie_inf.reset_to = in mpi3mr_update_device()
3391 tgtdev->dev_spec.pcie_inf.abort_to = in mpi3mr_update_device()
3394 if (tgtdev->dev_spec.pcie_inf.mdts > (1024 * 1024)) in mpi3mr_update_device()
3395 tgtdev->dev_spec.pcie_inf.mdts = (1024 * 1024); in mpi3mr_update_device()
3401 tgtdev->is_hidden = 1; in mpi3mr_update_device()
3411 tgtdev->dev_spec.vol_inf.state = vdinf->VdState; in mpi3mr_update_device()
3413 tgtdev->is_hidden = 1; in mpi3mr_update_device()
3414 tgtdev->dev_spec.vol_inf.tg_id = vdinf->IOThrottleGroup; in mpi3mr_update_device()
3415 tgtdev->dev_spec.vol_inf.tg_high = in mpi3mr_update_device()
3417 tgtdev->dev_spec.vol_inf.tg_low = in mpi3mr_update_device()
3422 tg->high = tgtdev->dev_spec.vol_inf.tg_high; in mpi3mr_update_device()
3423 tg->low = tgtdev->dev_spec.vol_inf.tg_low; in mpi3mr_update_device()
3425 tg->fw_qd = tgtdev->q_depth; in mpi3mr_update_device()
3426 tg->modified_qd = tgtdev->q_depth; in mpi3mr_update_device()
3428 tgtdev->dev_spec.vol_inf.tg = tg; in mpi3mr_update_device()
3429 tgtdev->throttle_group = tg; in mpi3mr_update_device()
3496 struct mpi3mr_target *tgtdev = NULL; in mpi3mr_dev_rmhs_complete_iou() local
3518 TAILQ_FOREACH(tgtdev, &sc->cam_sc->tgt_list, tgt_next) { in mpi3mr_dev_rmhs_complete_iou()
3519 if (tgtdev->dev_handle == drv_cmd->dev_handle) in mpi3mr_dev_rmhs_complete_iou()
3520 tgtdev->state = MPI3MR_DEV_REMOVE_HS_COMPLETED; in mpi3mr_dev_rmhs_complete_iou()
3841 struct mpi3mr_target *tgtdev = NULL; in mpi3mr_pcietopochg_evt_th() local
3848 tgtdev = mpi3mr_find_target_by_dev_handle(sc->cam_sc, handle); in mpi3mr_pcietopochg_evt_th()
3851 if (tgtdev) { in mpi3mr_pcietopochg_evt_th()
3852 tgtdev->dev_removed = 1; in mpi3mr_pcietopochg_evt_th()
3853 tgtdev->dev_removedelay = 0; in mpi3mr_pcietopochg_evt_th()
3854 mpi3mr_atomic_set(&tgtdev->block_io, 0); in mpi3mr_pcietopochg_evt_th()
3860 if (tgtdev) { in mpi3mr_pcietopochg_evt_th()
3861 tgtdev->dev_removedelay = 1; in mpi3mr_pcietopochg_evt_th()
3862 mpi3mr_atomic_inc(&tgtdev->block_io); in mpi3mr_pcietopochg_evt_th()
3866 if (tgtdev && in mpi3mr_pcietopochg_evt_th()
3867 tgtdev->dev_removedelay) { in mpi3mr_pcietopochg_evt_th()
3868 tgtdev->dev_removedelay = 0; in mpi3mr_pcietopochg_evt_th()
3869 if (mpi3mr_atomic_read(&tgtdev->block_io) > 0) in mpi3mr_pcietopochg_evt_th()
3870 mpi3mr_atomic_dec(&tgtdev->block_io); in mpi3mr_pcietopochg_evt_th()
3900 struct mpi3mr_target *tgtdev = NULL; in mpi3mr_sastopochg_evt_th() local
3908 tgtdev = mpi3mr_find_target_by_dev_handle(sc->cam_sc, handle); in mpi3mr_sastopochg_evt_th()
3911 if (tgtdev) { in mpi3mr_sastopochg_evt_th()
3912 tgtdev->dev_removed = 1; in mpi3mr_sastopochg_evt_th()
3913 tgtdev->dev_removedelay = 0; in mpi3mr_sastopochg_evt_th()
3914 mpi3mr_atomic_set(&tgtdev->block_io, 0); in mpi3mr_sastopochg_evt_th()
3920 if (tgtdev) { in mpi3mr_sastopochg_evt_th()
3921 tgtdev->dev_removedelay = 1; in mpi3mr_sastopochg_evt_th()
3922 mpi3mr_atomic_inc(&tgtdev->block_io); in mpi3mr_sastopochg_evt_th()
3926 if (tgtdev && in mpi3mr_sastopochg_evt_th()
3927 tgtdev->dev_removedelay) { in mpi3mr_sastopochg_evt_th()
3928 tgtdev->dev_removedelay = 0; in mpi3mr_sastopochg_evt_th()
3929 if (mpi3mr_atomic_read(&tgtdev->block_io) > 0) in mpi3mr_sastopochg_evt_th()
3930 mpi3mr_atomic_dec(&tgtdev->block_io); in mpi3mr_sastopochg_evt_th()
3956 struct mpi3mr_target *tgtdev = NULL; in mpi3mr_devstatuschg_evt_th() local
3986 tgtdev = mpi3mr_find_target_by_dev_handle(sc->cam_sc, dev_handle); in mpi3mr_devstatuschg_evt_th()
3988 if (!tgtdev) { in mpi3mr_devstatuschg_evt_th()
3995 mpi3mr_atomic_inc(&tgtdev->block_io); in mpi3mr_devstatuschg_evt_th()
3998 tgtdev->is_hidden = hide; in mpi3mr_devstatuschg_evt_th()
4001 tgtdev->is_hidden = 0; in mpi3mr_devstatuschg_evt_th()
4002 tgtdev->dev_removed = 0; in mpi3mr_devstatuschg_evt_th()
4006 tgtdev->dev_removed = 1; in mpi3mr_devstatuschg_evt_th()
4009 if (mpi3mr_atomic_read(&tgtdev->block_io) > 0) in mpi3mr_devstatuschg_evt_th()
4010 mpi3mr_atomic_dec(&tgtdev->block_io); in mpi3mr_devstatuschg_evt_th()