Lines Matching full:sc
79 static void mpi3mr_repost_reply_buf(struct mpi3mr_softc *sc,
81 static int mpi3mr_complete_admin_cmd(struct mpi3mr_softc *sc);
82 static void mpi3mr_port_enable_complete(struct mpi3mr_softc *sc,
84 static void mpi3mr_flush_io(struct mpi3mr_softc *sc);
85 static int mpi3mr_issue_reset(struct mpi3mr_softc *sc, U16 reset_type,
87 static void mpi3mr_dev_rmhs_send_tm(struct mpi3mr_softc *sc, U16 handle,
89 static void mpi3mr_dev_rmhs_complete_iou(struct mpi3mr_softc *sc,
91 static void mpi3mr_dev_rmhs_complete_tm(struct mpi3mr_softc *sc,
93 static void mpi3mr_send_evt_ack(struct mpi3mr_softc *sc, U8 event,
95 static void mpi3mr_print_fault_info(struct mpi3mr_softc *sc);
96 static inline void mpi3mr_set_diagsave(struct mpi3mr_softc *sc);
145 U32 timeout, struct mpi3mr_softc *sc) in wait_for_completion_timeout_tm() argument
150 msleep(&sc->tm_chan, &sc->mpi3mr_mtx, PRIBIO, in wait_for_completion_timeout_tm()
163 poll_for_command_completion(struct mpi3mr_softc *sc, in poll_for_command_completion() argument
168 mpi3mr_complete_admin_cmd(sc); in poll_for_command_completion()
178 * @sc: Adapter instance reference
189 mpi3mr_trigger_snapdump(struct mpi3mr_softc *sc, U16 reason_code) in mpi3mr_trigger_snapdump() argument
193 mpi3mr_dprint(sc, MPI3MR_INFO, "snapdump triggered: reason code: %s\n", in mpi3mr_trigger_snapdump()
196 mpi3mr_set_diagsave(sc); in mpi3mr_trigger_snapdump()
197 mpi3mr_issue_reset(sc, MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT, in mpi3mr_trigger_snapdump()
201 host_diagnostic = mpi3mr_regread(sc, MPI3_SYSIF_HOST_DIAG_OFFSET); in mpi3mr_trigger_snapdump()
213 * @sc: Adapter instance reference
224 static void mpi3mr_check_rh_fault_ioc(struct mpi3mr_softc *sc, U16 reason_code) in mpi3mr_check_rh_fault_ioc() argument
228 if (sc->unrecoverable) { in mpi3mr_check_rh_fault_ioc()
229 mpi3mr_dprint(sc, MPI3MR_ERROR, "controller is unrecoverable\n"); in mpi3mr_check_rh_fault_ioc()
233 ioc_status = mpi3mr_regread(sc, MPI3_SYSIF_IOC_STATUS_OFFSET); in mpi3mr_check_rh_fault_ioc()
236 mpi3mr_print_fault_info(sc); in mpi3mr_check_rh_fault_ioc()
240 mpi3mr_trigger_snapdump(sc, reason_code); in mpi3mr_check_rh_fault_ioc()
245 static void * mpi3mr_get_reply_virt_addr(struct mpi3mr_softc *sc, in mpi3mr_get_reply_virt_addr() argument
250 if ((phys_addr < sc->reply_buf_dma_min_address) || in mpi3mr_get_reply_virt_addr()
251 (phys_addr > sc->reply_buf_dma_max_address)) in mpi3mr_get_reply_virt_addr()
254 return sc->reply_buf + (phys_addr - sc->reply_buf_phys); in mpi3mr_get_reply_virt_addr()
257 static void * mpi3mr_get_sensebuf_virt_addr(struct mpi3mr_softc *sc, in mpi3mr_get_sensebuf_virt_addr() argument
262 return sc->sense_buf + (phys_addr - sc->sense_buf_phys); in mpi3mr_get_sensebuf_virt_addr()
265 static void mpi3mr_repost_reply_buf(struct mpi3mr_softc *sc, in mpi3mr_repost_reply_buf() argument
270 mtx_lock_spin(&sc->reply_free_q_lock); in mpi3mr_repost_reply_buf()
271 old_idx = sc->reply_free_q_host_index; in mpi3mr_repost_reply_buf()
272 sc->reply_free_q_host_index = ((sc->reply_free_q_host_index == in mpi3mr_repost_reply_buf()
273 (sc->reply_free_q_sz - 1)) ? 0 : in mpi3mr_repost_reply_buf()
274 (sc->reply_free_q_host_index + 1)); in mpi3mr_repost_reply_buf()
275 sc->reply_free_q[old_idx] = reply_dma; in mpi3mr_repost_reply_buf()
276 mpi3mr_regwrite(sc, MPI3_SYSIF_REPLY_FREE_HOST_INDEX_OFFSET, in mpi3mr_repost_reply_buf()
277 sc->reply_free_q_host_index); in mpi3mr_repost_reply_buf()
278 mtx_unlock_spin(&sc->reply_free_q_lock); in mpi3mr_repost_reply_buf()
281 static void mpi3mr_repost_sense_buf(struct mpi3mr_softc *sc, in mpi3mr_repost_sense_buf() argument
286 mtx_lock_spin(&sc->sense_buf_q_lock); in mpi3mr_repost_sense_buf()
287 old_idx = sc->sense_buf_q_host_index; in mpi3mr_repost_sense_buf()
288 sc->sense_buf_q_host_index = ((sc->sense_buf_q_host_index == in mpi3mr_repost_sense_buf()
289 (sc->sense_buf_q_sz - 1)) ? 0 : in mpi3mr_repost_sense_buf()
290 (sc->sense_buf_q_host_index + 1)); in mpi3mr_repost_sense_buf()
291 sc->sense_buf_q[old_idx] = sense_buf_phys; in mpi3mr_repost_sense_buf()
292 mpi3mr_regwrite(sc, MPI3_SYSIF_SENSE_BUF_FREE_HOST_INDEX_OFFSET, in mpi3mr_repost_sense_buf()
293 sc->sense_buf_q_host_index); in mpi3mr_repost_sense_buf()
294 mtx_unlock_spin(&sc->sense_buf_q_lock); in mpi3mr_repost_sense_buf()
298 void mpi3mr_set_io_divert_for_all_vd_in_tg(struct mpi3mr_softc *sc, in mpi3mr_set_io_divert_for_all_vd_in_tg() argument
303 mtx_lock_spin(&sc->target_lock); in mpi3mr_set_io_divert_for_all_vd_in_tg()
304 TAILQ_FOREACH(target, &sc->cam_sc->tgt_list, tgt_next) { in mpi3mr_set_io_divert_for_all_vd_in_tg()
308 mtx_unlock_spin(&sc->target_lock); in mpi3mr_set_io_divert_for_all_vd_in_tg()
323 int mpi3mr_submit_admin_cmd(struct mpi3mr_softc *sc, void *admin_req, in mpi3mr_submit_admin_cmd() argument
330 mtx_lock_spin(&sc->admin_req_lock); in mpi3mr_submit_admin_cmd()
331 areq_pi = sc->admin_req_pi; in mpi3mr_submit_admin_cmd()
332 areq_ci = sc->admin_req_ci; in mpi3mr_submit_admin_cmd()
333 max_entries = sc->num_admin_reqs; in mpi3mr_submit_admin_cmd()
335 if (sc->unrecoverable) in mpi3mr_submit_admin_cmd()
341 sc->name); in mpi3mr_submit_admin_cmd()
345 areq_entry = (U8 *)sc->admin_req + (areq_pi * in mpi3mr_submit_admin_cmd()
352 sc->admin_req_pi = areq_pi; in mpi3mr_submit_admin_cmd()
354 mpi3mr_regwrite(sc, MPI3_SYSIF_ADMIN_REQ_Q_PI_OFFSET, sc->admin_req_pi); in mpi3mr_submit_admin_cmd()
357 mtx_unlock_spin(&sc->admin_req_lock); in mpi3mr_submit_admin_cmd()
385 * @sc: Adapter instance reference
393 int mpi3mr_submit_io(struct mpi3mr_softc *sc, in mpi3mr_submit_io() argument
399 U16 req_sz = sc->facts.op_req_sz; in mpi3mr_submit_io()
407 irq_ctx = &sc->irq_ctx[op_req_q->reply_qid - 1]; in mpi3mr_submit_io()
408 mpi3mr_complete_io_cmd(sc, irq_ctx); in mpi3mr_submit_io()
412 sc->name); in mpi3mr_submit_io()
425 mpi3mr_atomic_inc(&sc->op_reply_q[op_req_q->reply_qid - 1].pend_ios); in mpi3mr_submit_io()
427 mpi3mr_regwrite(sc, MPI3_SYSIF_OPER_REQ_Q_N_PI_OFFSET(op_req_q->qid), op_req_q->pi); in mpi3mr_submit_io()
428 if (sc->mpi3mr_debug & MPI3MR_TRACE) { in mpi3mr_submit_io()
429 device_printf(sc->mpi3mr_dev, "IO submission: QID:%d PI:0x%x\n", op_req_q->qid, op_req_q->pi); in mpi3mr_submit_io()
458 void mpi3mr_enable_interrupts(struct mpi3mr_softc *sc) in mpi3mr_enable_interrupts() argument
460 sc->intr_enabled = 1; in mpi3mr_enable_interrupts()
463 void mpi3mr_disable_interrupts(struct mpi3mr_softc *sc) in mpi3mr_disable_interrupts() argument
465 sc->intr_enabled = 0; in mpi3mr_disable_interrupts()
477 static int mpi3mr_delete_op_reply_queue(struct mpi3mr_softc *sc, U16 qid) in mpi3mr_delete_op_reply_queue() argument
484 op_reply_q = &sc->op_reply_q[qid - 1]; in mpi3mr_delete_op_reply_queue()
490 sc->name); in mpi3mr_delete_op_reply_queue()
496 mtx_lock(&sc->init_cmds.completion.lock); in mpi3mr_delete_op_reply_queue()
497 if (sc->init_cmds.state & MPI3MR_CMD_PENDING) { in mpi3mr_delete_op_reply_queue()
500 sc->name); in mpi3mr_delete_op_reply_queue()
501 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_delete_op_reply_queue()
505 if (sc->init_cmds.state & MPI3MR_CMD_PENDING) { in mpi3mr_delete_op_reply_queue()
508 sc->name); in mpi3mr_delete_op_reply_queue()
511 sc->init_cmds.state = MPI3MR_CMD_PENDING; in mpi3mr_delete_op_reply_queue()
512 sc->init_cmds.is_waiting = 1; in mpi3mr_delete_op_reply_queue()
513 sc->init_cmds.callback = NULL; in mpi3mr_delete_op_reply_queue()
518 init_completion(&sc->init_cmds.completion); in mpi3mr_delete_op_reply_queue()
519 retval = mpi3mr_submit_admin_cmd(sc, &delq_req, sizeof(delq_req)); in mpi3mr_delete_op_reply_queue()
522 sc->name); in mpi3mr_delete_op_reply_queue()
525 wait_for_completion_timeout(&sc->init_cmds.completion, in mpi3mr_delete_op_reply_queue()
527 if (!(sc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { in mpi3mr_delete_op_reply_queue()
529 sc->name); in mpi3mr_delete_op_reply_queue()
530 mpi3mr_check_rh_fault_ioc(sc, in mpi3mr_delete_op_reply_queue()
532 sc->unrecoverable = 1; in mpi3mr_delete_op_reply_queue()
537 if ((sc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) in mpi3mr_delete_op_reply_queue()
540 " Loginfo(0x%08x) \n" , sc->name, in mpi3mr_delete_op_reply_queue()
541 (sc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), in mpi3mr_delete_op_reply_queue()
542 sc->init_cmds.ioc_loginfo); in mpi3mr_delete_op_reply_queue()
546 sc->irq_ctx[qid - 1].op_reply_q = NULL; in mpi3mr_delete_op_reply_queue()
548 if (sc->op_reply_q[qid - 1].q_base_phys != 0) in mpi3mr_delete_op_reply_queue()
549 bus_dmamap_unload(sc->op_reply_q[qid - 1].q_base_tag, sc->op_reply_q[qid - 1].q_base_dmamap); in mpi3mr_delete_op_reply_queue()
550 if (sc->op_reply_q[qid - 1].q_base != NULL) in mpi3mr_delete_op_reply_queue()
551 …bus_dmamem_free(sc->op_reply_q[qid - 1].q_base_tag, sc->op_reply_q[qid - 1].q_base, sc->op_reply_q… in mpi3mr_delete_op_reply_queue()
552 if (sc->op_reply_q[qid - 1].q_base_tag != NULL) in mpi3mr_delete_op_reply_queue()
553 bus_dma_tag_destroy(sc->op_reply_q[qid - 1].q_base_tag); in mpi3mr_delete_op_reply_queue()
555 sc->op_reply_q[qid - 1].q_base = NULL; in mpi3mr_delete_op_reply_queue()
556 sc->op_reply_q[qid - 1].qid = 0; in mpi3mr_delete_op_reply_queue()
558 sc->init_cmds.state = MPI3MR_CMD_NOTUSED; in mpi3mr_delete_op_reply_queue()
559 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_delete_op_reply_queue()
566 * @sc: Adapter instance reference
574 static int mpi3mr_create_op_reply_queue(struct mpi3mr_softc *sc, U16 qid) in mpi3mr_create_op_reply_queue() argument
581 op_reply_q = &sc->op_reply_q[qid - 1]; in mpi3mr_create_op_reply_queue()
587 sc->name, op_reply_q->qid); in mpi3mr_create_op_reply_queue()
592 if (pci_get_revid(sc->mpi3mr_dev) == SAS4116_CHIP_REV_A0) in mpi3mr_create_op_reply_queue()
597 op_reply_q->qsz = op_reply_q->num_replies * sc->op_reply_sz; in mpi3mr_create_op_reply_queue()
604 if (bus_dma_tag_create(sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_create_op_reply_queue()
606 sc->dma_loaddr, /* lowaddr */ in mpi3mr_create_op_reply_queue()
615 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate Operational reply DMA tag\n"); in mpi3mr_create_op_reply_queue()
621 mpi3mr_dprint(sc, MPI3MR_ERROR, "%s: Cannot allocate replies memory\n", __func__); in mpi3mr_create_op_reply_queue()
627 …mpi3mr_dprint(sc, MPI3MR_XINFO, "Operational Reply queue ID: %d phys addr= %#016jx virt_addr: %pa … in mpi3mr_create_op_reply_queue()
634 sc->name, qid); in mpi3mr_create_op_reply_queue()
641 mtx_lock(&sc->init_cmds.completion.lock); in mpi3mr_create_op_reply_queue()
642 if (sc->init_cmds.state & MPI3MR_CMD_PENDING) { in mpi3mr_create_op_reply_queue()
645 sc->name); in mpi3mr_create_op_reply_queue()
646 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_create_op_reply_queue()
650 sc->init_cmds.state = MPI3MR_CMD_PENDING; in mpi3mr_create_op_reply_queue()
651 sc->init_cmds.is_waiting = 1; in mpi3mr_create_op_reply_queue()
652 sc->init_cmds.callback = NULL; in mpi3mr_create_op_reply_queue()
657 create_req.MSIxIndex = sc->irq_ctx[qid - 1].msix_index; in mpi3mr_create_op_reply_queue()
661 init_completion(&sc->init_cmds.completion); in mpi3mr_create_op_reply_queue()
662 retval = mpi3mr_submit_admin_cmd(sc, &create_req, in mpi3mr_create_op_reply_queue()
666 sc->name); in mpi3mr_create_op_reply_queue()
670 wait_for_completion_timeout(&sc->init_cmds.completion, in mpi3mr_create_op_reply_queue()
672 if (!(sc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { in mpi3mr_create_op_reply_queue()
674 sc->name); in mpi3mr_create_op_reply_queue()
675 mpi3mr_check_rh_fault_ioc(sc, in mpi3mr_create_op_reply_queue()
677 sc->unrecoverable = 1; in mpi3mr_create_op_reply_queue()
682 if ((sc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) in mpi3mr_create_op_reply_queue()
685 " Loginfo(0x%08x) \n" , sc->name, in mpi3mr_create_op_reply_queue()
686 (sc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), in mpi3mr_create_op_reply_queue()
687 sc->init_cmds.ioc_loginfo); in mpi3mr_create_op_reply_queue()
692 sc->irq_ctx[qid - 1].op_reply_q = op_reply_q; in mpi3mr_create_op_reply_queue()
695 sc->init_cmds.state = MPI3MR_CMD_NOTUSED; in mpi3mr_create_op_reply_queue()
696 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_create_op_reply_queue()
714 * @sc: Adapter instance reference
723 static int mpi3mr_create_op_req_queue(struct mpi3mr_softc *sc, U16 req_qid, U8 reply_qid) in mpi3mr_create_op_req_queue() argument
730 op_req_q = &sc->op_req_q[req_qid - 1]; in mpi3mr_create_op_req_queue()
736 sc->name, op_req_q->qid); in mpi3mr_create_op_req_queue()
743 op_req_q->qsz = op_req_q->num_reqs * sc->facts.op_req_sz; in mpi3mr_create_op_req_queue()
750 if (bus_dma_tag_create(sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_create_op_req_queue()
752 sc->dma_loaddr, /* lowaddr */ in mpi3mr_create_op_req_queue()
761 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate request DMA tag\n"); in mpi3mr_create_op_req_queue()
767 mpi3mr_dprint(sc, MPI3MR_ERROR, "%s: Cannot allocate replies memory\n", __func__); in mpi3mr_create_op_req_queue()
776 …mpi3mr_dprint(sc, MPI3MR_XINFO, "Operational Request QID: %d phys addr= %#016jx virt addr= %pa siz… in mpi3mr_create_op_req_queue()
782 sc->name, req_qid); in mpi3mr_create_op_req_queue()
789 mtx_lock(&sc->init_cmds.completion.lock); in mpi3mr_create_op_req_queue()
790 if (sc->init_cmds.state & MPI3MR_CMD_PENDING) { in mpi3mr_create_op_req_queue()
793 sc->name); in mpi3mr_create_op_req_queue()
794 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_create_op_req_queue()
798 sc->init_cmds.state = MPI3MR_CMD_PENDING; in mpi3mr_create_op_req_queue()
799 sc->init_cmds.is_waiting = 1; in mpi3mr_create_op_req_queue()
800 sc->init_cmds.callback = NULL; in mpi3mr_create_op_req_queue()
809 init_completion(&sc->init_cmds.completion); in mpi3mr_create_op_req_queue()
810 retval = mpi3mr_submit_admin_cmd(sc, &create_req, in mpi3mr_create_op_req_queue()
814 sc->name); in mpi3mr_create_op_req_queue()
818 wait_for_completion_timeout(&sc->init_cmds.completion, in mpi3mr_create_op_req_queue()
821 if (!(sc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { in mpi3mr_create_op_req_queue()
823 sc->name); in mpi3mr_create_op_req_queue()
824 mpi3mr_check_rh_fault_ioc(sc, in mpi3mr_create_op_req_queue()
826 sc->unrecoverable = 1; in mpi3mr_create_op_req_queue()
831 if ((sc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) in mpi3mr_create_op_req_queue()
834 " Loginfo(0x%08x) \n" , sc->name, in mpi3mr_create_op_req_queue()
835 (sc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), in mpi3mr_create_op_req_queue()
836 sc->init_cmds.ioc_loginfo); in mpi3mr_create_op_req_queue()
843 sc->init_cmds.state = MPI3MR_CMD_NOTUSED; in mpi3mr_create_op_req_queue()
844 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_create_op_req_queue()
861 * @sc: Adapter instance reference
866 static int mpi3mr_create_op_queues(struct mpi3mr_softc *sc) in mpi3mr_create_op_queues() argument
871 num_queues = min(sc->facts.max_op_reply_q, in mpi3mr_create_op_queues()
872 sc->facts.max_op_req_q); in mpi3mr_create_op_queues()
873 num_queues = min(num_queues, sc->msix_count); in mpi3mr_create_op_queues()
879 if (sc->num_queues) in mpi3mr_create_op_queues()
880 num_queues = sc->num_queues; in mpi3mr_create_op_queues()
882 mpi3mr_dprint(sc, MPI3MR_XINFO, "Trying to create %d Operational Q pairs\n", in mpi3mr_create_op_queues()
885 if (!sc->op_req_q) { in mpi3mr_create_op_queues()
886 sc->op_req_q = malloc(sizeof(struct mpi3mr_op_req_queue) * in mpi3mr_create_op_queues()
889 if (!sc->op_req_q) { in mpi3mr_create_op_queues()
890 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to alloc memory for Request queue info\n"); in mpi3mr_create_op_queues()
896 if (!sc->op_reply_q) { in mpi3mr_create_op_queues()
897 sc->op_reply_q = malloc(sizeof(struct mpi3mr_op_reply_queue) * num_queues, in mpi3mr_create_op_queues()
900 if (!sc->op_reply_q) { in mpi3mr_create_op_queues()
901 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to alloc memory for Reply queue info\n"); in mpi3mr_create_op_queues()
907 sc->num_hosttag_op_req_q = (sc->max_host_ios + 1) / num_queues; in mpi3mr_create_op_queues()
912 if (mpi3mr_create_op_reply_queue(sc, qid)) { in mpi3mr_create_op_queues()
913 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to create Reply queue %d\n", in mpi3mr_create_op_queues()
917 if (mpi3mr_create_op_req_queue(sc, qid, in mpi3mr_create_op_queues()
918 sc->op_reply_q[qid - 1].qid)) { in mpi3mr_create_op_queues()
919 mpi3mr_delete_op_reply_queue(sc, qid); in mpi3mr_create_op_queues()
920 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to create Request queue %d\n", in mpi3mr_create_op_queues()
933 if (!sc->num_queues) { in mpi3mr_create_op_queues()
934 sc->num_queues = i; in mpi3mr_create_op_queues()
937 mpi3mr_dprint(sc, MPI3MR_ERROR, "Number of queues (%d) post reset are not same as" in mpi3mr_create_op_queues()
943 mpi3mr_dprint(sc, MPI3MR_INFO, "Successfully created %d Operational Queue pairs\n", in mpi3mr_create_op_queues()
944 sc->num_queues); in mpi3mr_create_op_queues()
945 mpi3mr_dprint(sc, MPI3MR_INFO, "Request Queue QD: %d Reply queue QD: %d\n", in mpi3mr_create_op_queues()
946 sc->op_req_q[0].num_reqs, sc->op_reply_q[0].num_replies); in mpi3mr_create_op_queues()
950 if (sc->op_req_q) { in mpi3mr_create_op_queues()
951 free(sc->op_req_q, M_MPI3MR); in mpi3mr_create_op_queues()
952 sc->op_req_q = NULL; in mpi3mr_create_op_queues()
954 if (sc->op_reply_q) { in mpi3mr_create_op_queues()
955 free(sc->op_reply_q, M_MPI3MR); in mpi3mr_create_op_queues()
956 sc->op_reply_q = NULL; in mpi3mr_create_op_queues()
963 * @sc: Adapter instance reference
968 static int mpi3mr_setup_admin_qpair(struct mpi3mr_softc *sc) in mpi3mr_setup_admin_qpair() argument
973 sc->admin_req_q_sz = MPI3MR_AREQQ_SIZE; in mpi3mr_setup_admin_qpair()
974 sc->num_admin_reqs = sc->admin_req_q_sz / MPI3MR_AREQ_FRAME_SZ; in mpi3mr_setup_admin_qpair()
975 sc->admin_req_ci = sc->admin_req_pi = 0; in mpi3mr_setup_admin_qpair()
977 sc->admin_reply_q_sz = MPI3MR_AREPQ_SIZE; in mpi3mr_setup_admin_qpair()
978 sc->num_admin_replies = sc->admin_reply_q_sz/ MPI3MR_AREP_FRAME_SZ; in mpi3mr_setup_admin_qpair()
979 sc->admin_reply_ci = 0; in mpi3mr_setup_admin_qpair()
980 sc->admin_reply_ephase = 1; in mpi3mr_setup_admin_qpair()
982 if (!sc->admin_req) { in mpi3mr_setup_admin_qpair()
988 if (bus_dma_tag_create(sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_setup_admin_qpair()
993 sc->admin_req_q_sz, /* maxsize */ in mpi3mr_setup_admin_qpair()
995 sc->admin_req_q_sz, /* maxsegsize */ in mpi3mr_setup_admin_qpair()
998 &sc->admin_req_tag)) { in mpi3mr_setup_admin_qpair()
999 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate request DMA tag\n"); in mpi3mr_setup_admin_qpair()
1003 if (bus_dmamem_alloc(sc->admin_req_tag, (void **)&sc->admin_req, in mpi3mr_setup_admin_qpair()
1004 BUS_DMA_NOWAIT, &sc->admin_req_dmamap)) { in mpi3mr_setup_admin_qpair()
1005 mpi3mr_dprint(sc, MPI3MR_ERROR, "%s: Cannot allocate replies memory\n", __func__); in mpi3mr_setup_admin_qpair()
1008 bzero(sc->admin_req, sc->admin_req_q_sz); in mpi3mr_setup_admin_qpair()
1009 bus_dmamap_load(sc->admin_req_tag, sc->admin_req_dmamap, sc->admin_req, sc->admin_req_q_sz, in mpi3mr_setup_admin_qpair()
1010 mpi3mr_memaddr_cb, &sc->admin_req_phys, BUS_DMA_NOWAIT); in mpi3mr_setup_admin_qpair()
1011 mpi3mr_dprint(sc, MPI3MR_XINFO, "Admin Req queue phys addr= %#016jx size= %d\n", in mpi3mr_setup_admin_qpair()
1012 (uintmax_t)sc->admin_req_phys, sc->admin_req_q_sz); in mpi3mr_setup_admin_qpair()
1014 if (!sc->admin_req) in mpi3mr_setup_admin_qpair()
1018 sc->name); in mpi3mr_setup_admin_qpair()
1023 if (!sc->admin_reply) { in mpi3mr_setup_admin_qpair()
1024 mtx_init(&sc->admin_reply_lock, "Admin Reply Queue Lock", NULL, MTX_SPIN); in mpi3mr_setup_admin_qpair()
1026 if (bus_dma_tag_create(sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_setup_admin_qpair()
1031 sc->admin_reply_q_sz, /* maxsize */ in mpi3mr_setup_admin_qpair()
1033 sc->admin_reply_q_sz, /* maxsegsize */ in mpi3mr_setup_admin_qpair()
1036 &sc->admin_reply_tag)) { in mpi3mr_setup_admin_qpair()
1037 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate reply DMA tag\n"); in mpi3mr_setup_admin_qpair()
1041 if (bus_dmamem_alloc(sc->admin_reply_tag, (void **)&sc->admin_reply, in mpi3mr_setup_admin_qpair()
1042 BUS_DMA_NOWAIT, &sc->admin_reply_dmamap)) { in mpi3mr_setup_admin_qpair()
1043 mpi3mr_dprint(sc, MPI3MR_ERROR, "%s: Cannot allocate replies memory\n", __func__); in mpi3mr_setup_admin_qpair()
1046 bzero(sc->admin_reply, sc->admin_reply_q_sz); in mpi3mr_setup_admin_qpair()
1047 …bus_dmamap_load(sc->admin_reply_tag, sc->admin_reply_dmamap, sc->admin_reply, sc->admin_reply_q_sz, in mpi3mr_setup_admin_qpair()
1048 mpi3mr_memaddr_cb, &sc->admin_reply_phys, BUS_DMA_NOWAIT); in mpi3mr_setup_admin_qpair()
1049 mpi3mr_dprint(sc, MPI3MR_XINFO, "Admin Reply queue phys addr= %#016jx size= %d\n", in mpi3mr_setup_admin_qpair()
1050 (uintmax_t)sc->admin_reply_phys, sc->admin_req_q_sz); in mpi3mr_setup_admin_qpair()
1053 if (!sc->admin_reply) in mpi3mr_setup_admin_qpair()
1057 sc->name); in mpi3mr_setup_admin_qpair()
1062 num_adm_entries = (sc->num_admin_replies << 16) | in mpi3mr_setup_admin_qpair()
1063 (sc->num_admin_reqs); in mpi3mr_setup_admin_qpair()
1064 mpi3mr_regwrite(sc, MPI3_SYSIF_ADMIN_Q_NUM_ENTRIES_OFFSET, num_adm_entries); in mpi3mr_setup_admin_qpair()
1065 mpi3mr_regwrite64(sc, MPI3_SYSIF_ADMIN_REQ_Q_ADDR_LOW_OFFSET, sc->admin_req_phys); in mpi3mr_setup_admin_qpair()
1066 mpi3mr_regwrite64(sc, MPI3_SYSIF_ADMIN_REPLY_Q_ADDR_LOW_OFFSET, sc->admin_reply_phys); in mpi3mr_setup_admin_qpair()
1067 mpi3mr_regwrite(sc, MPI3_SYSIF_ADMIN_REQ_Q_PI_OFFSET, sc->admin_req_pi); in mpi3mr_setup_admin_qpair()
1068 mpi3mr_regwrite(sc, MPI3_SYSIF_ADMIN_REPLY_Q_CI_OFFSET, sc->admin_reply_ci); in mpi3mr_setup_admin_qpair()
1074 if (sc->admin_reply_phys) in mpi3mr_setup_admin_qpair()
1075 bus_dmamap_unload(sc->admin_reply_tag, sc->admin_reply_dmamap); in mpi3mr_setup_admin_qpair()
1077 if (sc->admin_reply != NULL) in mpi3mr_setup_admin_qpair()
1078 bus_dmamem_free(sc->admin_reply_tag, sc->admin_reply, in mpi3mr_setup_admin_qpair()
1079 sc->admin_reply_dmamap); in mpi3mr_setup_admin_qpair()
1081 if (sc->admin_reply_tag != NULL) in mpi3mr_setup_admin_qpair()
1082 bus_dma_tag_destroy(sc->admin_reply_tag); in mpi3mr_setup_admin_qpair()
1085 if (sc->admin_req_phys) in mpi3mr_setup_admin_qpair()
1086 bus_dmamap_unload(sc->admin_req_tag, sc->admin_req_dmamap); in mpi3mr_setup_admin_qpair()
1088 if (sc->admin_req != NULL) in mpi3mr_setup_admin_qpair()
1089 bus_dmamem_free(sc->admin_req_tag, sc->admin_req, in mpi3mr_setup_admin_qpair()
1090 sc->admin_req_dmamap); in mpi3mr_setup_admin_qpair()
1092 if (sc->admin_req_tag != NULL) in mpi3mr_setup_admin_qpair()
1093 bus_dma_tag_destroy(sc->admin_req_tag); in mpi3mr_setup_admin_qpair()
1100 * @sc: Adapter instance reference
1107 static void mpi3mr_print_fault_info(struct mpi3mr_softc *sc) in mpi3mr_print_fault_info() argument
1111 ioc_status = mpi3mr_regread(sc, MPI3_SYSIF_IOC_STATUS_OFFSET); in mpi3mr_print_fault_info()
1114 code = mpi3mr_regread(sc, MPI3_SYSIF_FAULT_OFFSET) & in mpi3mr_print_fault_info()
1116 code1 = mpi3mr_regread(sc, MPI3_SYSIF_FAULT_INFO0_OFFSET); in mpi3mr_print_fault_info()
1117 code2 = mpi3mr_regread(sc, MPI3_SYSIF_FAULT_INFO1_OFFSET); in mpi3mr_print_fault_info()
1118 code3 = mpi3mr_regread(sc, MPI3_SYSIF_FAULT_INFO2_OFFSET); in mpi3mr_print_fault_info()
1120 sc->name, code, code1, code2, code3); in mpi3mr_print_fault_info()
1124 enum mpi3mr_iocstate mpi3mr_get_iocstate(struct mpi3mr_softc *sc) in mpi3mr_get_iocstate() argument
1129 ioc_status = mpi3mr_regread(sc, MPI3_SYSIF_IOC_STATUS_OFFSET); in mpi3mr_get_iocstate()
1130 ioc_control = mpi3mr_regread(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET); in mpi3mr_get_iocstate()
1132 if(sc->unrecoverable) in mpi3mr_get_iocstate()
1150 static inline void mpi3mr_clear_reset_history(struct mpi3mr_softc *sc) in mpi3mr_clear_reset_history() argument
1154 ioc_status = mpi3mr_regread(sc, MPI3_SYSIF_IOC_STATUS_OFFSET); in mpi3mr_clear_reset_history()
1156 mpi3mr_regwrite(sc, MPI3_SYSIF_IOC_STATUS_OFFSET, ioc_status); in mpi3mr_clear_reset_history()
1162 * @sc: Adapter instance reference
1170 static int mpi3mr_mur_ioc(struct mpi3mr_softc *sc, U16 reset_reason) in mpi3mr_mur_ioc() argument
1175 mpi3mr_dprint(sc, MPI3MR_INFO, "Issuing Message Unit Reset(MUR)\n"); in mpi3mr_mur_ioc()
1176 if (sc->unrecoverable) { in mpi3mr_mur_ioc()
1177 mpi3mr_dprint(sc, MPI3MR_ERROR, "IOC is unrecoverable MUR not issued\n"); in mpi3mr_mur_ioc()
1180 mpi3mr_clear_reset_history(sc); in mpi3mr_mur_ioc()
1184 (sc->facts.ioc_num << in mpi3mr_mur_ioc()
1186 mpi3mr_regwrite(sc, MPI3_SYSIF_SCRATCHPAD0_OFFSET, scratch_pad0); in mpi3mr_mur_ioc()
1187 ioc_config = mpi3mr_regread(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET); in mpi3mr_mur_ioc()
1189 mpi3mr_regwrite(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET, ioc_config); in mpi3mr_mur_ioc()
1193 ioc_status = mpi3mr_regread(sc, MPI3_SYSIF_IOC_STATUS_OFFSET); in mpi3mr_mur_ioc()
1195 mpi3mr_clear_reset_history(sc); in mpi3mr_mur_ioc()
1197 mpi3mr_regread(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET); in mpi3mr_mur_ioc()
1208 ioc_status = mpi3mr_regread(sc, MPI3_SYSIF_IOC_STATUS_OFFSET); in mpi3mr_mur_ioc()
1209 ioc_config = mpi3mr_regread(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET); in mpi3mr_mur_ioc()
1211 mpi3mr_dprint(sc, MPI3MR_INFO, "IOC Status/Config after %s MUR is (0x%x)/(0x%x)\n", in mpi3mr_mur_ioc()
1218 * @sc: Adapter instance reference
1225 static int mpi3mr_bring_ioc_ready(struct mpi3mr_softc *sc, in mpi3mr_bring_ioc_ready() argument
1232 U32 ioc_config = mpi3mr_regread(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET); in mpi3mr_bring_ioc_ready()
1234 mpi3mr_regwrite(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET, ioc_config); in mpi3mr_bring_ioc_ready()
1240 ioc_status = mpi3mr_regread(sc, MPI3_SYSIF_IOC_STATUS_OFFSET); in mpi3mr_bring_ioc_ready()
1243 mpi3mr_print_fault_info(sc); in mpi3mr_bring_ioc_ready()
1244 …retval = mpi3mr_issue_reset(sc, MPI3_SYSIF_HOST_DIAG_RESET_ACTION_SOFT_RESET, MPI3MR_RESET_FROM_BR… in mpi3mr_bring_ioc_ready()
1246 …mpi3mr_dprint(sc, MPI3MR_ERROR, "%s: Failed to soft reset the IOC, error 0x%d\n", __func__, retval… in mpi3mr_bring_ioc_ready()
1250 mpi3mr_clear_reset_history(sc); in mpi3mr_bring_ioc_ready()
1254 current_state = mpi3mr_get_iocstate(sc); in mpi3mr_bring_ioc_ready()
1260 } while (((ticks - *start_time) / hz) < sc->ready_timeout); in mpi3mr_bring_ioc_ready()
1422 * @sc: Adapter reference
1429 static inline bool mpi3mr_diagfault_success(struct mpi3mr_softc *sc, in mpi3mr_diagfault_success() argument
1434 mpi3mr_print_fault_info(sc); in mpi3mr_diagfault_success()
1440 * @sc: Adapter instance reference
1448 static int mpi3mr_issue_iocfacts(struct mpi3mr_softc *sc, in mpi3mr_issue_iocfacts() argument
1465 * We can't use sc->dma_loaddr here. We set those only after we get the in mpi3mr_issue_iocfacts()
1470 if (bus_dma_tag_create(sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_issue_iocfacts()
1481 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate request DMA tag\n"); in mpi3mr_issue_iocfacts()
1487 mpi3mr_dprint(sc, MPI3MR_ERROR, "Func: %s line: %d Data DMA mem alloc failed\n", in mpi3mr_issue_iocfacts()
1495 mpi3mr_dprint(sc, MPI3MR_XINFO, "Func: %s line: %d IOCfacts data phys addr= %#016jx size= %d\n", in mpi3mr_issue_iocfacts()
1502 sc->name); in mpi3mr_issue_iocfacts()
1506 mtx_lock(&sc->init_cmds.completion.lock); in mpi3mr_issue_iocfacts()
1509 if (sc->init_cmds.state & MPI3MR_CMD_PENDING) { in mpi3mr_issue_iocfacts()
1512 sc->name); in mpi3mr_issue_iocfacts()
1513 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_issue_iocfacts()
1517 sc->init_cmds.state = MPI3MR_CMD_PENDING; in mpi3mr_issue_iocfacts()
1518 sc->init_cmds.is_waiting = 1; in mpi3mr_issue_iocfacts()
1519 sc->init_cmds.callback = NULL; in mpi3mr_issue_iocfacts()
1526 init_completion(&sc->init_cmds.completion); in mpi3mr_issue_iocfacts()
1528 retval = mpi3mr_submit_admin_cmd(sc, &iocfacts_req, in mpi3mr_issue_iocfacts()
1533 sc->name); in mpi3mr_issue_iocfacts()
1537 wait_for_completion_timeout(&sc->init_cmds.completion, in mpi3mr_issue_iocfacts()
1539 if (!(sc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { in mpi3mr_issue_iocfacts()
1541 sc->name); in mpi3mr_issue_iocfacts()
1542 mpi3mr_check_rh_fault_ioc(sc, in mpi3mr_issue_iocfacts()
1544 sc->unrecoverable = 1; in mpi3mr_issue_iocfacts()
1549 if ((sc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) in mpi3mr_issue_iocfacts()
1552 " Loginfo(0x%08x) \n" , sc->name, in mpi3mr_issue_iocfacts()
1553 (sc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), in mpi3mr_issue_iocfacts()
1554 sc->init_cmds.ioc_loginfo); in mpi3mr_issue_iocfacts()
1561 sc->init_cmds.state = MPI3MR_CMD_NOTUSED; in mpi3mr_issue_iocfacts()
1562 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_issue_iocfacts()
1576 * @sc: Adapter instance reference
1584 static int mpi3mr_process_factsdata(struct mpi3mr_softc *sc, in mpi3mr_process_factsdata() argument
1593 mpi3mr_dprint(sc, MPI3MR_INFO, "IOCFacts data length mismatch " in mpi3mr_process_factsdata()
1599 ioc_config = mpi3mr_regread(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET); in mpi3mr_process_factsdata()
1604 mpi3mr_dprint(sc, MPI3MR_INFO, "IOCFacts data reqFrameSize mismatch " in mpi3mr_process_factsdata()
1609 memset(&sc->facts, 0, sizeof(sc->facts)); in mpi3mr_process_factsdata()
1612 sc->facts.op_req_sz = req_sz; in mpi3mr_process_factsdata()
1613 sc->op_reply_sz = 1 << ((ioc_config & in mpi3mr_process_factsdata()
1617 sc->facts.ioc_num = facts_data->IOCNumber; in mpi3mr_process_factsdata()
1618 sc->facts.who_init = facts_data->WhoInit; in mpi3mr_process_factsdata()
1619 sc->facts.max_msix_vectors = facts_data->MaxMSIxVectors; in mpi3mr_process_factsdata()
1620 sc->facts.personality = (facts_flags & in mpi3mr_process_factsdata()
1622 sc->facts.dma_mask = (facts_flags & in mpi3mr_process_factsdata()
1625 sc->facts.protocol_flags = facts_data->ProtocolFlags; in mpi3mr_process_factsdata()
1626 sc->facts.mpi_version = (facts_data->MPIVersion.Word); in mpi3mr_process_factsdata()
1627 sc->facts.max_reqs = (facts_data->MaxOutstandingRequests); in mpi3mr_process_factsdata()
1628 sc->facts.product_id = (facts_data->ProductID); in mpi3mr_process_factsdata()
1629 sc->facts.reply_sz = (facts_data->ReplyFrameSize) * 4; in mpi3mr_process_factsdata()
1630 sc->facts.exceptions = (facts_data->IOCExceptions); in mpi3mr_process_factsdata()
1631 sc->facts.max_perids = (facts_data->MaxPersistentID); in mpi3mr_process_factsdata()
1632 sc->facts.max_vds = (facts_data->MaxVDs); in mpi3mr_process_factsdata()
1633 sc->facts.max_hpds = (facts_data->MaxHostPDs); in mpi3mr_process_factsdata()
1634 sc->facts.max_advhpds = (facts_data->MaxAdvHostPDs); in mpi3mr_process_factsdata()
1635 sc->facts.max_raidpds = (facts_data->MaxRAIDPDs); in mpi3mr_process_factsdata()
1636 sc->facts.max_nvme = (facts_data->MaxNVMe); in mpi3mr_process_factsdata()
1637 sc->facts.max_pcieswitches = in mpi3mr_process_factsdata()
1639 sc->facts.max_sasexpanders = in mpi3mr_process_factsdata()
1641 sc->facts.max_data_length = facts_data->MaxDataLength; in mpi3mr_process_factsdata()
1642 sc->facts.max_sasinitiators = in mpi3mr_process_factsdata()
1644 sc->facts.max_enclosures = (facts_data->MaxEnclosures); in mpi3mr_process_factsdata()
1645 sc->facts.min_devhandle = (facts_data->MinDevHandle); in mpi3mr_process_factsdata()
1646 sc->facts.max_devhandle = (facts_data->MaxDevHandle); in mpi3mr_process_factsdata()
1647 sc->facts.max_op_req_q = in mpi3mr_process_factsdata()
1649 sc->facts.max_op_reply_q = in mpi3mr_process_factsdata()
1651 sc->facts.ioc_capabilities = in mpi3mr_process_factsdata()
1653 sc->facts.fw_ver.build_num = in mpi3mr_process_factsdata()
1655 sc->facts.fw_ver.cust_id = in mpi3mr_process_factsdata()
1657 sc->facts.fw_ver.ph_minor = facts_data->FWVersion.PhaseMinor; in mpi3mr_process_factsdata()
1658 sc->facts.fw_ver.ph_major = facts_data->FWVersion.PhaseMajor; in mpi3mr_process_factsdata()
1659 sc->facts.fw_ver.gen_minor = facts_data->FWVersion.GenMinor; in mpi3mr_process_factsdata()
1660 sc->facts.fw_ver.gen_major = facts_data->FWVersion.GenMajor; in mpi3mr_process_factsdata()
1661 sc->max_msix_vectors = min(sc->max_msix_vectors, in mpi3mr_process_factsdata()
1662 sc->facts.max_msix_vectors); in mpi3mr_process_factsdata()
1663 sc->facts.sge_mod_mask = facts_data->SGEModifierMask; in mpi3mr_process_factsdata()
1664 sc->facts.sge_mod_value = facts_data->SGEModifierValue; in mpi3mr_process_factsdata()
1665 sc->facts.sge_mod_shift = facts_data->SGEModifierShift; in mpi3mr_process_factsdata()
1666 sc->facts.shutdown_timeout = in mpi3mr_process_factsdata()
1668 sc->facts.max_dev_per_tg = facts_data->MaxDevicesPerThrottleGroup; in mpi3mr_process_factsdata()
1669 sc->facts.io_throttle_data_length = in mpi3mr_process_factsdata()
1671 sc->facts.max_io_throttle_group = in mpi3mr_process_factsdata()
1673 sc->facts.io_throttle_low = facts_data->IOThrottleLow; in mpi3mr_process_factsdata()
1674 sc->facts.io_throttle_high = facts_data->IOThrottleHigh; in mpi3mr_process_factsdata()
1676 if (sc->facts.max_data_length == MPI3_IOCFACTS_MAX_DATA_LENGTH_NOT_REPORTED) in mpi3mr_process_factsdata()
1677 sc->facts.max_data_length = MPI3MR_DEFAULT_MAX_IO_SIZE; in mpi3mr_process_factsdata()
1679 sc->facts.max_data_length *= MPI3MR_PAGE_SIZE_4K; in mpi3mr_process_factsdata()
1681 if (sc->facts.io_throttle_data_length) in mpi3mr_process_factsdata()
1682 sc->io_throttle_data_length = in mpi3mr_process_factsdata()
1683 (sc->facts.io_throttle_data_length * 2 * 4); in mpi3mr_process_factsdata()
1686 sc->io_throttle_data_length = MPI3MR_MAX_SECTORS + 2; in mpi3mr_process_factsdata()
1688 sc->io_throttle_high = (sc->facts.io_throttle_high * 2 * 1024); in mpi3mr_process_factsdata()
1689 sc->io_throttle_low = (sc->facts.io_throttle_low * 2 * 1024); in mpi3mr_process_factsdata()
1691 fwver = &sc->facts.fw_ver; in mpi3mr_process_factsdata()
1692 snprintf(sc->fw_version, sizeof(sc->fw_version), in mpi3mr_process_factsdata()
1697 mpi3mr_dprint(sc, MPI3MR_INFO, "ioc_num(%d), maxopQ(%d), maxopRepQ(%d), maxdh(%d)," in mpi3mr_process_factsdata()
1699 sc->facts.ioc_num, sc->facts.max_op_req_q, in mpi3mr_process_factsdata()
1700 sc->facts.max_op_reply_q, sc->facts.max_devhandle, in mpi3mr_process_factsdata()
1701 sc->facts.max_reqs, sc->facts.min_devhandle, in mpi3mr_process_factsdata()
1702 sc->facts.max_pds, sc->facts.max_msix_vectors, in mpi3mr_process_factsdata()
1703 sc->facts.max_perids); in mpi3mr_process_factsdata()
1704 mpi3mr_dprint(sc, MPI3MR_INFO, "SGEModMask 0x%x SGEModVal 0x%x SGEModShift 0x%x\n", in mpi3mr_process_factsdata()
1705 sc->facts.sge_mod_mask, sc->facts.sge_mod_value, in mpi3mr_process_factsdata()
1706 sc->facts.sge_mod_shift); in mpi3mr_process_factsdata()
1707 mpi3mr_dprint(sc, MPI3MR_INFO, in mpi3mr_process_factsdata()
1709 sc->facts.max_dev_per_tg, sc->facts.max_io_throttle_group, in mpi3mr_process_factsdata()
1710 sc->facts.io_throttle_data_length * 4, in mpi3mr_process_factsdata()
1711 sc->facts.io_throttle_high, sc->facts.io_throttle_low); in mpi3mr_process_factsdata()
1713 sc->max_host_ios = sc->facts.max_reqs - in mpi3mr_process_factsdata()
1722 if (sc->facts.dma_mask == 0 || in mpi3mr_process_factsdata()
1723 (sc->facts.dma_mask >= sizeof(bus_addr_t) * 8)) in mpi3mr_process_factsdata()
1724 sc->dma_loaddr = BUS_SPACE_MAXADDR; in mpi3mr_process_factsdata()
1726 sc->dma_loaddr = ~((1ull << sc->facts.dma_mask) - 1); in mpi3mr_process_factsdata()
1727 mpi3mr_dprint(sc, MPI3MR_INFO, in mpi3mr_process_factsdata()
1729 sc->facts.dma_mask, sc->dma_loaddr); in mpi3mr_process_factsdata()
1734 static inline void mpi3mr_setup_reply_free_queues(struct mpi3mr_softc *sc) in mpi3mr_setup_reply_free_queues() argument
1740 for (i = 0, phys_addr = sc->reply_buf_phys; in mpi3mr_setup_reply_free_queues()
1741 i < sc->num_reply_bufs; i++, phys_addr += sc->reply_sz) in mpi3mr_setup_reply_free_queues()
1742 sc->reply_free_q[i] = phys_addr; in mpi3mr_setup_reply_free_queues()
1743 sc->reply_free_q[i] = (0); in mpi3mr_setup_reply_free_queues()
1746 for (i = 0, phys_addr = sc->sense_buf_phys; in mpi3mr_setup_reply_free_queues()
1747 i < sc->num_sense_bufs; i++, phys_addr += MPI3MR_SENSEBUF_SZ) in mpi3mr_setup_reply_free_queues()
1748 sc->sense_buf_q[i] = phys_addr; in mpi3mr_setup_reply_free_queues()
1749 sc->sense_buf_q[i] = (0); in mpi3mr_setup_reply_free_queues()
1753 static int mpi3mr_reply_dma_alloc(struct mpi3mr_softc *sc) in mpi3mr_reply_dma_alloc() argument
1757 sc->num_reply_bufs = sc->facts.max_reqs + MPI3MR_NUM_EVTREPLIES; in mpi3mr_reply_dma_alloc()
1758 sc->reply_free_q_sz = sc->num_reply_bufs + 1; in mpi3mr_reply_dma_alloc()
1759 sc->num_sense_bufs = sc->facts.max_reqs / MPI3MR_SENSEBUF_FACTOR; in mpi3mr_reply_dma_alloc()
1760 sc->sense_buf_q_sz = sc->num_sense_bufs + 1; in mpi3mr_reply_dma_alloc()
1762 sz = sc->num_reply_bufs * sc->reply_sz; in mpi3mr_reply_dma_alloc()
1764 if (bus_dma_tag_create(sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_reply_dma_alloc()
1766 sc->dma_loaddr, /* lowaddr */ in mpi3mr_reply_dma_alloc()
1774 &sc->reply_buf_tag)) { in mpi3mr_reply_dma_alloc()
1775 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate request DMA tag\n"); in mpi3mr_reply_dma_alloc()
1779 if (bus_dmamem_alloc(sc->reply_buf_tag, (void **)&sc->reply_buf, in mpi3mr_reply_dma_alloc()
1780 BUS_DMA_NOWAIT, &sc->reply_buf_dmamap)) { in mpi3mr_reply_dma_alloc()
1781 mpi3mr_dprint(sc, MPI3MR_ERROR, "Func: %s line: %d DMA mem alloc failed\n", in mpi3mr_reply_dma_alloc()
1786 bzero(sc->reply_buf, sz); in mpi3mr_reply_dma_alloc()
1787 bus_dmamap_load(sc->reply_buf_tag, sc->reply_buf_dmamap, sc->reply_buf, sz, in mpi3mr_reply_dma_alloc()
1788 mpi3mr_memaddr_cb, &sc->reply_buf_phys, BUS_DMA_NOWAIT); in mpi3mr_reply_dma_alloc()
1790 sc->reply_buf_dma_min_address = sc->reply_buf_phys; in mpi3mr_reply_dma_alloc()
1791 sc->reply_buf_dma_max_address = sc->reply_buf_phys + sz; in mpi3mr_reply_dma_alloc()
1792 mpi3mr_dprint(sc, MPI3MR_XINFO, "reply buf (0x%p): depth(%d), frame_size(%d), " in mpi3mr_reply_dma_alloc()
1794 sc->reply_buf, sc->num_reply_bufs, sc->reply_sz, in mpi3mr_reply_dma_alloc()
1795 (sz / 1024), (unsigned long long)sc->reply_buf_phys); in mpi3mr_reply_dma_alloc()
1798 sz = sc->reply_free_q_sz * 8; in mpi3mr_reply_dma_alloc()
1800 if (bus_dma_tag_create(sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_reply_dma_alloc()
1802 sc->dma_loaddr, /* lowaddr */ in mpi3mr_reply_dma_alloc()
1810 &sc->reply_free_q_tag)) { in mpi3mr_reply_dma_alloc()
1811 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate reply free queue DMA tag\n"); in mpi3mr_reply_dma_alloc()
1815 if (bus_dmamem_alloc(sc->reply_free_q_tag, (void **)&sc->reply_free_q, in mpi3mr_reply_dma_alloc()
1816 BUS_DMA_NOWAIT, &sc->reply_free_q_dmamap)) { in mpi3mr_reply_dma_alloc()
1817 mpi3mr_dprint(sc, MPI3MR_ERROR, "Func: %s line: %d DMA mem alloc failed\n", in mpi3mr_reply_dma_alloc()
1822 bzero(sc->reply_free_q, sz); in mpi3mr_reply_dma_alloc()
1823 bus_dmamap_load(sc->reply_free_q_tag, sc->reply_free_q_dmamap, sc->reply_free_q, sz, in mpi3mr_reply_dma_alloc()
1824 mpi3mr_memaddr_cb, &sc->reply_free_q_phys, BUS_DMA_NOWAIT); in mpi3mr_reply_dma_alloc()
1826 mpi3mr_dprint(sc, MPI3MR_XINFO, "reply_free_q (0x%p): depth(%d), frame_size(%d), " in mpi3mr_reply_dma_alloc()
1828 sc->reply_free_q, sc->reply_free_q_sz, 8, (sz / 1024), in mpi3mr_reply_dma_alloc()
1829 (unsigned long long)sc->reply_free_q_phys); in mpi3mr_reply_dma_alloc()
1832 sz = sc->num_sense_bufs * MPI3MR_SENSEBUF_SZ; in mpi3mr_reply_dma_alloc()
1834 if (bus_dma_tag_create(sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_reply_dma_alloc()
1836 sc->dma_loaddr, /* lowaddr */ in mpi3mr_reply_dma_alloc()
1844 &sc->sense_buf_tag)) { in mpi3mr_reply_dma_alloc()
1845 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate Sense buffer DMA tag\n"); in mpi3mr_reply_dma_alloc()
1849 if (bus_dmamem_alloc(sc->sense_buf_tag, (void **)&sc->sense_buf, in mpi3mr_reply_dma_alloc()
1850 BUS_DMA_NOWAIT, &sc->sense_buf_dmamap)) { in mpi3mr_reply_dma_alloc()
1851 mpi3mr_dprint(sc, MPI3MR_ERROR, "Func: %s line: %d DMA mem alloc failed\n", in mpi3mr_reply_dma_alloc()
1856 bzero(sc->sense_buf, sz); in mpi3mr_reply_dma_alloc()
1857 bus_dmamap_load(sc->sense_buf_tag, sc->sense_buf_dmamap, sc->sense_buf, sz, in mpi3mr_reply_dma_alloc()
1858 mpi3mr_memaddr_cb, &sc->sense_buf_phys, BUS_DMA_NOWAIT); in mpi3mr_reply_dma_alloc()
1860 mpi3mr_dprint(sc, MPI3MR_XINFO, "sense_buf (0x%p): depth(%d), frame_size(%d), " in mpi3mr_reply_dma_alloc()
1862 sc->sense_buf, sc->num_sense_bufs, MPI3MR_SENSEBUF_SZ, in mpi3mr_reply_dma_alloc()
1863 (sz / 1024), (unsigned long long)sc->sense_buf_phys); in mpi3mr_reply_dma_alloc()
1866 sz = sc->sense_buf_q_sz * 8; in mpi3mr_reply_dma_alloc()
1868 if (bus_dma_tag_create(sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_reply_dma_alloc()
1870 sc->dma_loaddr, /* lowaddr */ in mpi3mr_reply_dma_alloc()
1878 &sc->sense_buf_q_tag)) { in mpi3mr_reply_dma_alloc()
1879 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate Sense buffer Queue DMA tag\n"); in mpi3mr_reply_dma_alloc()
1883 if (bus_dmamem_alloc(sc->sense_buf_q_tag, (void **)&sc->sense_buf_q, in mpi3mr_reply_dma_alloc()
1884 BUS_DMA_NOWAIT, &sc->sense_buf_q_dmamap)) { in mpi3mr_reply_dma_alloc()
1885 mpi3mr_dprint(sc, MPI3MR_ERROR, "Func: %s line: %d DMA mem alloc failed\n", in mpi3mr_reply_dma_alloc()
1890 bzero(sc->sense_buf_q, sz); in mpi3mr_reply_dma_alloc()
1891 bus_dmamap_load(sc->sense_buf_q_tag, sc->sense_buf_q_dmamap, sc->sense_buf_q, sz, in mpi3mr_reply_dma_alloc()
1892 mpi3mr_memaddr_cb, &sc->sense_buf_q_phys, BUS_DMA_NOWAIT); in mpi3mr_reply_dma_alloc()
1894 mpi3mr_dprint(sc, MPI3MR_XINFO, "sense_buf_q (0x%p): depth(%d), frame_size(%d), " in mpi3mr_reply_dma_alloc()
1896 sc->sense_buf_q, sc->sense_buf_q_sz, 8, (sz / 1024), in mpi3mr_reply_dma_alloc()
1897 (unsigned long long)sc->sense_buf_q_phys); in mpi3mr_reply_dma_alloc()
1902 static int mpi3mr_reply_alloc(struct mpi3mr_softc *sc) in mpi3mr_reply_alloc() argument
1907 if (sc->init_cmds.reply) in mpi3mr_reply_alloc()
1910 sc->init_cmds.reply = malloc(sc->reply_sz, in mpi3mr_reply_alloc()
1913 if (!sc->init_cmds.reply) { in mpi3mr_reply_alloc()
1915 sc->name); in mpi3mr_reply_alloc()
1919 sc->cfg_cmds.reply = malloc(sc->reply_sz, in mpi3mr_reply_alloc()
1922 if (!sc->cfg_cmds.reply) { in mpi3mr_reply_alloc()
1924 sc->name); in mpi3mr_reply_alloc()
1928 sc->ioctl_cmds.reply = malloc(sc->reply_sz, M_MPI3MR, M_NOWAIT | M_ZERO); in mpi3mr_reply_alloc()
1929 if (!sc->ioctl_cmds.reply) { in mpi3mr_reply_alloc()
1931 sc->name); in mpi3mr_reply_alloc()
1935 sc->host_tm_cmds.reply = malloc(sc->reply_sz, M_MPI3MR, M_NOWAIT | M_ZERO); in mpi3mr_reply_alloc()
1936 if (!sc->host_tm_cmds.reply) { in mpi3mr_reply_alloc()
1938 sc->name); in mpi3mr_reply_alloc()
1942 sc->dev_rmhs_cmds[i].reply = malloc(sc->reply_sz, in mpi3mr_reply_alloc()
1944 if (!sc->dev_rmhs_cmds[i].reply) { in mpi3mr_reply_alloc()
1947 sc->name, i); in mpi3mr_reply_alloc()
1953 sc->evtack_cmds[i].reply = malloc(sc->reply_sz, in mpi3mr_reply_alloc()
1955 if (!sc->evtack_cmds[i].reply) in mpi3mr_reply_alloc()
1959 sc->dev_handle_bitmap_sz = MPI3MR_DIV_ROUND_UP(sc->facts.max_devhandle, 8); in mpi3mr_reply_alloc()
1961 sc->removepend_bitmap = malloc(sc->dev_handle_bitmap_sz, in mpi3mr_reply_alloc()
1963 if (!sc->removepend_bitmap) { in mpi3mr_reply_alloc()
1965 sc->name); in mpi3mr_reply_alloc()
1969 sc->devrem_bitmap_sz = MPI3MR_DIV_ROUND_UP(MPI3MR_NUM_DEVRMCMD, 8); in mpi3mr_reply_alloc()
1970 sc->devrem_bitmap = malloc(sc->devrem_bitmap_sz, in mpi3mr_reply_alloc()
1972 if (!sc->devrem_bitmap) { in mpi3mr_reply_alloc()
1974 sc->name); in mpi3mr_reply_alloc()
1978 sc->evtack_cmds_bitmap_sz = MPI3MR_DIV_ROUND_UP(MPI3MR_NUM_EVTACKCMD, 8); in mpi3mr_reply_alloc()
1980 sc->evtack_cmds_bitmap = malloc(sc->evtack_cmds_bitmap_sz, in mpi3mr_reply_alloc()
1982 if (!sc->evtack_cmds_bitmap) in mpi3mr_reply_alloc()
1985 if (mpi3mr_reply_dma_alloc(sc)) { in mpi3mr_reply_alloc()
1987 sc->name, __func__, __LINE__); in mpi3mr_reply_alloc()
1992 mpi3mr_setup_reply_free_queues(sc); in mpi3mr_reply_alloc()
1995 mpi3mr_cleanup_interrupts(sc); in mpi3mr_reply_alloc()
1996 mpi3mr_free_mem(sc); in mpi3mr_reply_alloc()
2002 mpi3mr_print_fw_pkg_ver(struct mpi3mr_softc *sc) in mpi3mr_print_fw_pkg_ver() argument
2014 if (bus_dma_tag_create(sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_print_fw_pkg_ver()
2016 sc->dma_loaddr, /* lowaddr */ in mpi3mr_print_fw_pkg_ver()
2025 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate fw package version request DMA tag\n"); in mpi3mr_print_fw_pkg_ver()
2030 mpi3mr_dprint(sc, MPI3MR_ERROR, "Func: %s line: %d fw package version DMA mem alloc failed\n", in mpi3mr_print_fw_pkg_ver()
2040 …mpi3mr_dprint(sc, MPI3MR_XINFO, "Func: %s line: %d fw package version phys addr= %#016jx size= %d\… in mpi3mr_print_fw_pkg_ver()
2044 mpi3mr_dprint(sc, MPI3MR_ERROR, "Memory alloc for fw package version failed\n"); in mpi3mr_print_fw_pkg_ver()
2049 mtx_lock(&sc->init_cmds.completion.lock); in mpi3mr_print_fw_pkg_ver()
2050 if (sc->init_cmds.state & MPI3MR_CMD_PENDING) { in mpi3mr_print_fw_pkg_ver()
2051 mpi3mr_dprint(sc, MPI3MR_INFO,"Issue CI Header Upload: command is in use\n"); in mpi3mr_print_fw_pkg_ver()
2052 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_print_fw_pkg_ver()
2055 sc->init_cmds.state = MPI3MR_CMD_PENDING; in mpi3mr_print_fw_pkg_ver()
2056 sc->init_cmds.is_waiting = 1; in mpi3mr_print_fw_pkg_ver()
2057 sc->init_cmds.callback = NULL; in mpi3mr_print_fw_pkg_ver()
2067 init_completion(&sc->init_cmds.completion); in mpi3mr_print_fw_pkg_ver()
2068 if ((retval = mpi3mr_submit_admin_cmd(sc, &ci_upload, sizeof(ci_upload)))) { in mpi3mr_print_fw_pkg_ver()
2069 mpi3mr_dprint(sc, MPI3MR_ERROR, "Issue CI Header Upload: Admin Post failed\n"); in mpi3mr_print_fw_pkg_ver()
2072 wait_for_completion_timeout(&sc->init_cmds.completion, in mpi3mr_print_fw_pkg_ver()
2074 if (!(sc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { in mpi3mr_print_fw_pkg_ver()
2075 mpi3mr_dprint(sc, MPI3MR_ERROR, "Issue CI Header Upload: command timed out\n"); in mpi3mr_print_fw_pkg_ver()
2076 sc->init_cmds.is_waiting = 0; in mpi3mr_print_fw_pkg_ver()
2077 if (!(sc->init_cmds.state & MPI3MR_CMD_RESET)) in mpi3mr_print_fw_pkg_ver()
2078 mpi3mr_check_rh_fault_ioc(sc, in mpi3mr_print_fw_pkg_ver()
2082 if ((GET_IOC_STATUS(sc->init_cmds.ioc_status)) != MPI3_IOCSTATUS_SUCCESS) { in mpi3mr_print_fw_pkg_ver()
2083 mpi3mr_dprint(sc, MPI3MR_ERROR, in mpi3mr_print_fw_pkg_ver()
2085 GET_IOC_STATUS(sc->init_cmds.ioc_status), sc->init_cmds.ioc_loginfo); in mpi3mr_print_fw_pkg_ver()
2090 mpi3mr_dprint(sc, MPI3MR_XINFO, in mpi3mr_print_fw_pkg_ver()
2096 mpi3mr_dprint(sc, MPI3MR_INFO, "FW Package Version: %02d.%02d.%02d.%02d\n", in mpi3mr_print_fw_pkg_ver()
2102 sc->init_cmds.state = MPI3MR_CMD_NOTUSED; in mpi3mr_print_fw_pkg_ver()
2103 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_print_fw_pkg_ver()
2117 * @sc: Adapter instance reference
2124 static int mpi3mr_issue_iocinit(struct mpi3mr_softc *sc) in mpi3mr_issue_iocinit() argument
2136 if (bus_dma_tag_create(sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_issue_iocinit()
2138 sc->dma_loaddr, /* lowaddr */ in mpi3mr_issue_iocinit()
2147 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate request DMA tag\n"); in mpi3mr_issue_iocinit()
2153 mpi3mr_dprint(sc, MPI3MR_ERROR, "Func: %s line: %d Data DMA mem alloc failed\n", in mpi3mr_issue_iocinit()
2161 …mpi3mr_dprint(sc, MPI3MR_XINFO, "Func: %s line: %d IOCfacts drvr_info phys addr= %#016jx size= %d\… in mpi3mr_issue_iocinit()
2168 sc->name); in mpi3mr_issue_iocinit()
2179 memcpy((U8 *)&sc->driver_info, (U8 *)drvr_info, sizeof(sc->driver_info)); in mpi3mr_issue_iocinit()
2182 mtx_lock(&sc->init_cmds.completion.lock); in mpi3mr_issue_iocinit()
2183 if (sc->init_cmds.state & MPI3MR_CMD_PENDING) { in mpi3mr_issue_iocinit()
2186 sc->name); in mpi3mr_issue_iocinit()
2187 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_issue_iocinit()
2190 sc->init_cmds.state = MPI3MR_CMD_PENDING; in mpi3mr_issue_iocinit()
2191 sc->init_cmds.is_waiting = 1; in mpi3mr_issue_iocinit()
2192 sc->init_cmds.callback = NULL; in mpi3mr_issue_iocinit()
2200 iocinit_req.ReplyFreeQueueDepth = sc->reply_free_q_sz; in mpi3mr_issue_iocinit()
2202 sc->reply_free_q_phys; in mpi3mr_issue_iocinit()
2205 sc->sense_buf_q_sz; in mpi3mr_issue_iocinit()
2207 sc->sense_buf_q_phys; in mpi3mr_issue_iocinit()
2216 init_completion(&sc->init_cmds.completion); in mpi3mr_issue_iocinit()
2217 retval = mpi3mr_submit_admin_cmd(sc, &iocinit_req, in mpi3mr_issue_iocinit()
2222 sc->name); in mpi3mr_issue_iocinit()
2226 wait_for_completion_timeout(&sc->init_cmds.completion, in mpi3mr_issue_iocinit()
2228 if (!(sc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { in mpi3mr_issue_iocinit()
2230 sc->name); in mpi3mr_issue_iocinit()
2231 mpi3mr_check_rh_fault_ioc(sc, in mpi3mr_issue_iocinit()
2233 sc->unrecoverable = 1; in mpi3mr_issue_iocinit()
2238 if ((sc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) in mpi3mr_issue_iocinit()
2241 " Loginfo(0x%08x) \n" , sc->name, in mpi3mr_issue_iocinit()
2242 (sc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), in mpi3mr_issue_iocinit()
2243 sc->init_cmds.ioc_loginfo); in mpi3mr_issue_iocinit()
2249 sc->init_cmds.state = MPI3MR_CMD_NOTUSED; in mpi3mr_issue_iocinit()
2250 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_issue_iocinit()
2263 mpi3mr_display_ioc_info(struct mpi3mr_softc *sc) in mpi3mr_display_ioc_info() argument
2268 switch (sc->facts.personality) { in mpi3mr_display_ioc_info()
2280 mpi3mr_dprint(sc, MPI3MR_INFO, "Current Personality: %s\n", personality); in mpi3mr_display_ioc_info()
2282 mpi3mr_dprint(sc, MPI3MR_INFO, "%s\n", sc->fw_version); in mpi3mr_display_ioc_info()
2284 mpi3mr_dprint(sc, MPI3MR_INFO, "Protocol=("); in mpi3mr_display_ioc_info()
2286 if (sc->facts.protocol_flags & in mpi3mr_display_ioc_info()
2292 if (sc->facts.protocol_flags & in mpi3mr_display_ioc_info()
2298 if (sc->facts.protocol_flags & in mpi3mr_display_ioc_info()
2307 if (sc->facts.ioc_capabilities & in mpi3mr_display_ioc_info()
2318 * @sc: Adapter instance reference
2326 static void mpi3mr_unmask_events(struct mpi3mr_softc *sc, U16 event) in mpi3mr_unmask_events() argument
2336 sc->event_masks[0] &= ~desired_event; in mpi3mr_unmask_events()
2338 sc->event_masks[1] &= ~desired_event; in mpi3mr_unmask_events()
2340 sc->event_masks[2] &= ~desired_event; in mpi3mr_unmask_events()
2342 sc->event_masks[3] &= ~desired_event; in mpi3mr_unmask_events()
2345 static void mpi3mr_set_events_mask(struct mpi3mr_softc *sc) in mpi3mr_set_events_mask() argument
2349 sc->event_masks[i] = -1; in mpi3mr_set_events_mask()
2351 mpi3mr_unmask_events(sc, MPI3_EVENT_DEVICE_ADDED); in mpi3mr_set_events_mask()
2352 mpi3mr_unmask_events(sc, MPI3_EVENT_DEVICE_INFO_CHANGED); in mpi3mr_set_events_mask()
2353 mpi3mr_unmask_events(sc, MPI3_EVENT_DEVICE_STATUS_CHANGE); in mpi3mr_set_events_mask()
2355 mpi3mr_unmask_events(sc, MPI3_EVENT_ENCL_DEVICE_STATUS_CHANGE); in mpi3mr_set_events_mask()
2357 mpi3mr_unmask_events(sc, MPI3_EVENT_SAS_TOPOLOGY_CHANGE_LIST); in mpi3mr_set_events_mask()
2358 mpi3mr_unmask_events(sc, MPI3_EVENT_SAS_DISCOVERY); in mpi3mr_set_events_mask()
2359 mpi3mr_unmask_events(sc, MPI3_EVENT_SAS_DEVICE_DISCOVERY_ERROR); in mpi3mr_set_events_mask()
2360 mpi3mr_unmask_events(sc, MPI3_EVENT_SAS_BROADCAST_PRIMITIVE); in mpi3mr_set_events_mask()
2362 mpi3mr_unmask_events(sc, MPI3_EVENT_PCIE_TOPOLOGY_CHANGE_LIST); in mpi3mr_set_events_mask()
2363 mpi3mr_unmask_events(sc, MPI3_EVENT_PCIE_ENUMERATION); in mpi3mr_set_events_mask()
2365 mpi3mr_unmask_events(sc, MPI3_EVENT_PREPARE_FOR_RESET); in mpi3mr_set_events_mask()
2366 mpi3mr_unmask_events(sc, MPI3_EVENT_CABLE_MGMT); in mpi3mr_set_events_mask()
2367 mpi3mr_unmask_events(sc, MPI3_EVENT_ENERGY_PACK_CHANGE); in mpi3mr_set_events_mask()
2372 * @sc: Adapter instance reference
2379 int mpi3mr_issue_event_notification(struct mpi3mr_softc *sc) in mpi3mr_issue_event_notification() argument
2386 mtx_lock(&sc->init_cmds.completion.lock); in mpi3mr_issue_event_notification()
2387 if (sc->init_cmds.state & MPI3MR_CMD_PENDING) { in mpi3mr_issue_event_notification()
2390 sc->name); in mpi3mr_issue_event_notification()
2391 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_issue_event_notification()
2394 sc->init_cmds.state = MPI3MR_CMD_PENDING; in mpi3mr_issue_event_notification()
2395 sc->init_cmds.is_waiting = 1; in mpi3mr_issue_event_notification()
2396 sc->init_cmds.callback = NULL; in mpi3mr_issue_event_notification()
2401 (sc->event_masks[i]); in mpi3mr_issue_event_notification()
2402 init_completion(&sc->init_cmds.completion); in mpi3mr_issue_event_notification()
2403 retval = mpi3mr_submit_admin_cmd(sc, &evtnotify_req, in mpi3mr_issue_event_notification()
2407 sc->name); in mpi3mr_issue_event_notification()
2411 poll_for_command_completion(sc, in mpi3mr_issue_event_notification()
2412 &sc->init_cmds, in mpi3mr_issue_event_notification()
2414 if (!(sc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { in mpi3mr_issue_event_notification()
2416 sc->name); in mpi3mr_issue_event_notification()
2417 mpi3mr_check_rh_fault_ioc(sc, in mpi3mr_issue_event_notification()
2423 if ((sc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) in mpi3mr_issue_event_notification()
2426 " Loginfo(0x%08x) \n" , sc->name, in mpi3mr_issue_event_notification()
2427 (sc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), in mpi3mr_issue_event_notification()
2428 sc->init_cmds.ioc_loginfo); in mpi3mr_issue_event_notification()
2434 sc->init_cmds.state = MPI3MR_CMD_NOTUSED; in mpi3mr_issue_event_notification()
2435 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_issue_event_notification()
2442 mpi3mr_register_events(struct mpi3mr_softc *sc) in mpi3mr_register_events() argument
2446 mpi3mr_set_events_mask(sc); in mpi3mr_register_events()
2448 error = mpi3mr_issue_event_notification(sc); in mpi3mr_register_events()
2452 sc->name, error); in mpi3mr_register_events()
2460 * @sc: Adapter instance reference
2469 int mpi3mr_process_event_ack(struct mpi3mr_softc *sc, U8 event, in mpi3mr_process_event_ack() argument
2476 mtx_lock(&sc->init_cmds.completion.lock); in mpi3mr_process_event_ack()
2477 if (sc->init_cmds.state & MPI3MR_CMD_PENDING) { in mpi3mr_process_event_ack()
2480 sc->name); in mpi3mr_process_event_ack()
2481 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_process_event_ack()
2484 sc->init_cmds.state = MPI3MR_CMD_PENDING; in mpi3mr_process_event_ack()
2485 sc->init_cmds.is_waiting = 1; in mpi3mr_process_event_ack()
2486 sc->init_cmds.callback = NULL; in mpi3mr_process_event_ack()
2492 init_completion(&sc->init_cmds.completion); in mpi3mr_process_event_ack()
2493 retval = mpi3mr_submit_admin_cmd(sc, &evtack_req, in mpi3mr_process_event_ack()
2497 sc->name); in mpi3mr_process_event_ack()
2501 wait_for_completion_timeout(&sc->init_cmds.completion, in mpi3mr_process_event_ack()
2503 if (!(sc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { in mpi3mr_process_event_ack()
2505 sc->name); in mpi3mr_process_event_ack()
2510 if ((sc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) in mpi3mr_process_event_ack()
2513 " Loginfo(0x%08x) \n" , sc->name, in mpi3mr_process_event_ack()
2514 (sc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), in mpi3mr_process_event_ack()
2515 sc->init_cmds.ioc_loginfo); in mpi3mr_process_event_ack()
2521 sc->init_cmds.state = MPI3MR_CMD_NOTUSED; in mpi3mr_process_event_ack()
2522 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_process_event_ack()
2529 static int mpi3mr_alloc_chain_bufs(struct mpi3mr_softc *sc) in mpi3mr_alloc_chain_bufs() argument
2535 num_chains = sc->max_host_ios; in mpi3mr_alloc_chain_bufs()
2537 sc->chain_buf_count = num_chains; in mpi3mr_alloc_chain_bufs()
2540 sc->chain_sgl_list = malloc(sz, M_MPI3MR, M_NOWAIT | M_ZERO); in mpi3mr_alloc_chain_bufs()
2542 if (!sc->chain_sgl_list) { in mpi3mr_alloc_chain_bufs()
2544 sc->name); in mpi3mr_alloc_chain_bufs()
2549 if (sc->max_sgl_entries > sc->facts.max_data_length / PAGE_SIZE) in mpi3mr_alloc_chain_bufs()
2550 sc->max_sgl_entries = sc->facts.max_data_length / PAGE_SIZE; in mpi3mr_alloc_chain_bufs()
2551 sz = sc->max_sgl_entries * sizeof(Mpi3SGESimple_t); in mpi3mr_alloc_chain_bufs()
2553 if (bus_dma_tag_create(sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_alloc_chain_bufs()
2555 sc->dma_loaddr, /* lowaddr */ in mpi3mr_alloc_chain_bufs()
2563 &sc->chain_sgl_list_tag)) { in mpi3mr_alloc_chain_bufs()
2564 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate Chain buffer DMA tag\n"); in mpi3mr_alloc_chain_bufs()
2569 if (bus_dmamem_alloc(sc->chain_sgl_list_tag, (void **)&sc->chain_sgl_list[i].buf, in mpi3mr_alloc_chain_bufs()
2570 BUS_DMA_NOWAIT, &sc->chain_sgl_list[i].buf_dmamap)) { in mpi3mr_alloc_chain_bufs()
2571 mpi3mr_dprint(sc, MPI3MR_ERROR, "Func: %s line: %d DMA mem alloc failed\n", in mpi3mr_alloc_chain_bufs()
2576 bzero(sc->chain_sgl_list[i].buf, sz); in mpi3mr_alloc_chain_bufs()
2577 …bus_dmamap_load(sc->chain_sgl_list_tag, sc->chain_sgl_list[i].buf_dmamap, sc->chain_sgl_list[i].bu… in mpi3mr_alloc_chain_bufs()
2578 mpi3mr_memaddr_cb, &sc->chain_sgl_list[i].buf_phys, BUS_DMA_NOWAIT); in mpi3mr_alloc_chain_bufs()
2579 mpi3mr_dprint(sc, MPI3MR_XINFO, "Func: %s line: %d phys addr= %#016jx size= %d\n", in mpi3mr_alloc_chain_bufs()
2580 __func__, __LINE__, (uintmax_t)sc->chain_sgl_list[i].buf_phys, sz); in mpi3mr_alloc_chain_bufs()
2583 sc->chain_bitmap_sz = MPI3MR_DIV_ROUND_UP(num_chains, 8); in mpi3mr_alloc_chain_bufs()
2585 sc->chain_bitmap = malloc(sc->chain_bitmap_sz, M_MPI3MR, M_NOWAIT | M_ZERO); in mpi3mr_alloc_chain_bufs()
2586 if (!sc->chain_bitmap) { in mpi3mr_alloc_chain_bufs()
2587 mpi3mr_dprint(sc, MPI3MR_INFO, "Cannot alloc memory for chain bitmap\n"); in mpi3mr_alloc_chain_bufs()
2595 if (sc->chain_sgl_list[i].buf_phys != 0) in mpi3mr_alloc_chain_bufs()
2596 bus_dmamap_unload(sc->chain_sgl_list_tag, sc->chain_sgl_list[i].buf_dmamap); in mpi3mr_alloc_chain_bufs()
2597 if (sc->chain_sgl_list[i].buf != NULL) in mpi3mr_alloc_chain_bufs()
2598 …bus_dmamem_free(sc->chain_sgl_list_tag, sc->chain_sgl_list[i].buf, sc->chain_sgl_list[i].buf_dmama… in mpi3mr_alloc_chain_bufs()
2600 if (sc->chain_sgl_list_tag != NULL) in mpi3mr_alloc_chain_bufs()
2601 bus_dma_tag_destroy(sc->chain_sgl_list_tag); in mpi3mr_alloc_chain_bufs()
2605 static int mpi3mr_pel_alloc(struct mpi3mr_softc *sc) in mpi3mr_pel_alloc() argument
2609 if (!sc->pel_cmds.reply) { in mpi3mr_pel_alloc()
2610 sc->pel_cmds.reply = malloc(sc->reply_sz, M_MPI3MR, M_NOWAIT | M_ZERO); in mpi3mr_pel_alloc()
2611 if (!sc->pel_cmds.reply) { in mpi3mr_pel_alloc()
2613 sc->name); in mpi3mr_pel_alloc()
2618 if (!sc->pel_abort_cmd.reply) { in mpi3mr_pel_alloc()
2619 sc->pel_abort_cmd.reply = malloc(sc->reply_sz, M_MPI3MR, M_NOWAIT | M_ZERO); in mpi3mr_pel_alloc()
2620 if (!sc->pel_abort_cmd.reply) { in mpi3mr_pel_alloc()
2622 sc->name); in mpi3mr_pel_alloc()
2627 if (!sc->pel_seq_number) { in mpi3mr_pel_alloc()
2628 sc->pel_seq_number_sz = sizeof(Mpi3PELSeq_t); in mpi3mr_pel_alloc()
2629 if (bus_dma_tag_create(sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_pel_alloc()
2631 sc->dma_loaddr, /* lowaddr */ in mpi3mr_pel_alloc()
2634 sc->pel_seq_number_sz, /* maxsize */ in mpi3mr_pel_alloc()
2636 sc->pel_seq_number_sz, /* maxsegsize */ in mpi3mr_pel_alloc()
2639 &sc->pel_seq_num_dmatag)) { in mpi3mr_pel_alloc()
2640 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot create PEL seq number dma memory tag\n"); in mpi3mr_pel_alloc()
2645 if (bus_dmamem_alloc(sc->pel_seq_num_dmatag, (void **)&sc->pel_seq_number, in mpi3mr_pel_alloc()
2646 BUS_DMA_NOWAIT, &sc->pel_seq_num_dmamap)) { in mpi3mr_pel_alloc()
2647 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate PEL seq number kernel buffer dma memory\n"); in mpi3mr_pel_alloc()
2652 bzero(sc->pel_seq_number, sc->pel_seq_number_sz); in mpi3mr_pel_alloc()
2654 bus_dmamap_load(sc->pel_seq_num_dmatag, sc->pel_seq_num_dmamap, sc->pel_seq_number, in mpi3mr_pel_alloc()
2655 sc->pel_seq_number_sz, mpi3mr_memaddr_cb, &sc->pel_seq_number_dma, BUS_DMA_NOWAIT); in mpi3mr_pel_alloc()
2657 if (!sc->pel_seq_number) { in mpi3mr_pel_alloc()
2658 printf(IOCNAME "%s:%d Cannot load PEL seq number dma memory for size: %d\n", sc->name, in mpi3mr_pel_alloc()
2659 __func__, __LINE__, sc->pel_seq_number_sz); in mpi3mr_pel_alloc()
2671 * @sc: Adapter instance reference
2677 mpi3mr_validate_fw_update(struct mpi3mr_softc *sc) in mpi3mr_validate_fw_update() argument
2682 if (sc->facts.reply_sz > sc->reply_sz) { in mpi3mr_validate_fw_update()
2683 mpi3mr_dprint(sc, MPI3MR_ERROR, in mpi3mr_validate_fw_update()
2685 sc->reply_sz, sc->reply_sz); in mpi3mr_validate_fw_update()
2689 if (sc->num_io_throttle_group != sc->facts.max_io_throttle_group) { in mpi3mr_validate_fw_update()
2690 mpi3mr_dprint(sc, MPI3MR_ERROR, in mpi3mr_validate_fw_update()
2692 sc->num_io_throttle_group, in mpi3mr_validate_fw_update()
2693 sc->facts.max_io_throttle_group); in mpi3mr_validate_fw_update()
2697 if (sc->facts.max_op_reply_q < sc->num_queues) { in mpi3mr_validate_fw_update()
2698 mpi3mr_dprint(sc, MPI3MR_ERROR, in mpi3mr_validate_fw_update()
2700 sc->num_queues, in mpi3mr_validate_fw_update()
2701 sc->facts.max_op_reply_q); in mpi3mr_validate_fw_update()
2705 if (sc->facts.max_op_req_q < sc->num_queues) { in mpi3mr_validate_fw_update()
2706 mpi3mr_dprint(sc, MPI3MR_ERROR, in mpi3mr_validate_fw_update()
2708 sc->num_queues, sc->facts.max_op_req_q); in mpi3mr_validate_fw_update()
2712 dev_handle_bitmap_sz = MPI3MR_DIV_ROUND_UP(sc->facts.max_devhandle, 8); in mpi3mr_validate_fw_update()
2714 if (dev_handle_bitmap_sz > sc->dev_handle_bitmap_sz) { in mpi3mr_validate_fw_update()
2715 removepend_bitmap = realloc(sc->removepend_bitmap, in mpi3mr_validate_fw_update()
2719 mpi3mr_dprint(sc, MPI3MR_ERROR, in mpi3mr_validate_fw_update()
2721 sc->dev_handle_bitmap_sz, dev_handle_bitmap_sz); in mpi3mr_validate_fw_update()
2725 memset(removepend_bitmap + sc->dev_handle_bitmap_sz, 0, in mpi3mr_validate_fw_update()
2726 dev_handle_bitmap_sz - sc->dev_handle_bitmap_sz); in mpi3mr_validate_fw_update()
2727 sc->removepend_bitmap = removepend_bitmap; in mpi3mr_validate_fw_update()
2728 mpi3mr_dprint(sc, MPI3MR_INFO, in mpi3mr_validate_fw_update()
2730 sc->dev_handle_bitmap_sz, dev_handle_bitmap_sz); in mpi3mr_validate_fw_update()
2731 sc->dev_handle_bitmap_sz = dev_handle_bitmap_sz; in mpi3mr_validate_fw_update()
2746 int mpi3mr_initialize_ioc(struct mpi3mr_softc *sc, U8 init_type) in mpi3mr_initialize_ioc() argument
2757 sc->cpu_count = mp_ncpus; in mpi3mr_initialize_ioc()
2760 ioc_status = mpi3mr_regread(sc, MPI3_SYSIF_IOC_STATUS_OFFSET); in mpi3mr_initialize_ioc()
2761 ioc_control = mpi3mr_regread(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET); in mpi3mr_initialize_ioc()
2762 ioc_info = mpi3mr_regread64(sc, MPI3_SYSIF_IOC_INFO_LOW_OFFSET); in mpi3mr_initialize_ioc()
2764 mpi3mr_dprint(sc, MPI3MR_INFO, "SOD ioc_status: 0x%x ioc_control: 0x%x " in mpi3mr_initialize_ioc()
2768 sc->ready_timeout = in mpi3mr_initialize_ioc()
2772 ioc_state = mpi3mr_get_iocstate(sc); in mpi3mr_initialize_ioc()
2773 mpi3mr_dprint(sc, MPI3MR_INFO, "IOC state: %s IOC ready timeout: %d\n", in mpi3mr_initialize_ioc()
2774 mpi3mr_iocstate_name(ioc_state), sc->ready_timeout); in mpi3mr_initialize_ioc()
2776 timeout = sc->ready_timeout * 10; in mpi3mr_initialize_ioc()
2778 ioc_state = mpi3mr_get_iocstate(sc); in mpi3mr_initialize_ioc()
2788 retval = mpi3mr_mur_ioc(sc, MPI3MR_RESET_FROM_BRINGUP); in mpi3mr_initialize_ioc()
2790 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to MU reset IOC, error 0x%x\n", in mpi3mr_initialize_ioc()
2793 ioc_state = mpi3mr_get_iocstate(sc); in mpi3mr_initialize_ioc()
2798 mpi3mr_print_fault_info(sc); in mpi3mr_initialize_ioc()
2800 U32 fault = mpi3mr_regread(sc, MPI3_SYSIF_FAULT_OFFSET) & in mpi3mr_initialize_ioc()
2803 mpi3mr_dprint(sc, MPI3MR_INFO, in mpi3mr_initialize_ioc()
2811 host_diagnostic = mpi3mr_regread(sc, MPI3_SYSIF_HOST_DIAG_OFFSET); in mpi3mr_initialize_ioc()
2817 mpi3mr_dprint(sc, MPI3MR_ERROR, "issuing soft reset to bring to reset state\n"); in mpi3mr_initialize_ioc()
2818 retval = mpi3mr_issue_reset(sc, in mpi3mr_initialize_ioc()
2822 mpi3mr_dprint(sc, MPI3MR_ERROR, in mpi3mr_initialize_ioc()
2829 ioc_state = mpi3mr_get_iocstate(sc); in mpi3mr_initialize_ioc()
2832 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot bring IOC to reset state\n"); in mpi3mr_initialize_ioc()
2836 retval = mpi3mr_setup_admin_qpair(sc); in mpi3mr_initialize_ioc()
2838 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to setup Admin queues, error 0x%x\n", in mpi3mr_initialize_ioc()
2845 retval = mpi3mr_bring_ioc_ready(sc, &start_ticks); in mpi3mr_initialize_ioc()
2847 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to bring IOC ready, error 0x%x\n", retval); in mpi3mr_initialize_ioc()
2855 retval = mpi3mr_alloc_interrupts(sc, 1); in mpi3mr_initialize_ioc()
2857 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to allocate interrupts, error 0x%x\n", in mpi3mr_initialize_ioc()
2862 retval = mpi3mr_setup_irqs(sc); in mpi3mr_initialize_ioc()
2864 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to setup ISR, error 0x%x\n", in mpi3mr_initialize_ioc()
2870 mpi3mr_enable_interrupts(sc); in mpi3mr_initialize_ioc()
2873 mtx_init(&sc->mpi3mr_mtx, "SIM lock", NULL, MTX_DEF); in mpi3mr_initialize_ioc()
2874 mtx_init(&sc->io_lock, "IO lock", NULL, MTX_DEF); in mpi3mr_initialize_ioc()
2875 mtx_init(&sc->admin_req_lock, "Admin Request Queue lock", NULL, MTX_SPIN); in mpi3mr_initialize_ioc()
2876 mtx_init(&sc->reply_free_q_lock, "Reply free Queue lock", NULL, MTX_SPIN); in mpi3mr_initialize_ioc()
2877 mtx_init(&sc->sense_buf_q_lock, "Sense buffer Queue lock", NULL, MTX_SPIN); in mpi3mr_initialize_ioc()
2878 mtx_init(&sc->chain_buf_lock, "Chain buffer lock", NULL, MTX_SPIN); in mpi3mr_initialize_ioc()
2879 mtx_init(&sc->cmd_pool_lock, "Command pool lock", NULL, MTX_DEF); in mpi3mr_initialize_ioc()
2880 mtx_init(&sc->fwevt_lock, "Firmware Event lock", NULL, MTX_DEF); in mpi3mr_initialize_ioc()
2881 mtx_init(&sc->target_lock, "Target lock", NULL, MTX_SPIN); in mpi3mr_initialize_ioc()
2882 mtx_init(&sc->reset_mutex, "Reset lock", NULL, MTX_DEF); in mpi3mr_initialize_ioc()
2884 mtx_init(&sc->init_cmds.completion.lock, "Init commands lock", NULL, MTX_DEF); in mpi3mr_initialize_ioc()
2885 sc->init_cmds.reply = NULL; in mpi3mr_initialize_ioc()
2886 sc->init_cmds.state = MPI3MR_CMD_NOTUSED; in mpi3mr_initialize_ioc()
2887 sc->init_cmds.dev_handle = MPI3MR_INVALID_DEV_HANDLE; in mpi3mr_initialize_ioc()
2888 sc->init_cmds.host_tag = MPI3MR_HOSTTAG_INITCMDS; in mpi3mr_initialize_ioc()
2890 mtx_init(&sc->cfg_cmds.completion.lock, "CFG commands lock", NULL, MTX_DEF); in mpi3mr_initialize_ioc()
2891 sc->cfg_cmds.reply = NULL; in mpi3mr_initialize_ioc()
2892 sc->cfg_cmds.state = MPI3MR_CMD_NOTUSED; in mpi3mr_initialize_ioc()
2893 sc->cfg_cmds.dev_handle = MPI3MR_INVALID_DEV_HANDLE; in mpi3mr_initialize_ioc()
2894 sc->cfg_cmds.host_tag = MPI3MR_HOSTTAG_CFGCMDS; in mpi3mr_initialize_ioc()
2896 mtx_init(&sc->ioctl_cmds.completion.lock, "IOCTL commands lock", NULL, MTX_DEF); in mpi3mr_initialize_ioc()
2897 sc->ioctl_cmds.reply = NULL; in mpi3mr_initialize_ioc()
2898 sc->ioctl_cmds.state = MPI3MR_CMD_NOTUSED; in mpi3mr_initialize_ioc()
2899 sc->ioctl_cmds.dev_handle = MPI3MR_INVALID_DEV_HANDLE; in mpi3mr_initialize_ioc()
2900 sc->ioctl_cmds.host_tag = MPI3MR_HOSTTAG_IOCTLCMDS; in mpi3mr_initialize_ioc()
2902 mtx_init(&sc->pel_abort_cmd.completion.lock, "PEL Abort command lock", NULL, MTX_DEF); in mpi3mr_initialize_ioc()
2903 sc->pel_abort_cmd.reply = NULL; in mpi3mr_initialize_ioc()
2904 sc->pel_abort_cmd.state = MPI3MR_CMD_NOTUSED; in mpi3mr_initialize_ioc()
2905 sc->pel_abort_cmd.dev_handle = MPI3MR_INVALID_DEV_HANDLE; in mpi3mr_initialize_ioc()
2906 sc->pel_abort_cmd.host_tag = MPI3MR_HOSTTAG_PELABORT; in mpi3mr_initialize_ioc()
2908 mtx_init(&sc->host_tm_cmds.completion.lock, "TM commands lock", NULL, MTX_DEF); in mpi3mr_initialize_ioc()
2909 sc->host_tm_cmds.reply = NULL; in mpi3mr_initialize_ioc()
2910 sc->host_tm_cmds.state = MPI3MR_CMD_NOTUSED; in mpi3mr_initialize_ioc()
2911 sc->host_tm_cmds.dev_handle = MPI3MR_INVALID_DEV_HANDLE; in mpi3mr_initialize_ioc()
2912 sc->host_tm_cmds.host_tag = MPI3MR_HOSTTAG_TMS; in mpi3mr_initialize_ioc()
2914 TAILQ_INIT(&sc->cmd_list_head); in mpi3mr_initialize_ioc()
2915 TAILQ_INIT(&sc->event_list); in mpi3mr_initialize_ioc()
2916 TAILQ_INIT(&sc->delayed_rmhs_list); in mpi3mr_initialize_ioc()
2917 TAILQ_INIT(&sc->delayed_evtack_cmds_list); in mpi3mr_initialize_ioc()
2921 mtx_init(&sc->dev_rmhs_cmds[i].completion.lock, str, NULL, MTX_DEF); in mpi3mr_initialize_ioc()
2922 sc->dev_rmhs_cmds[i].reply = NULL; in mpi3mr_initialize_ioc()
2923 sc->dev_rmhs_cmds[i].state = MPI3MR_CMD_NOTUSED; in mpi3mr_initialize_ioc()
2924 sc->dev_rmhs_cmds[i].dev_handle = MPI3MR_INVALID_DEV_HANDLE; in mpi3mr_initialize_ioc()
2925 sc->dev_rmhs_cmds[i].host_tag = MPI3MR_HOSTTAG_DEVRMCMD_MIN in mpi3mr_initialize_ioc()
2930 retval = mpi3mr_issue_iocfacts(sc, &facts_data); in mpi3mr_initialize_ioc()
2932 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to Issue IOC Facts, error: 0x%x\n", in mpi3mr_initialize_ioc()
2939 retval = mpi3mr_process_factsdata(sc, &facts_data); in mpi3mr_initialize_ioc()
2941 mpi3mr_dprint(sc, MPI3MR_ERROR, "IOC Facts data processing failed, error: 0x%x\n", in mpi3mr_initialize_ioc()
2946 sc->num_io_throttle_group = sc->facts.max_io_throttle_group; in mpi3mr_initialize_ioc()
2947 mpi3mr_atomic_set(&sc->pend_large_data_sz, 0); in mpi3mr_initialize_ioc()
2950 retval = mpi3mr_validate_fw_update(sc); in mpi3mr_initialize_ioc()
2957 sc->reply_sz = sc->facts.reply_sz; in mpi3mr_initialize_ioc()
2960 mpi3mr_display_ioc_info(sc); in mpi3mr_initialize_ioc()
2962 retval = mpi3mr_reply_alloc(sc); in mpi3mr_initialize_ioc()
2964 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to allocated reply and sense buffers, error: 0x%x\n", in mpi3mr_initialize_ioc()
2970 retval = mpi3mr_alloc_chain_bufs(sc); in mpi3mr_initialize_ioc()
2972 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to allocated chain buffers, error: 0x%x\n", in mpi3mr_initialize_ioc()
2978 retval = mpi3mr_issue_iocinit(sc); in mpi3mr_initialize_ioc()
2980 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to Issue IOC Init, error: 0x%x\n", in mpi3mr_initialize_ioc()
2987 mpi3mr_print_fw_pkg_ver(sc); in mpi3mr_initialize_ioc()
2989 sc->reply_free_q_host_index = sc->num_reply_bufs; in mpi3mr_initialize_ioc()
2990 mpi3mr_regwrite(sc, MPI3_SYSIF_REPLY_FREE_HOST_INDEX_OFFSET, in mpi3mr_initialize_ioc()
2991 sc->reply_free_q_host_index); in mpi3mr_initialize_ioc()
2993 sc->sense_buf_q_host_index = sc->num_sense_bufs; in mpi3mr_initialize_ioc()
2995 mpi3mr_regwrite(sc, MPI3_SYSIF_SENSE_BUF_FREE_HOST_INDEX_OFFSET, in mpi3mr_initialize_ioc()
2996 sc->sense_buf_q_host_index); in mpi3mr_initialize_ioc()
2999 retval = mpi3mr_alloc_interrupts(sc, 0); in mpi3mr_initialize_ioc()
3001 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to allocate interrupts, error: 0x%x\n", in mpi3mr_initialize_ioc()
3006 retval = mpi3mr_setup_irqs(sc); in mpi3mr_initialize_ioc()
3008 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to setup ISR, error: 0x%x\n", retval); in mpi3mr_initialize_ioc()
3012 mpi3mr_enable_interrupts(sc); in mpi3mr_initialize_ioc()
3015 mpi3mr_enable_interrupts(sc); in mpi3mr_initialize_ioc()
3017 retval = mpi3mr_create_op_queues(sc); in mpi3mr_initialize_ioc()
3019 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to create operational queues, error: %d\n", in mpi3mr_initialize_ioc()
3026 if (!sc->throttle_groups && sc->num_io_throttle_group) { in mpi3mr_initialize_ioc()
3028 sc->throttle_groups = (struct mpi3mr_throttle_group_info *) in mpi3mr_initialize_ioc()
3029 malloc(sc->num_io_throttle_group * in mpi3mr_initialize_ioc()
3031 if (!sc->throttle_groups) { in mpi3mr_initialize_ioc()
3032 mpi3mr_dprint(sc, MPI3MR_ERROR, "throttle groups memory allocation failed\n"); in mpi3mr_initialize_ioc()
3038 mpi3mr_dprint(sc, MPI3MR_XINFO, "Re-register events\n"); in mpi3mr_initialize_ioc()
3039 retval = mpi3mr_register_events(sc); in mpi3mr_initialize_ioc()
3041 mpi3mr_dprint(sc, MPI3MR_INFO, "Failed to re-register events, error: 0x%x\n", in mpi3mr_initialize_ioc()
3046 mpi3mr_dprint(sc, MPI3MR_INFO, "Issuing Port Enable\n"); in mpi3mr_initialize_ioc()
3047 retval = mpi3mr_issue_port_enable(sc, 0); in mpi3mr_initialize_ioc()
3049 mpi3mr_dprint(sc, MPI3MR_INFO, "Failed to issue port enable, error: 0x%x\n", in mpi3mr_initialize_ioc()
3054 retval = mpi3mr_pel_alloc(sc); in mpi3mr_initialize_ioc()
3056 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to allocate memory for PEL, error: 0x%x\n", in mpi3mr_initialize_ioc()
3061 if (mpi3mr_cfg_get_driver_pg1(sc) != 0) in mpi3mr_initialize_ioc()
3062 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to get the cfg driver page1\n"); in mpi3mr_initialize_ioc()
3067 if ((retry++ < 2) && (((ticks - start_ticks) / hz) < (sc->ready_timeout - 60))) { in mpi3mr_initialize_ioc()
3068 mpi3mr_dprint(sc, MPI3MR_ERROR, "Retrying controller initialization," in mpi3mr_initialize_ioc()
3077 static void mpi3mr_port_enable_complete(struct mpi3mr_softc *sc, in mpi3mr_port_enable_complete() argument
3082 printf(IOCNAME "Completing Port Enable Request\n", sc->name); in mpi3mr_port_enable_complete()
3083 sc->mpi3mr_flags |= MPI3MR_FLAGS_PORT_ENABLE_DONE; in mpi3mr_port_enable_complete()
3084 mpi3mr_startup_decrement(sc->cam_sc); in mpi3mr_port_enable_complete()
3087 int mpi3mr_issue_port_enable(struct mpi3mr_softc *sc, U8 async) in mpi3mr_issue_port_enable() argument
3093 mtx_lock(&sc->init_cmds.completion.lock); in mpi3mr_issue_port_enable()
3094 if (sc->init_cmds.state & MPI3MR_CMD_PENDING) { in mpi3mr_issue_port_enable()
3096 printf(IOCNAME "Issue PortEnable: Init command is in use\n", sc->name); in mpi3mr_issue_port_enable()
3097 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_issue_port_enable()
3101 sc->init_cmds.state = MPI3MR_CMD_PENDING; in mpi3mr_issue_port_enable()
3104 sc->init_cmds.is_waiting = 0; in mpi3mr_issue_port_enable()
3105 sc->init_cmds.callback = mpi3mr_port_enable_complete; in mpi3mr_issue_port_enable()
3107 sc->init_cmds.is_waiting = 1; in mpi3mr_issue_port_enable()
3108 sc->init_cmds.callback = NULL; in mpi3mr_issue_port_enable()
3109 init_completion(&sc->init_cmds.completion); in mpi3mr_issue_port_enable()
3114 printf(IOCNAME "Sending Port Enable Request\n", sc->name); in mpi3mr_issue_port_enable()
3115 retval = mpi3mr_submit_admin_cmd(sc, &pe_req, sizeof(pe_req)); in mpi3mr_issue_port_enable()
3118 sc->name); in mpi3mr_issue_port_enable()
3123 wait_for_completion_timeout(&sc->init_cmds.completion, in mpi3mr_issue_port_enable()
3125 if (!(sc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { in mpi3mr_issue_port_enable()
3127 sc->name); in mpi3mr_issue_port_enable()
3129 mpi3mr_check_rh_fault_ioc(sc, MPI3MR_RESET_FROM_PE_TIMEOUT); in mpi3mr_issue_port_enable()
3132 mpi3mr_port_enable_complete(sc, &sc->init_cmds); in mpi3mr_issue_port_enable()
3135 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_issue_port_enable()
3141 static int mpi3mr_timestamp_sync(struct mpi3mr_softc *sc) in mpi3mr_timestamp_sync() argument
3148 mtx_lock(&sc->init_cmds.completion.lock); in mpi3mr_timestamp_sync()
3149 if (sc->init_cmds.state & MPI3MR_CMD_PENDING) { in mpi3mr_timestamp_sync()
3150 mpi3mr_dprint(sc, MPI3MR_ERROR, "Issue timestamp sync: command is in use\n"); in mpi3mr_timestamp_sync()
3151 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_timestamp_sync()
3155 sc->init_cmds.state = MPI3MR_CMD_PENDING; in mpi3mr_timestamp_sync()
3156 sc->init_cmds.is_waiting = 1; in mpi3mr_timestamp_sync()
3157 sc->init_cmds.callback = NULL; in mpi3mr_timestamp_sync()
3165 init_completion(&sc->init_cmds.completion); in mpi3mr_timestamp_sync()
3167 retval = mpi3mr_submit_admin_cmd(sc, &iou_ctrl, sizeof(iou_ctrl)); in mpi3mr_timestamp_sync()
3169 mpi3mr_dprint(sc, MPI3MR_ERROR, "timestamp sync: Admin Post failed\n"); in mpi3mr_timestamp_sync()
3173 wait_for_completion_timeout(&sc->init_cmds.completion, in mpi3mr_timestamp_sync()
3176 if (!(sc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { in mpi3mr_timestamp_sync()
3177 mpi3mr_dprint(sc, MPI3MR_ERROR, "Issue timestamp sync: command timed out\n"); in mpi3mr_timestamp_sync()
3178 sc->init_cmds.is_waiting = 0; in mpi3mr_timestamp_sync()
3180 if (!(sc->init_cmds.state & MPI3MR_CMD_RESET)) in mpi3mr_timestamp_sync()
3181 mpi3mr_check_rh_fault_ioc(sc, MPI3MR_RESET_FROM_TSU_TIMEOUT); in mpi3mr_timestamp_sync()
3187 if (((sc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) != MPI3_IOCSTATUS_SUCCESS) && in mpi3mr_timestamp_sync()
3188 (sc->init_cmds.ioc_status != MPI3_IOCSTATUS_SUPERVISOR_ONLY)) { in mpi3mr_timestamp_sync()
3189 …mpi3mr_dprint(sc, MPI3MR_ERROR, "Issue timestamp sync: Failed IOCStatus(0x%04x) Loginfo(0x%08x)\n", in mpi3mr_timestamp_sync()
3190 (sc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), sc->init_cmds.ioc_loginfo); in mpi3mr_timestamp_sync()
3195 sc->init_cmds.state = MPI3MR_CMD_NOTUSED; in mpi3mr_timestamp_sync()
3196 mtx_unlock(&sc->init_cmds.completion.lock); in mpi3mr_timestamp_sync()
3204 struct mpi3mr_softc *sc = (struct mpi3mr_softc *)arg; in mpi3mr_timestamp_thread() local
3207 sc->timestamp_thread_active = 1; in mpi3mr_timestamp_thread()
3208 mtx_lock(&sc->reset_mutex); in mpi3mr_timestamp_thread()
3211 if (sc->mpi3mr_flags & MPI3MR_FLAGS_SHUTDOWN || in mpi3mr_timestamp_thread()
3212 (sc->unrecoverable == 1)) { in mpi3mr_timestamp_thread()
3213 mpi3mr_dprint(sc, MPI3MR_INFO, in mpi3mr_timestamp_thread()
3215 sc->mpi3mr_flags & MPI3MR_FLAGS_SHUTDOWN ? "Shutdown" : in mpi3mr_timestamp_thread()
3219 mtx_unlock(&sc->reset_mutex); in mpi3mr_timestamp_thread()
3221 while (sc->reset_in_progress) { in mpi3mr_timestamp_thread()
3224 if (sc->unrecoverable) in mpi3mr_timestamp_thread()
3229 if (elapsed_time++ >= sc->ts_update_interval * 60) { in mpi3mr_timestamp_thread()
3230 mpi3mr_timestamp_sync(sc); in mpi3mr_timestamp_thread()
3238 mtx_lock(&sc->reset_mutex); in mpi3mr_timestamp_thread()
3239 if (((sc->mpi3mr_flags & MPI3MR_FLAGS_SHUTDOWN) == 0) && in mpi3mr_timestamp_thread()
3240 (!sc->unrecoverable) && (!sc->reset_in_progress)) { in mpi3mr_timestamp_thread()
3241 msleep(&sc->timestamp_chan, &sc->reset_mutex, PRIBIO, in mpi3mr_timestamp_thread()
3245 mtx_unlock(&sc->reset_mutex); in mpi3mr_timestamp_thread()
3246 sc->timestamp_thread_active = 0; in mpi3mr_timestamp_thread()
3253 struct mpi3mr_softc *sc; in mpi3mr_watchdog_thread() local
3257 sc = (struct mpi3mr_softc *)arg; in mpi3mr_watchdog_thread()
3259 mpi3mr_dprint(sc, MPI3MR_XINFO, "%s\n", __func__); in mpi3mr_watchdog_thread()
3261 sc->watchdog_thread_active = 1; in mpi3mr_watchdog_thread()
3262 mtx_lock(&sc->reset_mutex); in mpi3mr_watchdog_thread()
3264 if (sc->mpi3mr_flags & MPI3MR_FLAGS_SHUTDOWN || in mpi3mr_watchdog_thread()
3265 (sc->unrecoverable == 1)) { in mpi3mr_watchdog_thread()
3266 mpi3mr_dprint(sc, MPI3MR_INFO, in mpi3mr_watchdog_thread()
3268 sc->mpi3mr_flags & MPI3MR_FLAGS_SHUTDOWN ? "Shutdown" : in mpi3mr_watchdog_thread()
3272 mtx_unlock(&sc->reset_mutex); in mpi3mr_watchdog_thread()
3274 if ((sc->prepare_for_reset) && in mpi3mr_watchdog_thread()
3275 ((sc->prepare_for_reset_timeout_counter++) >= in mpi3mr_watchdog_thread()
3277 mpi3mr_soft_reset_handler(sc, in mpi3mr_watchdog_thread()
3282 ioc_status = mpi3mr_regread(sc, MPI3_SYSIF_IOC_STATUS_OFFSET); in mpi3mr_watchdog_thread()
3285 mpi3mr_soft_reset_handler(sc, MPI3MR_RESET_FROM_FIRMWARE, 0); in mpi3mr_watchdog_thread()
3289 ioc_state = mpi3mr_get_iocstate(sc); in mpi3mr_watchdog_thread()
3291 fault = mpi3mr_regread(sc, MPI3_SYSIF_FAULT_OFFSET) & in mpi3mr_watchdog_thread()
3294 host_diagnostic = mpi3mr_regread(sc, MPI3_SYSIF_HOST_DIAG_OFFSET); in mpi3mr_watchdog_thread()
3296 if (!sc->diagsave_timeout) { in mpi3mr_watchdog_thread()
3297 mpi3mr_print_fault_info(sc); in mpi3mr_watchdog_thread()
3298 mpi3mr_dprint(sc, MPI3MR_INFO, in mpi3mr_watchdog_thread()
3301 if ((sc->diagsave_timeout++) <= MPI3_SYSIF_DIAG_SAVE_TIMEOUT) in mpi3mr_watchdog_thread()
3304 mpi3mr_print_fault_info(sc); in mpi3mr_watchdog_thread()
3305 sc->diagsave_timeout = 0; in mpi3mr_watchdog_thread()
3309 mpi3mr_dprint(sc, MPI3MR_INFO, in mpi3mr_watchdog_thread()
3312 sc->unrecoverable = 1; in mpi3mr_watchdog_thread()
3317 mpi3mr_dprint(sc, MPI3MR_INFO, in mpi3mr_watchdog_thread()
3319 sc->unrecoverable = 1; in mpi3mr_watchdog_thread()
3325 || (sc->reset_in_progress)) in mpi3mr_watchdog_thread()
3328 mpi3mr_soft_reset_handler(sc, in mpi3mr_watchdog_thread()
3331 mpi3mr_soft_reset_handler(sc, in mpi3mr_watchdog_thread()
3336 if (sc->reset.type == MPI3MR_TRIGGER_SOFT_RESET) { in mpi3mr_watchdog_thread()
3337 mpi3mr_print_fault_info(sc); in mpi3mr_watchdog_thread()
3338 mpi3mr_soft_reset_handler(sc, sc->reset.reason, 1); in mpi3mr_watchdog_thread()
3341 mtx_lock(&sc->reset_mutex); in mpi3mr_watchdog_thread()
3346 if ((sc->mpi3mr_flags & MPI3MR_FLAGS_SHUTDOWN) == 0 && in mpi3mr_watchdog_thread()
3347 !sc->unrecoverable) { in mpi3mr_watchdog_thread()
3348 msleep(&sc->watchdog_chan, &sc->reset_mutex, PRIBIO, in mpi3mr_watchdog_thread()
3352 mtx_unlock(&sc->reset_mutex); in mpi3mr_watchdog_thread()
3353 sc->watchdog_thread_active = 0; in mpi3mr_watchdog_thread()
3357 static void mpi3mr_display_event_data(struct mpi3mr_softc *sc, in mpi3mr_display_event_data() argument
3385 mpi3mr_dprint(sc, MPI3MR_EVENT, "Device Added: Dev=0x%04x Form=0x%x Perst id: 0x%x\n", in mpi3mr_display_event_data()
3393 mpi3mr_dprint(sc, MPI3MR_EVENT, "Device Info Changed: Dev=0x%04x Form=0x%x\n", in mpi3mr_display_event_data()
3401 mpi3mr_dprint(sc, MPI3MR_EVENT, "Device Status Change: Dev=0x%04x RC=0x%x\n", in mpi3mr_display_event_data()
3409 mpi3mr_dprint(sc, MPI3MR_EVENT, "SAS Discovery: (%s)", in mpi3mr_display_event_data()
3413 (sc->mpi3mr_debug & MPI3MR_EVENT)) { in mpi3mr_display_event_data()
3419 if (sc->mpi3mr_debug & MPI3MR_EVENT) in mpi3mr_display_event_data()
3457 mpi3mr_dprint(sc, MPI3MR_EVENT, "PCIE Enumeration: (%s)", in mpi3mr_display_event_data()
3462 mpi3mr_dprint(sc, MPI3MR_EVENT, "enumeration_status(0x%08x)", in mpi3mr_display_event_data()
3464 if (sc->mpi3mr_debug & MPI3MR_EVENT) in mpi3mr_display_event_data()
3476 mpi3mr_dprint(sc, MPI3MR_EVENT, "%s\n", desc); in mpi3mr_display_event_data()
3485 mtx_lock_spin(&cam_sc->sc->target_lock); in mpi3mr_find_target_by_per_id()
3491 mtx_unlock_spin(&cam_sc->sc->target_lock); in mpi3mr_find_target_by_per_id()
3501 mtx_lock_spin(&cam_sc->sc->target_lock); in mpi3mr_find_target_by_dev_handle()
3507 mtx_unlock_spin(&cam_sc->sc->target_lock); in mpi3mr_find_target_by_dev_handle()
3511 void mpi3mr_update_device(struct mpi3mr_softc *sc, in mpi3mr_update_device() argument
3618 if (vdinf->IOThrottleGroup < sc->num_io_throttle_group) { in mpi3mr_update_device()
3619 tg = sc->throttle_groups + vdinf->IOThrottleGroup; in mpi3mr_update_device()
3639 int mpi3mr_create_device(struct mpi3mr_softc *sc, in mpi3mr_create_device() argument
3648 mtx_lock_spin(&sc->target_lock); in mpi3mr_create_device()
3649 TAILQ_FOREACH(target, &sc->cam_sc->tgt_list, tgt_next) { in mpi3mr_create_device()
3655 mtx_unlock_spin(&sc->target_lock); in mpi3mr_create_device()
3658 mpi3mr_update_device(sc, target, dev_pg0, true); in mpi3mr_create_device()
3669 mpi3mr_update_device(sc, target, dev_pg0, true); in mpi3mr_create_device()
3670 mtx_lock_spin(&sc->target_lock); in mpi3mr_create_device()
3671 TAILQ_INSERT_TAIL(&sc->cam_sc->tgt_list, target, tgt_next); in mpi3mr_create_device()
3673 mtx_unlock_spin(&sc->target_lock); in mpi3mr_create_device()
3681 * @sc: Adapter instance reference
3690 static void mpi3mr_dev_rmhs_complete_iou(struct mpi3mr_softc *sc, in mpi3mr_dev_rmhs_complete_iou() argument
3697 mpi3mr_dprint(sc, MPI3MR_EVENT, in mpi3mr_dev_rmhs_complete_iou()
3704 mpi3mr_dprint(sc, MPI3MR_EVENT, in mpi3mr_dev_rmhs_complete_iou()
3708 mpi3mr_dev_rmhs_send_tm(sc, drv_cmd->dev_handle, in mpi3mr_dev_rmhs_complete_iou()
3712 mpi3mr_dprint(sc, MPI3MR_ERROR, in mpi3mr_dev_rmhs_complete_iou()
3716 mtx_lock_spin(&sc->target_lock); in mpi3mr_dev_rmhs_complete_iou()
3717 TAILQ_FOREACH(tgtdev, &sc->cam_sc->tgt_list, tgt_next) { in mpi3mr_dev_rmhs_complete_iou()
3721 mtx_unlock_spin(&sc->target_lock); in mpi3mr_dev_rmhs_complete_iou()
3723 mpi3mr_dprint(sc, MPI3MR_INFO, in mpi3mr_dev_rmhs_complete_iou()
3726 mpi3mr_clear_bit(drv_cmd->dev_handle, sc->removepend_bitmap); in mpi3mr_dev_rmhs_complete_iou()
3729 if (!TAILQ_EMPTY(&sc->delayed_rmhs_list)) { in mpi3mr_dev_rmhs_complete_iou()
3730 delayed_dev_rmhs = TAILQ_FIRST(&sc->delayed_rmhs_list); in mpi3mr_dev_rmhs_complete_iou()
3734 mpi3mr_dprint(sc, MPI3MR_EVENT, in mpi3mr_dev_rmhs_complete_iou()
3737 mpi3mr_dev_rmhs_send_tm(sc, drv_cmd->dev_handle, drv_cmd, in mpi3mr_dev_rmhs_complete_iou()
3739 TAILQ_REMOVE(&sc->delayed_rmhs_list, delayed_dev_rmhs, list); in mpi3mr_dev_rmhs_complete_iou()
3747 mpi3mr_clear_bit(cmd_idx, sc->devrem_bitmap); in mpi3mr_dev_rmhs_complete_iou()
3752 * @sc: Adapter instance reference
3761 static void mpi3mr_dev_rmhs_complete_tm(struct mpi3mr_softc *sc, in mpi3mr_dev_rmhs_complete_tm() argument
3775 sc->name, drv_cmd->dev_handle, drv_cmd->ioc_status, in mpi3mr_dev_rmhs_complete_tm()
3780 sc->name, drv_cmd->dev_handle, cmd_idx); in mpi3mr_dev_rmhs_complete_tm()
3792 retval = mpi3mr_submit_admin_cmd(sc, &iou_ctrl, sizeof(iou_ctrl)); in mpi3mr_dev_rmhs_complete_tm()
3795 sc->name); in mpi3mr_dev_rmhs_complete_tm()
3805 mpi3mr_clear_bit(cmd_idx, sc->devrem_bitmap); in mpi3mr_dev_rmhs_complete_tm()
3810 * @sc: Adapter instance reference
3821 static void mpi3mr_dev_rmhs_send_tm(struct mpi3mr_softc *sc, U16 handle, in mpi3mr_dev_rmhs_send_tm() argument
3834 cmd_idx = mpi3mr_find_first_zero_bit(sc->devrem_bitmap, in mpi3mr_dev_rmhs_send_tm()
3837 if (!mpi3mr_test_and_set_bit(cmd_idx, sc->devrem_bitmap)) in mpi3mr_dev_rmhs_send_tm()
3851 TAILQ_INSERT_TAIL(&(sc->delayed_rmhs_list), delayed_dev_rmhs, list); in mpi3mr_dev_rmhs_send_tm()
3852 mpi3mr_dprint(sc, MPI3MR_EVENT, "%s :DevRmHs: tr:handle(0x%04x) is postponed\n", in mpi3mr_dev_rmhs_send_tm()
3858 drv_cmd = &sc->dev_rmhs_cmds[cmd_idx]; in mpi3mr_dev_rmhs_send_tm()
3862 mpi3mr_dprint(sc, MPI3MR_EVENT, in mpi3mr_dev_rmhs_send_tm()
3868 mpi3mr_dprint(sc, MPI3MR_EVENT, "%s :Issue TM: Command is in use\n", __func__); in mpi3mr_dev_rmhs_send_tm()
3882 mpi3mr_set_bit(handle, sc->removepend_bitmap); in mpi3mr_dev_rmhs_send_tm()
3883 retval = mpi3mr_submit_admin_cmd(sc, &tm_req, sizeof(tm_req)); in mpi3mr_dev_rmhs_send_tm()
3885 mpi3mr_dprint(sc, MPI3MR_ERROR, "%s :Issue DevRmHsTM: Admin Post failed\n", in mpi3mr_dev_rmhs_send_tm()
3896 mpi3mr_clear_bit(cmd_idx, sc->devrem_bitmap); in mpi3mr_dev_rmhs_send_tm()
3901 * @sc: Adapter instance reference
3910 static void mpi3mr_complete_evt_ack(struct mpi3mr_softc *sc, in mpi3mr_complete_evt_ack() argument
3917 mpi3mr_dprint(sc, MPI3MR_EVENT, in mpi3mr_complete_evt_ack()
3923 if (!TAILQ_EMPTY(&sc->delayed_evtack_cmds_list)) { in mpi3mr_complete_evt_ack()
3924 delayed_evtack = TAILQ_FIRST(&sc->delayed_evtack_cmds_list); in mpi3mr_complete_evt_ack()
3925 mpi3mr_dprint(sc, MPI3MR_EVENT, in mpi3mr_complete_evt_ack()
3928 mpi3mr_send_evt_ack(sc, delayed_evtack->event, drv_cmd, in mpi3mr_complete_evt_ack()
3930 TAILQ_REMOVE(&sc->delayed_evtack_cmds_list, delayed_evtack, list); in mpi3mr_complete_evt_ack()
3936 mpi3mr_clear_bit(cmd_idx, sc->evtack_cmds_bitmap); in mpi3mr_complete_evt_ack()
3941 * @sc: Adapter instance reference
3953 static void mpi3mr_send_evt_ack(struct mpi3mr_softc *sc, U8 event, in mpi3mr_send_evt_ack() argument
3966 cmd_idx = mpi3mr_find_first_zero_bit(sc->evtack_cmds_bitmap, in mpi3mr_send_evt_ack()
3970 sc->evtack_cmds_bitmap)) in mpi3mr_send_evt_ack()
3983 TAILQ_INSERT_TAIL(&(sc->delayed_evtack_cmds_list), delayed_evtack, list); in mpi3mr_send_evt_ack()
3984 mpi3mr_dprint(sc, MPI3MR_EVENT, "%s : Event ack for event:%d is postponed\n", in mpi3mr_send_evt_ack()
3988 drv_cmd = &sc->evtack_cmds[cmd_idx]; in mpi3mr_send_evt_ack()
3995 mpi3mr_dprint(sc, MPI3MR_EVENT, "%s: Command is in use\n", __func__); in mpi3mr_send_evt_ack()
4005 retval = mpi3mr_submit_admin_cmd(sc, &evtack_req, in mpi3mr_send_evt_ack()
4009 mpi3mr_dprint(sc, MPI3MR_ERROR, "%s: Admin Post failed\n", __func__); in mpi3mr_send_evt_ack()
4017 mpi3mr_clear_bit(cmd_idx, sc->evtack_cmds_bitmap); in mpi3mr_send_evt_ack()
4022 * @sc: Adapter instance reference
4032 static void mpi3mr_pcietopochg_evt_th(struct mpi3mr_softc *sc, in mpi3mr_pcietopochg_evt_th() argument
4047 tgtdev = mpi3mr_find_target_by_dev_handle(sc->cam_sc, handle); in mpi3mr_pcietopochg_evt_th()
4055 mpi3mr_dev_rmhs_send_tm(sc, handle, NULL, in mpi3mr_pcietopochg_evt_th()
4081 * @sc: Adapter instance reference
4091 static void mpi3mr_sastopochg_evt_th(struct mpi3mr_softc *sc, in mpi3mr_sastopochg_evt_th() argument
4107 tgtdev = mpi3mr_find_target_by_dev_handle(sc->cam_sc, handle); in mpi3mr_sastopochg_evt_th()
4115 mpi3mr_dev_rmhs_send_tm(sc, handle, NULL, in mpi3mr_sastopochg_evt_th()
4140 * @sc: Adapter instance reference
4150 static void mpi3mr_devstatuschg_evt_th(struct mpi3mr_softc *sc, in mpi3mr_devstatuschg_evt_th() argument
4185 tgtdev = mpi3mr_find_target_by_dev_handle(sc->cam_sc, dev_handle); in mpi3mr_devstatuschg_evt_th()
4188 mpi3mr_dprint(sc, MPI3MR_ERROR, "%s :target with dev_handle:0x%x not found\n", in mpi3mr_devstatuschg_evt_th()
4213 mpi3mr_dev_rmhs_send_tm(sc, dev_handle, NULL, in mpi3mr_devstatuschg_evt_th()
4217 mpi3mr_dev_rmhs_send_tm(sc, dev_handle, NULL, in mpi3mr_devstatuschg_evt_th()
4223 * @sc: Adapter instance reference
4230 static void mpi3mr_preparereset_evt_th(struct mpi3mr_softc *sc, in mpi3mr_preparereset_evt_th() argument
4237 mpi3mr_dprint(sc, MPI3MR_EVENT, "%s :Recieved PrepForReset Event with RC=START\n", in mpi3mr_preparereset_evt_th()
4239 if (sc->prepare_for_reset) in mpi3mr_preparereset_evt_th()
4241 sc->prepare_for_reset = 1; in mpi3mr_preparereset_evt_th()
4242 sc->prepare_for_reset_timeout_counter = 0; in mpi3mr_preparereset_evt_th()
4244 mpi3mr_dprint(sc, MPI3MR_EVENT, "%s :Recieved PrepForReset Event with RC=ABORT\n", in mpi3mr_preparereset_evt_th()
4246 sc->prepare_for_reset = 0; in mpi3mr_preparereset_evt_th()
4247 sc->prepare_for_reset_timeout_counter = 0; in mpi3mr_preparereset_evt_th()
4251 mpi3mr_send_evt_ack(sc, event_reply->Event, NULL, in mpi3mr_preparereset_evt_th()
4257 * @sc: Adapter instance reference
4264 static void mpi3mr_energypackchg_evt_th(struct mpi3mr_softc *sc, in mpi3mr_energypackchg_evt_th() argument
4272 mpi3mr_dprint(sc, MPI3MR_ERROR, in mpi3mr_energypackchg_evt_th()
4278 mpi3mr_dprint(sc, MPI3MR_EVENT, in mpi3mr_energypackchg_evt_th()
4280 __func__, sc->facts.shutdown_timeout, shutdown_timeout); in mpi3mr_energypackchg_evt_th()
4281 sc->facts.shutdown_timeout = shutdown_timeout; in mpi3mr_energypackchg_evt_th()
4286 * @sc: Adapter instance reference
4293 static void mpi3mr_cablemgmt_evt_th(struct mpi3mr_softc *sc, in mpi3mr_cablemgmt_evt_th() argument
4302 mpi3mr_dprint(sc, MPI3MR_INFO, "An active cable with ReceptacleID %d cannot be powered.\n" in mpi3mr_cablemgmt_evt_th()
4311 mpi3mr_dprint(sc, MPI3MR_INFO, "A cable with ReceptacleID %d is not running at optimal speed\n", in mpi3mr_cablemgmt_evt_th()
4322 * @sc: Adapter instance reference
4329 static void mpi3mr_process_events(struct mpi3mr_softc *sc, in mpi3mr_process_events() argument
4337 if (sc->mpi3mr_flags & MPI3MR_FLAGS_SHUTDOWN) in mpi3mr_process_events()
4351 if (mpi3mr_create_device(sc, dev_pg0)) in mpi3mr_process_events()
4352 mpi3mr_dprint(sc, MPI3MR_ERROR, in mpi3mr_process_events()
4363 mpi3mr_devstatuschg_evt_th(sc, event_reply); in mpi3mr_process_events()
4369 mpi3mr_sastopochg_evt_th(sc, event_reply); in mpi3mr_process_events()
4375 mpi3mr_pcietopochg_evt_th(sc, event_reply); in mpi3mr_process_events()
4380 mpi3mr_preparereset_evt_th(sc, event_reply); in mpi3mr_process_events()
4391 mpi3mr_app_save_logdata(sc, (char*)event_reply->EventData, in mpi3mr_process_events()
4397 mpi3mr_energypackchg_evt_th(sc, event_reply); in mpi3mr_process_events()
4402 mpi3mr_cablemgmt_evt_th(sc, event_reply); in mpi3mr_process_events()
4413 mpi3mr_dprint(sc, MPI3MR_INFO, "%s :Event 0x%02x is not handled by driver\n", in mpi3mr_process_events()
4441 sc->track_mapping_events) in mpi3mr_process_events()
4442 sc->pending_map_events++; in mpi3mr_process_events()
4449 !(sc->mpi3mr_flags & MPI3MR_FLAGS_PORT_ENABLE_DONE)) in mpi3mr_process_events()
4450 mpi3mr_startup_increment(sc->cam_sc); in mpi3mr_process_events()
4457 mtx_lock(&sc->fwevt_lock); in mpi3mr_process_events()
4458 TAILQ_INSERT_TAIL(&sc->cam_sc->ev_queue, fw_event, ev_link); in mpi3mr_process_events()
4459 taskqueue_enqueue(sc->cam_sc->ev_tq, &sc->cam_sc->ev_task); in mpi3mr_process_events()
4460 mtx_unlock(&sc->fwevt_lock); in mpi3mr_process_events()
4467 static void mpi3mr_handle_events(struct mpi3mr_softc *sc, uintptr_t data, in mpi3mr_handle_events() argument
4473 sc->change_count = event_reply->IOCChangeCount; in mpi3mr_handle_events()
4474 mpi3mr_display_event_data(sc, event_reply); in mpi3mr_handle_events()
4476 mpi3mr_process_events(sc, data, event_reply); in mpi3mr_handle_events()
4479 static void mpi3mr_process_admin_reply_desc(struct mpi3mr_softc *sc, in mpi3mr_process_admin_reply_desc() argument
4508 def_reply = mpi3mr_get_reply_virt_addr(sc, *reply_dma); in mpi3mr_process_admin_reply_desc()
4518 sense_buf = mpi3mr_get_sensebuf_virt_addr(sc, in mpi3mr_process_admin_reply_desc()
4531 cmdptr = &sc->init_cmds; in mpi3mr_process_admin_reply_desc()
4534 cmdptr = &sc->cfg_cmds; in mpi3mr_process_admin_reply_desc()
4537 cmdptr = &sc->ioctl_cmds; in mpi3mr_process_admin_reply_desc()
4540 cmdptr = &sc->host_tm_cmds; in mpi3mr_process_admin_reply_desc()
4541 wakeup((void *)&sc->tm_chan); in mpi3mr_process_admin_reply_desc()
4544 cmdptr = &sc->pel_abort_cmd; in mpi3mr_process_admin_reply_desc()
4547 cmdptr = &sc->pel_cmds; in mpi3mr_process_admin_reply_desc()
4552 mpi3mr_handle_events(sc, *reply_dma ,def_reply); in mpi3mr_process_admin_reply_desc()
4560 cmdptr = &sc->dev_rmhs_cmds[idx]; in mpi3mr_process_admin_reply_desc()
4566 cmdptr = &sc->evtack_cmds[idx]; in mpi3mr_process_admin_reply_desc()
4578 sc->reply_sz); in mpi3mr_process_admin_reply_desc()
4589 cmdptr->callback(sc, cmdptr); in mpi3mr_process_admin_reply_desc()
4594 mpi3mr_repost_sense_buf(sc, in mpi3mr_process_admin_reply_desc()
4601 * @sc: Adapter's soft instance
4605 static int mpi3mr_complete_admin_cmd(struct mpi3mr_softc *sc) in mpi3mr_complete_admin_cmd() argument
4607 U32 exp_phase = sc->admin_reply_ephase; in mpi3mr_complete_admin_cmd()
4608 U32 adm_reply_ci = sc->admin_reply_ci; in mpi3mr_complete_admin_cmd()
4614 mtx_lock_spin(&sc->admin_reply_lock); in mpi3mr_complete_admin_cmd()
4615 if (sc->admin_in_use == false) { in mpi3mr_complete_admin_cmd()
4616 sc->admin_in_use = true; in mpi3mr_complete_admin_cmd()
4617 mtx_unlock_spin(&sc->admin_reply_lock); in mpi3mr_complete_admin_cmd()
4619 mtx_unlock_spin(&sc->admin_reply_lock); in mpi3mr_complete_admin_cmd()
4623 reply_desc = (Mpi3DefaultReplyDescriptor_t *)sc->admin_reply + in mpi3mr_complete_admin_cmd()
4628 mtx_lock_spin(&sc->admin_reply_lock); in mpi3mr_complete_admin_cmd()
4629 sc->admin_in_use = false; in mpi3mr_complete_admin_cmd()
4630 mtx_unlock_spin(&sc->admin_reply_lock); in mpi3mr_complete_admin_cmd()
4635 sc->admin_req_ci = reply_desc->RequestQueueCI; in mpi3mr_complete_admin_cmd()
4636 mpi3mr_process_admin_reply_desc(sc, reply_desc, &reply_dma); in mpi3mr_complete_admin_cmd()
4638 mpi3mr_repost_reply_buf(sc, reply_dma); in mpi3mr_complete_admin_cmd()
4640 if (++adm_reply_ci == sc->num_admin_replies) { in mpi3mr_complete_admin_cmd()
4645 (Mpi3DefaultReplyDescriptor_t *)sc->admin_reply + in mpi3mr_complete_admin_cmd()
4652 mpi3mr_regwrite(sc, MPI3_SYSIF_ADMIN_REPLY_Q_CI_OFFSET, adm_reply_ci); in mpi3mr_complete_admin_cmd()
4657 mpi3mr_regwrite(sc, MPI3_SYSIF_ADMIN_REPLY_Q_CI_OFFSET, adm_reply_ci); in mpi3mr_complete_admin_cmd()
4658 sc->admin_reply_ci = adm_reply_ci; in mpi3mr_complete_admin_cmd()
4659 sc->admin_reply_ephase = exp_phase; in mpi3mr_complete_admin_cmd()
4660 mtx_lock_spin(&sc->admin_reply_lock); in mpi3mr_complete_admin_cmd()
4661 sc->admin_in_use = false; in mpi3mr_complete_admin_cmd()
4662 mtx_unlock_spin(&sc->admin_reply_lock); in mpi3mr_complete_admin_cmd()
4667 mpi3mr_cmd_done(struct mpi3mr_softc *sc, struct mpi3mr_cmd *cmd) in mpi3mr_cmd_done() argument
4669 mpi3mr_unmap_request(sc, cmd); in mpi3mr_cmd_done()
4671 mtx_lock(&sc->mpi3mr_mtx); in mpi3mr_cmd_done()
4677 if (sc->unrecoverable) in mpi3mr_cmd_done()
4682 mtx_unlock(&sc->mpi3mr_mtx); in mpi3mr_cmd_done()
4686 void mpi3mr_process_op_reply_desc(struct mpi3mr_softc *sc, in mpi3mr_process_op_reply_desc() argument
4726 scsi_reply = mpi3mr_get_reply_virt_addr(sc, in mpi3mr_process_op_reply_desc()
4729 mpi3mr_dprint(sc, MPI3MR_ERROR, "scsi_reply is NULL, " in mpi3mr_process_op_reply_desc()
4743 sense_buf = mpi3mr_get_sensebuf_virt_addr(sc, in mpi3mr_process_op_reply_desc()
4749 mpi3mr_dprint(sc, MPI3MR_ERROR, "Ran out of sense buffers\n"); in mpi3mr_process_op_reply_desc()
4760 cm = sc->cmd_list[host_tag]; in mpi3mr_process_op_reply_desc()
4765 cam_sc = sc->cam_sc; in mpi3mr_process_op_reply_desc()
4773 if (sc->iot_enable) { in mpi3mr_process_op_reply_desc()
4782 if ((data_len_blks >= sc->io_throttle_data_length) && in mpi3mr_process_op_reply_desc()
4784 mpi3mr_atomic_sub(&sc->pend_large_data_sz, data_len_blks); in mpi3mr_process_op_reply_desc()
4786 &sc->pend_large_data_sz); in mpi3mr_process_op_reply_desc()
4792 mpi3mr_dprint(sc, MPI3MR_IOT, in mpi3mr_process_op_reply_desc()
4799 sc->io_throttle_low, in mpi3mr_process_op_reply_desc()
4804 sc->io_throttle_low) && in mpi3mr_process_op_reply_desc()
4807 mpi3mr_dprint(sc, MPI3MR_IOT, in mpi3mr_process_op_reply_desc()
4811 sc, tg, 0); in mpi3mr_process_op_reply_desc()
4815 mpi3mr_dprint(sc, MPI3MR_IOT, in mpi3mr_process_op_reply_desc()
4820 sc->io_throttle_low); in mpi3mr_process_op_reply_desc()
4824 if (ioc_pend_data_len <= sc->io_throttle_low) { in mpi3mr_process_op_reply_desc()
4826 mpi3mr_dprint(sc, MPI3MR_IOT, in mpi3mr_process_op_reply_desc()
4833 ioc_pend_data_len = mpi3mr_atomic_read(&sc->pend_large_data_sz); in mpi3mr_process_op_reply_desc()
4836 mpi3mr_dprint(sc, MPI3MR_IOT, in mpi3mr_process_op_reply_desc()
4841 sc->io_throttle_low); in mpi3mr_process_op_reply_desc()
4845 if ( ioc_pend_data_len <= sc->io_throttle_low) { in mpi3mr_process_op_reply_desc()
4846 mpi3mr_dprint(sc, MPI3MR_IOT, in mpi3mr_process_op_reply_desc()
4852 } else if (ioc_pend_data_len <= sc->io_throttle_low) { in mpi3mr_process_op_reply_desc()
4855 mpi3mr_dprint(sc, MPI3MR_IOT, in mpi3mr_process_op_reply_desc()
4862 sc->io_throttle_low, in mpi3mr_process_op_reply_desc()
4868 mpi3mr_dprint(sc, MPI3MR_IOT, in mpi3mr_process_op_reply_desc()
4872 sc, tg, 0); in mpi3mr_process_op_reply_desc()
4930 mpi3mr_dprint(sc, MPI3MR_TRACE, in mpi3mr_process_op_reply_desc()
4935 mpi3mr_dprint(sc, MPI3MR_TRACE, in mpi3mr_process_op_reply_desc()
4951 mpi3mr_dprint(sc, MPI3MR_XINFO, "func: %s line: %d recovered error\n", __func__, __LINE__); in mpi3mr_process_op_reply_desc()
5035 mpi3mr_cmd_done(sc, cm); in mpi3mr_process_op_reply_desc()
5036 mpi3mr_dprint(sc, MPI3MR_TRACE, "Completion IO path :" in mpi3mr_process_op_reply_desc()
5040 mpi3mr_atomic_dec(&sc->fw_outstanding); in mpi3mr_process_op_reply_desc()
5044 mpi3mr_repost_sense_buf(sc, in mpi3mr_process_op_reply_desc()
5051 * @sc: Adapter's soft instance
5056 int mpi3mr_complete_io_cmd(struct mpi3mr_softc *sc, in mpi3mr_complete_io_cmd() argument
5077 mpi3mr_dprint(sc, MPI3MR_TRACE, "[QID:%d]:reply_desc: (%pa) reply_ci: %x" in mpi3mr_complete_io_cmd()
5093 sc->op_req_q[req_qid - 1].ci = in mpi3mr_complete_io_cmd()
5096 mpi3mr_process_op_reply_desc(sc, reply_desc, &reply_dma); in mpi3mr_complete_io_cmd()
5099 mpi3mr_repost_reply_buf(sc, reply_dma); in mpi3mr_complete_io_cmd()
5112 mpi3mr_regwrite(sc, MPI3_SYSIF_OPER_REPLY_Q_N_CI_OFFSET(op_reply_q->qid), reply_ci); in mpi3mr_complete_io_cmd()
5119 mpi3mr_regwrite(sc, MPI3_SYSIF_OPER_REPLY_Q_N_CI_OFFSET(op_reply_q->qid), reply_ci); in mpi3mr_complete_io_cmd()
5138 struct mpi3mr_softc *sc = irq_ctx->sc; in mpi3mr_isr() local
5146 if (!sc->intr_enabled) in mpi3mr_isr()
5150 mpi3mr_complete_admin_cmd(sc); in mpi3mr_isr()
5153 mpi3mr_complete_io_cmd(sc, irq_ctx); in mpi3mr_isr()
5159 * @sc: Adapter reference
5166 mpi3mr_alloc_requests(struct mpi3mr_softc *sc) in mpi3mr_alloc_requests() argument
5171 nsegs = sc->max_sgl_entries; in mpi3mr_alloc_requests()
5172 ret = bus_dma_tag_create( sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_alloc_requests()
5174 sc->dma_loaddr, /* lowaddr */ in mpi3mr_alloc_requests()
5182 &sc->io_lock, /* lockarg */ in mpi3mr_alloc_requests()
5183 &sc->buffer_dmat); in mpi3mr_alloc_requests()
5185 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate buffer DMA tag ret: %d\n", ret); in mpi3mr_alloc_requests()
5190 * sc->cmd_list is an array of struct mpi3mr_cmd pointers. in mpi3mr_alloc_requests()
5194 sc->cmd_list = malloc(sizeof(struct mpi3mr_cmd *) * sc->max_host_ios, in mpi3mr_alloc_requests()
5197 if (!sc->cmd_list) { in mpi3mr_alloc_requests()
5198 device_printf(sc->mpi3mr_dev, "Cannot alloc memory for mpt_cmd_list.\n"); in mpi3mr_alloc_requests()
5202 for (i = 0; i < sc->max_host_ios; i++) { in mpi3mr_alloc_requests()
5203 sc->cmd_list[i] = malloc(sizeof(struct mpi3mr_cmd), in mpi3mr_alloc_requests()
5205 if (!sc->cmd_list[i]) { in mpi3mr_alloc_requests()
5207 free(sc->cmd_list[j], M_MPI3MR); in mpi3mr_alloc_requests()
5208 free(sc->cmd_list, M_MPI3MR); in mpi3mr_alloc_requests()
5209 sc->cmd_list = NULL; in mpi3mr_alloc_requests()
5214 for (i = 1; i < sc->max_host_ios; i++) { in mpi3mr_alloc_requests()
5215 cmd = sc->cmd_list[i]; in mpi3mr_alloc_requests()
5217 cmd->sc = sc; in mpi3mr_alloc_requests()
5219 callout_init_mtx(&cmd->callout, &sc->mpi3mr_mtx, 0); in mpi3mr_alloc_requests()
5221 TAILQ_INSERT_TAIL(&(sc->cmd_list_head), cmd, next); in mpi3mr_alloc_requests()
5222 if (bus_dmamap_create(sc->buffer_dmat, 0, &cmd->dmamap)) in mpi3mr_alloc_requests()
5230 * @sc: Adapter soft instance
5236 mpi3mr_get_command(struct mpi3mr_softc *sc) in mpi3mr_get_command() argument
5240 mtx_lock(&sc->cmd_pool_lock); in mpi3mr_get_command()
5241 if (!TAILQ_EMPTY(&sc->cmd_list_head)) { in mpi3mr_get_command()
5242 cmd = TAILQ_FIRST(&sc->cmd_list_head); in mpi3mr_get_command()
5243 TAILQ_REMOVE(&sc->cmd_list_head, cmd, next); in mpi3mr_get_command()
5248 mpi3mr_dprint(sc, MPI3MR_TRACE, "Get command SMID: 0x%x\n", cmd->hosttag); in mpi3mr_get_command()
5258 mtx_unlock(&sc->cmd_pool_lock); in mpi3mr_get_command()
5271 struct mpi3mr_softc *sc = cmd->sc; in mpi3mr_release_command() local
5273 mtx_lock(&sc->cmd_pool_lock); in mpi3mr_release_command()
5274 TAILQ_INSERT_HEAD(&(sc->cmd_list_head), cmd, next); in mpi3mr_release_command()
5277 mpi3mr_dprint(sc, MPI3MR_TRACE, "Release command SMID: 0x%x\n", cmd->hosttag); in mpi3mr_release_command()
5278 mtx_unlock(&sc->cmd_pool_lock); in mpi3mr_release_command()
5285 * @sc: Adapter instance reference
5291 static void mpi3mr_free_ioctl_dma_memory(struct mpi3mr_softc *sc) in mpi3mr_free_ioctl_dma_memory() argument
5297 mem_desc = &sc->ioctl_sge[i]; in mpi3mr_free_ioctl_dma_memory()
5307 mem_desc = &sc->ioctl_chain_sge; in mpi3mr_free_ioctl_dma_memory()
5316 mem_desc = &sc->ioctl_resp_sge; in mpi3mr_free_ioctl_dma_memory()
5325 sc->ioctl_sges_allocated = false; in mpi3mr_free_ioctl_dma_memory()
5330 * @sc: Adapter instance reference
5337 void mpi3mr_alloc_ioctl_dma_memory(struct mpi3mr_softc *sc) in mpi3mr_alloc_ioctl_dma_memory() argument
5343 mem_desc = &sc->ioctl_sge[i]; in mpi3mr_alloc_ioctl_dma_memory()
5346 if (bus_dma_tag_create(sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_alloc_ioctl_dma_memory()
5348 sc->dma_loaddr, /* lowaddr */ in mpi3mr_alloc_ioctl_dma_memory()
5357 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate request DMA tag\n"); in mpi3mr_alloc_ioctl_dma_memory()
5363 mpi3mr_dprint(sc, MPI3MR_ERROR, "%s: Cannot allocate replies memory\n", __func__); in mpi3mr_alloc_ioctl_dma_memory()
5374 mem_desc = &sc->ioctl_chain_sge; in mpi3mr_alloc_ioctl_dma_memory()
5376 if (bus_dma_tag_create(sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_alloc_ioctl_dma_memory()
5378 sc->dma_loaddr, /* lowaddr */ in mpi3mr_alloc_ioctl_dma_memory()
5387 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate request DMA tag\n"); in mpi3mr_alloc_ioctl_dma_memory()
5393 mpi3mr_dprint(sc, MPI3MR_ERROR, "%s: Cannot allocate replies memory\n", __func__); in mpi3mr_alloc_ioctl_dma_memory()
5403 mem_desc = &sc->ioctl_resp_sge; in mpi3mr_alloc_ioctl_dma_memory()
5405 if (bus_dma_tag_create(sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_alloc_ioctl_dma_memory()
5407 sc->dma_loaddr, /* lowaddr */ in mpi3mr_alloc_ioctl_dma_memory()
5416 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate request DMA tag\n"); in mpi3mr_alloc_ioctl_dma_memory()
5422 mpi3mr_dprint(sc, MPI3MR_ERROR, "Cannot allocate replies memory\n"); in mpi3mr_alloc_ioctl_dma_memory()
5432 sc->ioctl_sges_allocated = true; in mpi3mr_alloc_ioctl_dma_memory()
5438 mpi3mr_free_ioctl_dma_memory(sc); in mpi3mr_alloc_ioctl_dma_memory()
5442 mpi3mr_free_dma_mem(struct mpi3mr_softc *sc, in mpi3mr_free_dma_mem() argument
5458 mpi3mr_alloc_dma_mem(struct mpi3mr_softc *sc, in mpi3mr_alloc_dma_mem() argument
5463 if (bus_dma_tag_create(sc->mpi3mr_parent_dmat, /* parent */ in mpi3mr_alloc_dma_mem()
5465 sc->dma_loaddr, /* lowaddr */ in mpi3mr_alloc_dma_mem()
5466 sc->dma_hiaddr, /* highaddr */ in mpi3mr_alloc_dma_mem()
5474 mpi3mr_dprint(sc, MPI3MR_ERROR, "%s: Cannot allocate DMA tag\n", __func__); in mpi3mr_alloc_dma_mem()
5480 mpi3mr_dprint(sc, MPI3MR_ERROR, "%s: Cannot allocate DMA memory\n", __func__); in mpi3mr_alloc_dma_mem()
5491 mpi3mr_dprint(sc, MPI3MR_ERROR, "%s: Cannot load DMA map\n", __func__); in mpi3mr_alloc_dma_mem()
5497 mpi3mr_free_dma_mem(sc, mem_desc); in mpi3mr_alloc_dma_mem()
5502 mpi3mr_post_cfg_req(struct mpi3mr_softc *sc, Mpi3ConfigRequest_t *cfg_req) in mpi3mr_post_cfg_req() argument
5506 mtx_lock(&sc->cfg_cmds.completion.lock); in mpi3mr_post_cfg_req()
5507 if (sc->cfg_cmds.state & MPI3MR_CMD_PENDING) { in mpi3mr_post_cfg_req()
5508 mpi3mr_dprint(sc, MPI3MR_ERROR, "Issue cfg request: cfg command is in use\n"); in mpi3mr_post_cfg_req()
5509 mtx_unlock(&sc->cfg_cmds.completion.lock); in mpi3mr_post_cfg_req()
5513 sc->cfg_cmds.state = MPI3MR_CMD_PENDING; in mpi3mr_post_cfg_req()
5514 sc->cfg_cmds.is_waiting = 1; in mpi3mr_post_cfg_req()
5515 sc->cfg_cmds.callback = NULL; in mpi3mr_post_cfg_req()
5516 sc->cfg_cmds.ioc_status = 0; in mpi3mr_post_cfg_req()
5517 sc->cfg_cmds.ioc_loginfo = 0; in mpi3mr_post_cfg_req()
5525 init_completion(&sc->cfg_cmds.completion); in mpi3mr_post_cfg_req()
5527 retval = mpi3mr_submit_admin_cmd(sc, cfg_req, sizeof(*cfg_req)); in mpi3mr_post_cfg_req()
5529 mpi3mr_dprint(sc, MPI3MR_ERROR, "Issue cfg request: Admin Post failed\n"); in mpi3mr_post_cfg_req()
5533 wait_for_completion_timeout(&sc->cfg_cmds.completion, in mpi3mr_post_cfg_req()
5536 if (!(sc->cfg_cmds.state & MPI3MR_CMD_COMPLETE)) { in mpi3mr_post_cfg_req()
5537 if (!(sc->cfg_cmds.state & MPI3MR_CMD_RESET)) { in mpi3mr_post_cfg_req()
5538 mpi3mr_dprint(sc, MPI3MR_ERROR, "config request command timed out\n"); in mpi3mr_post_cfg_req()
5539 mpi3mr_check_rh_fault_ioc(sc, MPI3MR_RESET_FROM_CFG_REQ_TIMEOUT); in mpi3mr_post_cfg_req()
5542 sc->cfg_cmds.is_waiting = 0; in mpi3mr_post_cfg_req()
5546 if ((sc->cfg_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) != in mpi3mr_post_cfg_req()
5548 mpi3mr_dprint(sc, MPI3MR_ERROR, "config request failed, IOCStatus(0x%04x) " in mpi3mr_post_cfg_req()
5549 " Loginfo(0x%08x) \n",(sc->cfg_cmds.ioc_status & in mpi3mr_post_cfg_req()
5550 MPI3_IOCSTATUS_STATUS_MASK), sc->cfg_cmds.ioc_loginfo); in mpi3mr_post_cfg_req()
5555 sc->cfg_cmds.state = MPI3MR_CMD_NOTUSED; in mpi3mr_post_cfg_req()
5556 mtx_unlock(&sc->cfg_cmds.completion.lock); in mpi3mr_post_cfg_req()
5560 static int mpi3mr_process_cfg_req(struct mpi3mr_softc *sc, in mpi3mr_process_cfg_req() argument
5576 retval = mpi3mr_alloc_dma_mem(sc, &mem_desc); in mpi3mr_process_cfg_req()
5578 mpi3mr_dprint(sc, MPI3MR_ERROR, "%s: Failed to allocate DMA memory\n", __func__); in mpi3mr_process_cfg_req()
5585 retval = mpi3mr_post_cfg_req(sc, cfg_req); in mpi3mr_process_cfg_req()
5587 mpi3mr_dprint(sc, MPI3MR_ERROR, "%s: Failed to post config request\n", __func__); in mpi3mr_process_cfg_req()
5591 mpi3mr_free_dma_mem(sc, &mem_desc); in mpi3mr_process_cfg_req()
5595 int mpi3mr_cfg_get_driver_pg1(struct mpi3mr_softc *sc) in mpi3mr_cfg_get_driver_pg1() argument
5603 retval = mpi3mr_process_cfg_req(sc, &cfg_req, NULL, &cfg_hdr, sizeof(cfg_hdr)); in mpi3mr_cfg_get_driver_pg1()
5608 retval = mpi3mr_process_cfg_req(sc, &cfg_req, &cfg_hdr, &driver_pg1, sizeof(driver_pg1)); in mpi3mr_cfg_get_driver_pg1()
5612 sc->ts_update_interval = driver_pg1.TimeStampUpdate; in mpi3mr_cfg_get_driver_pg1()
5614 sc->ts_update_interval = MPI3MR_TSUPDATE_INTERVAL; in mpi3mr_cfg_get_driver_pg1()
5620 mpi3mr_destory_mtx(struct mpi3mr_softc *sc) in mpi3mr_destory_mtx() argument
5626 if (sc->admin_reply) { in mpi3mr_destory_mtx()
5627 if (mtx_initialized(&sc->admin_reply_lock)) in mpi3mr_destory_mtx()
5628 mtx_destroy(&sc->admin_reply_lock); in mpi3mr_destory_mtx()
5631 if (sc->op_reply_q) { in mpi3mr_destory_mtx()
5632 for(i = 0; i < sc->num_queues; i++) { in mpi3mr_destory_mtx()
5633 op_reply_q = sc->op_reply_q + i; in mpi3mr_destory_mtx()
5639 if (sc->op_req_q) { in mpi3mr_destory_mtx()
5640 for(i = 0; i < sc->num_queues; i++) { in mpi3mr_destory_mtx()
5641 op_req_q = sc->op_req_q + i; in mpi3mr_destory_mtx()
5647 if (mtx_initialized(&sc->init_cmds.completion.lock)) in mpi3mr_destory_mtx()
5648 mtx_destroy(&sc->init_cmds.completion.lock); in mpi3mr_destory_mtx()
5650 if (mtx_initialized(&sc->cfg_cmds.completion.lock)) in mpi3mr_destory_mtx()
5651 mtx_destroy(&sc->cfg_cmds.completion.lock); in mpi3mr_destory_mtx()
5653 if (mtx_initialized(&sc->ioctl_cmds.completion.lock)) in mpi3mr_destory_mtx()
5654 mtx_destroy(&sc->ioctl_cmds.completion.lock); in mpi3mr_destory_mtx()
5656 if (mtx_initialized(&sc->host_tm_cmds.completion.lock)) in mpi3mr_destory_mtx()
5657 mtx_destroy(&sc->host_tm_cmds.completion.lock); in mpi3mr_destory_mtx()
5660 if (mtx_initialized(&sc->dev_rmhs_cmds[i].completion.lock)) in mpi3mr_destory_mtx()
5661 mtx_destroy(&sc->dev_rmhs_cmds[i].completion.lock); in mpi3mr_destory_mtx()
5664 if (mtx_initialized(&sc->reset_mutex)) in mpi3mr_destory_mtx()
5665 mtx_destroy(&sc->reset_mutex); in mpi3mr_destory_mtx()
5667 if (mtx_initialized(&sc->target_lock)) in mpi3mr_destory_mtx()
5668 mtx_destroy(&sc->target_lock); in mpi3mr_destory_mtx()
5670 if (mtx_initialized(&sc->fwevt_lock)) in mpi3mr_destory_mtx()
5671 mtx_destroy(&sc->fwevt_lock); in mpi3mr_destory_mtx()
5673 if (mtx_initialized(&sc->cmd_pool_lock)) in mpi3mr_destory_mtx()
5674 mtx_destroy(&sc->cmd_pool_lock); in mpi3mr_destory_mtx()
5676 if (mtx_initialized(&sc->reply_free_q_lock)) in mpi3mr_destory_mtx()
5677 mtx_destroy(&sc->reply_free_q_lock); in mpi3mr_destory_mtx()
5679 if (mtx_initialized(&sc->sense_buf_q_lock)) in mpi3mr_destory_mtx()
5680 mtx_destroy(&sc->sense_buf_q_lock); in mpi3mr_destory_mtx()
5682 if (mtx_initialized(&sc->chain_buf_lock)) in mpi3mr_destory_mtx()
5683 mtx_destroy(&sc->chain_buf_lock); in mpi3mr_destory_mtx()
5685 if (mtx_initialized(&sc->admin_req_lock)) in mpi3mr_destory_mtx()
5686 mtx_destroy(&sc->admin_req_lock); in mpi3mr_destory_mtx()
5688 if (mtx_initialized(&sc->mpi3mr_mtx)) in mpi3mr_destory_mtx()
5689 mtx_destroy(&sc->mpi3mr_mtx); in mpi3mr_destory_mtx()
5694 * @sc: Adapter reference
5699 mpi3mr_free_mem(struct mpi3mr_softc *sc) in mpi3mr_free_mem() argument
5706 if (sc->cmd_list) { in mpi3mr_free_mem()
5707 for (i = 0; i < sc->max_host_ios; i++) { in mpi3mr_free_mem()
5708 free(sc->cmd_list[i], M_MPI3MR); in mpi3mr_free_mem()
5710 free(sc->cmd_list, M_MPI3MR); in mpi3mr_free_mem()
5711 sc->cmd_list = NULL; in mpi3mr_free_mem()
5714 if (sc->pel_seq_number && sc->pel_seq_number_dma) { in mpi3mr_free_mem()
5715 bus_dmamap_unload(sc->pel_seq_num_dmatag, sc->pel_seq_num_dmamap); in mpi3mr_free_mem()
5716 bus_dmamem_free(sc->pel_seq_num_dmatag, sc->pel_seq_number, sc->pel_seq_num_dmamap); in mpi3mr_free_mem()
5717 sc->pel_seq_number = NULL; in mpi3mr_free_mem()
5718 if (sc->pel_seq_num_dmatag != NULL) in mpi3mr_free_mem()
5719 bus_dma_tag_destroy(sc->pel_seq_num_dmatag); in mpi3mr_free_mem()
5722 if (sc->throttle_groups) { in mpi3mr_free_mem()
5723 free(sc->throttle_groups, M_MPI3MR); in mpi3mr_free_mem()
5724 sc->throttle_groups = NULL; in mpi3mr_free_mem()
5728 if (sc->op_req_q) { in mpi3mr_free_mem()
5729 for (i = 0; i < sc->num_queues; i++) { in mpi3mr_free_mem()
5730 op_req_q = sc->op_req_q + i; in mpi3mr_free_mem()
5739 free(sc->op_req_q, M_MPI3MR); in mpi3mr_free_mem()
5740 sc->op_req_q = NULL; in mpi3mr_free_mem()
5743 if (sc->op_reply_q) { in mpi3mr_free_mem()
5744 for (i = 0; i < sc->num_queues; i++) { in mpi3mr_free_mem()
5745 op_reply_q = sc->op_reply_q + i; in mpi3mr_free_mem()
5754 free(sc->op_reply_q, M_MPI3MR); in mpi3mr_free_mem()
5755 sc->op_reply_q = NULL; in mpi3mr_free_mem()
5759 if (sc->chain_sgl_list) { in mpi3mr_free_mem()
5760 for (i = 0; i < sc->chain_buf_count; i++) { in mpi3mr_free_mem()
5761 if (sc->chain_sgl_list[i].buf && sc->chain_sgl_list[i].buf_phys) { in mpi3mr_free_mem()
5762 bus_dmamap_unload(sc->chain_sgl_list_tag, sc->chain_sgl_list[i].buf_dmamap); in mpi3mr_free_mem()
5763 bus_dmamem_free(sc->chain_sgl_list_tag, sc->chain_sgl_list[i].buf, in mpi3mr_free_mem()
5764 sc->chain_sgl_list[i].buf_dmamap); in mpi3mr_free_mem()
5765 sc->chain_sgl_list[i].buf = NULL; in mpi3mr_free_mem()
5768 if (sc->chain_sgl_list_tag != NULL) in mpi3mr_free_mem()
5769 bus_dma_tag_destroy(sc->chain_sgl_list_tag); in mpi3mr_free_mem()
5770 free(sc->chain_sgl_list, M_MPI3MR); in mpi3mr_free_mem()
5771 sc->chain_sgl_list = NULL; in mpi3mr_free_mem()
5774 if (sc->chain_bitmap) { in mpi3mr_free_mem()
5775 free(sc->chain_bitmap, M_MPI3MR); in mpi3mr_free_mem()
5776 sc->chain_bitmap = NULL; in mpi3mr_free_mem()
5779 for (i = 0; i < sc->msix_count; i++) { in mpi3mr_free_mem()
5780 irq_ctx = sc->irq_ctx + i; in mpi3mr_free_mem()
5786 if (sc->reply_buf && sc->reply_buf_phys) { in mpi3mr_free_mem()
5787 bus_dmamap_unload(sc->reply_buf_tag, sc->reply_buf_dmamap); in mpi3mr_free_mem()
5788 bus_dmamem_free(sc->reply_buf_tag, sc->reply_buf, in mpi3mr_free_mem()
5789 sc->reply_buf_dmamap); in mpi3mr_free_mem()
5790 sc->reply_buf = NULL; in mpi3mr_free_mem()
5791 if (sc->reply_buf_tag != NULL) in mpi3mr_free_mem()
5792 bus_dma_tag_destroy(sc->reply_buf_tag); in mpi3mr_free_mem()
5796 if (sc->reply_free_q && sc->reply_free_q_phys) { in mpi3mr_free_mem()
5797 bus_dmamap_unload(sc->reply_free_q_tag, sc->reply_free_q_dmamap); in mpi3mr_free_mem()
5798 bus_dmamem_free(sc->reply_free_q_tag, sc->reply_free_q, in mpi3mr_free_mem()
5799 sc->reply_free_q_dmamap); in mpi3mr_free_mem()
5800 sc->reply_free_q = NULL; in mpi3mr_free_mem()
5801 if (sc->reply_free_q_tag != NULL) in mpi3mr_free_mem()
5802 bus_dma_tag_destroy(sc->reply_free_q_tag); in mpi3mr_free_mem()
5806 if (sc->sense_buf && sc->sense_buf_phys) { in mpi3mr_free_mem()
5807 bus_dmamap_unload(sc->sense_buf_tag, sc->sense_buf_dmamap); in mpi3mr_free_mem()
5808 bus_dmamem_free(sc->sense_buf_tag, sc->sense_buf, in mpi3mr_free_mem()
5809 sc->sense_buf_dmamap); in mpi3mr_free_mem()
5810 sc->sense_buf = NULL; in mpi3mr_free_mem()
5811 if (sc->sense_buf_tag != NULL) in mpi3mr_free_mem()
5812 bus_dma_tag_destroy(sc->sense_buf_tag); in mpi3mr_free_mem()
5816 if (sc->sense_buf_q && sc->sense_buf_q_phys) { in mpi3mr_free_mem()
5817 bus_dmamap_unload(sc->sense_buf_q_tag, sc->sense_buf_q_dmamap); in mpi3mr_free_mem()
5818 bus_dmamem_free(sc->sense_buf_q_tag, sc->sense_buf_q, in mpi3mr_free_mem()
5819 sc->sense_buf_q_dmamap); in mpi3mr_free_mem()
5820 sc->sense_buf_q = NULL; in mpi3mr_free_mem()
5821 if (sc->sense_buf_q_tag != NULL) in mpi3mr_free_mem()
5822 bus_dma_tag_destroy(sc->sense_buf_q_tag); in mpi3mr_free_mem()
5826 if (sc->init_cmds.reply) { in mpi3mr_free_mem()
5827 free(sc->init_cmds.reply, M_MPI3MR); in mpi3mr_free_mem()
5828 sc->init_cmds.reply = NULL; in mpi3mr_free_mem()
5831 if (sc->cfg_cmds.reply) { in mpi3mr_free_mem()
5832 free(sc->cfg_cmds.reply, M_MPI3MR); in mpi3mr_free_mem()
5833 sc->cfg_cmds.reply = NULL; in mpi3mr_free_mem()
5836 if (sc->ioctl_cmds.reply) { in mpi3mr_free_mem()
5837 free(sc->ioctl_cmds.reply, M_MPI3MR); in mpi3mr_free_mem()
5838 sc->ioctl_cmds.reply = NULL; in mpi3mr_free_mem()
5841 if (sc->pel_cmds.reply) { in mpi3mr_free_mem()
5842 free(sc->pel_cmds.reply, M_MPI3MR); in mpi3mr_free_mem()
5843 sc->pel_cmds.reply = NULL; in mpi3mr_free_mem()
5846 if (sc->pel_abort_cmd.reply) { in mpi3mr_free_mem()
5847 free(sc->pel_abort_cmd.reply, M_MPI3MR); in mpi3mr_free_mem()
5848 sc->pel_abort_cmd.reply = NULL; in mpi3mr_free_mem()
5851 if (sc->host_tm_cmds.reply) { in mpi3mr_free_mem()
5852 free(sc->host_tm_cmds.reply, M_MPI3MR); in mpi3mr_free_mem()
5853 sc->host_tm_cmds.reply = NULL; in mpi3mr_free_mem()
5856 if (sc->log_data_buffer) { in mpi3mr_free_mem()
5857 free(sc->log_data_buffer, M_MPI3MR); in mpi3mr_free_mem()
5858 sc->log_data_buffer = NULL; in mpi3mr_free_mem()
5862 if (sc->dev_rmhs_cmds[i].reply) { in mpi3mr_free_mem()
5863 free(sc->dev_rmhs_cmds[i].reply, M_MPI3MR); in mpi3mr_free_mem()
5864 sc->dev_rmhs_cmds[i].reply = NULL; in mpi3mr_free_mem()
5869 if (sc->evtack_cmds[i].reply) { in mpi3mr_free_mem()
5870 free(sc->evtack_cmds[i].reply, M_MPI3MR); in mpi3mr_free_mem()
5871 sc->evtack_cmds[i].reply = NULL; in mpi3mr_free_mem()
5875 if (sc->removepend_bitmap) { in mpi3mr_free_mem()
5876 free(sc->removepend_bitmap, M_MPI3MR); in mpi3mr_free_mem()
5877 sc->removepend_bitmap = NULL; in mpi3mr_free_mem()
5880 if (sc->devrem_bitmap) { in mpi3mr_free_mem()
5881 free(sc->devrem_bitmap, M_MPI3MR); in mpi3mr_free_mem()
5882 sc->devrem_bitmap = NULL; in mpi3mr_free_mem()
5885 if (sc->evtack_cmds_bitmap) { in mpi3mr_free_mem()
5886 free(sc->evtack_cmds_bitmap, M_MPI3MR); in mpi3mr_free_mem()
5887 sc->evtack_cmds_bitmap = NULL; in mpi3mr_free_mem()
5891 if (sc->admin_reply && sc->admin_reply_phys) { in mpi3mr_free_mem()
5892 bus_dmamap_unload(sc->admin_reply_tag, sc->admin_reply_dmamap); in mpi3mr_free_mem()
5893 bus_dmamem_free(sc->admin_reply_tag, sc->admin_reply, in mpi3mr_free_mem()
5894 sc->admin_reply_dmamap); in mpi3mr_free_mem()
5895 sc->admin_reply = NULL; in mpi3mr_free_mem()
5896 if (sc->admin_reply_tag != NULL) in mpi3mr_free_mem()
5897 bus_dma_tag_destroy(sc->admin_reply_tag); in mpi3mr_free_mem()
5901 if (sc->admin_req && sc->admin_req_phys) { in mpi3mr_free_mem()
5902 bus_dmamap_unload(sc->admin_req_tag, sc->admin_req_dmamap); in mpi3mr_free_mem()
5903 bus_dmamem_free(sc->admin_req_tag, sc->admin_req, in mpi3mr_free_mem()
5904 sc->admin_req_dmamap); in mpi3mr_free_mem()
5905 sc->admin_req = NULL; in mpi3mr_free_mem()
5906 if (sc->admin_req_tag != NULL) in mpi3mr_free_mem()
5907 bus_dma_tag_destroy(sc->admin_req_tag); in mpi3mr_free_mem()
5909 mpi3mr_free_ioctl_dma_memory(sc); in mpi3mr_free_mem()
5915 * @sc: Adapter instance reference
5923 static inline void mpi3mr_drv_cmd_comp_reset(struct mpi3mr_softc *sc, in mpi3mr_drv_cmd_comp_reset() argument
5933 cmdptr->callback(sc, cmdptr); in mpi3mr_drv_cmd_comp_reset()
5939 * @sc: Adapter instance reference
5945 static void mpi3mr_flush_drv_cmds(struct mpi3mr_softc *sc) in mpi3mr_flush_drv_cmds() argument
5950 cmdptr = &sc->init_cmds; in mpi3mr_flush_drv_cmds()
5951 mpi3mr_drv_cmd_comp_reset(sc, cmdptr); in mpi3mr_flush_drv_cmds()
5953 cmdptr = &sc->cfg_cmds; in mpi3mr_flush_drv_cmds()
5954 mpi3mr_drv_cmd_comp_reset(sc, cmdptr); in mpi3mr_flush_drv_cmds()
5956 cmdptr = &sc->ioctl_cmds; in mpi3mr_flush_drv_cmds()
5957 mpi3mr_drv_cmd_comp_reset(sc, cmdptr); in mpi3mr_flush_drv_cmds()
5959 cmdptr = &sc->host_tm_cmds; in mpi3mr_flush_drv_cmds()
5960 mpi3mr_drv_cmd_comp_reset(sc, cmdptr); in mpi3mr_flush_drv_cmds()
5963 cmdptr = &sc->dev_rmhs_cmds[i]; in mpi3mr_flush_drv_cmds()
5964 mpi3mr_drv_cmd_comp_reset(sc, cmdptr); in mpi3mr_flush_drv_cmds()
5968 cmdptr = &sc->evtack_cmds[i]; in mpi3mr_flush_drv_cmds()
5969 mpi3mr_drv_cmd_comp_reset(sc, cmdptr); in mpi3mr_flush_drv_cmds()
5972 cmdptr = &sc->pel_cmds; in mpi3mr_flush_drv_cmds()
5973 mpi3mr_drv_cmd_comp_reset(sc, cmdptr); in mpi3mr_flush_drv_cmds()
5975 cmdptr = &sc->pel_abort_cmd; in mpi3mr_flush_drv_cmds()
5976 mpi3mr_drv_cmd_comp_reset(sc, cmdptr); in mpi3mr_flush_drv_cmds()
5982 * @sc: Adapter instance reference
5990 static void mpi3mr_memset_buffers(struct mpi3mr_softc *sc) in mpi3mr_memset_buffers() argument
5995 memset(sc->admin_req, 0, sc->admin_req_q_sz); in mpi3mr_memset_buffers()
5996 memset(sc->admin_reply, 0, sc->admin_reply_q_sz); in mpi3mr_memset_buffers()
5998 memset(sc->init_cmds.reply, 0, sc->reply_sz); in mpi3mr_memset_buffers()
5999 memset(sc->cfg_cmds.reply, 0, sc->reply_sz); in mpi3mr_memset_buffers()
6000 memset(sc->ioctl_cmds.reply, 0, sc->reply_sz); in mpi3mr_memset_buffers()
6001 memset(sc->host_tm_cmds.reply, 0, sc->reply_sz); in mpi3mr_memset_buffers()
6002 memset(sc->pel_cmds.reply, 0, sc->reply_sz); in mpi3mr_memset_buffers()
6003 memset(sc->pel_abort_cmd.reply, 0, sc->reply_sz); in mpi3mr_memset_buffers()
6005 memset(sc->dev_rmhs_cmds[i].reply, 0, sc->reply_sz); in mpi3mr_memset_buffers()
6007 memset(sc->evtack_cmds[i].reply, 0, sc->reply_sz); in mpi3mr_memset_buffers()
6008 memset(sc->removepend_bitmap, 0, sc->dev_handle_bitmap_sz); in mpi3mr_memset_buffers()
6009 memset(sc->devrem_bitmap, 0, sc->devrem_bitmap_sz); in mpi3mr_memset_buffers()
6010 memset(sc->evtack_cmds_bitmap, 0, sc->evtack_cmds_bitmap_sz); in mpi3mr_memset_buffers()
6012 for (i = 0; i < sc->num_queues; i++) { in mpi3mr_memset_buffers()
6013 sc->op_reply_q[i].qid = 0; in mpi3mr_memset_buffers()
6014 sc->op_reply_q[i].ci = 0; in mpi3mr_memset_buffers()
6015 sc->op_reply_q[i].num_replies = 0; in mpi3mr_memset_buffers()
6016 sc->op_reply_q[i].ephase = 0; in mpi3mr_memset_buffers()
6017 mpi3mr_atomic_set(&sc->op_reply_q[i].pend_ios, 0); in mpi3mr_memset_buffers()
6018 memset(sc->op_reply_q[i].q_base, 0, sc->op_reply_q[i].qsz); in mpi3mr_memset_buffers()
6020 sc->op_req_q[i].ci = 0; in mpi3mr_memset_buffers()
6021 sc->op_req_q[i].pi = 0; in mpi3mr_memset_buffers()
6022 sc->op_req_q[i].num_reqs = 0; in mpi3mr_memset_buffers()
6023 sc->op_req_q[i].qid = 0; in mpi3mr_memset_buffers()
6024 sc->op_req_q[i].reply_qid = 0; in mpi3mr_memset_buffers()
6025 memset(sc->op_req_q[i].q_base, 0, sc->op_req_q[i].qsz); in mpi3mr_memset_buffers()
6028 mpi3mr_atomic_set(&sc->pend_large_data_sz, 0); in mpi3mr_memset_buffers()
6029 if (sc->throttle_groups) { in mpi3mr_memset_buffers()
6030 tg = sc->throttle_groups; in mpi3mr_memset_buffers()
6031 for (i = 0; i < sc->num_io_throttle_group; i++, tg++) { in mpi3mr_memset_buffers()
6045 * @sc: Adapter instance reference
6052 static void mpi3mr_invalidate_devhandles(struct mpi3mr_softc *sc) in mpi3mr_invalidate_devhandles() argument
6056 mtx_lock_spin(&sc->target_lock); in mpi3mr_invalidate_devhandles()
6057 TAILQ_FOREACH(target, &sc->cam_sc->tgt_list, tgt_next) { in mpi3mr_invalidate_devhandles()
6066 mtx_unlock_spin(&sc->target_lock); in mpi3mr_invalidate_devhandles()
6071 * @sc: Adapter instance reference
6080 static void mpi3mr_rfresh_tgtdevs(struct mpi3mr_softc *sc) in mpi3mr_rfresh_tgtdevs() argument
6085 TAILQ_FOREACH_SAFE(target, &sc->cam_sc->tgt_list, tgt_next, target_temp) { in mpi3mr_rfresh_tgtdevs()
6088 mpi3mr_remove_device_from_os(sc, target->dev_handle); in mpi3mr_rfresh_tgtdevs()
6089 mpi3mr_remove_device_from_list(sc, target, true); in mpi3mr_rfresh_tgtdevs()
6091 mpi3mr_remove_device_from_os(sc, target->dev_handle); in mpi3mr_rfresh_tgtdevs()
6095 TAILQ_FOREACH(target, &sc->cam_sc->tgt_list, tgt_next) { in mpi3mr_rfresh_tgtdevs()
6098 mpi3mr_add_device(sc, target->per_id); in mpi3mr_rfresh_tgtdevs()
6104 static void mpi3mr_flush_io(struct mpi3mr_softc *sc) in mpi3mr_flush_io() argument
6110 for (i = 0; i < sc->max_host_ios; i++) { in mpi3mr_flush_io()
6111 cmd = sc->cmd_list[i]; in mpi3mr_flush_io()
6117 mpi3mr_atomic_dec(&sc->fw_outstanding); in mpi3mr_flush_io()
6119 mpi3mr_cmd_done(sc, cmd); in mpi3mr_flush_io()
6130 * @sc: Adapter reference
6137 static inline void mpi3mr_set_diagsave(struct mpi3mr_softc *sc) in mpi3mr_set_diagsave() argument
6142 mpi3mr_regread(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET); in mpi3mr_set_diagsave()
6144 mpi3mr_regwrite(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET, ioc_config); in mpi3mr_set_diagsave()
6149 * @sc: Adapter reference
6160 static int mpi3mr_issue_reset(struct mpi3mr_softc *sc, U16 reset_type, in mpi3mr_issue_reset() argument
6171 if (sc->unrecoverable) in mpi3mr_issue_reset()
6179 mpi3mr_dprint(sc, MPI3MR_INFO, "%s reset due to %s(0x%x)\n", in mpi3mr_issue_reset()
6183 mpi3mr_clear_reset_history(sc); in mpi3mr_issue_reset()
6185 mpi3mr_dprint(sc, MPI3MR_INFO, in mpi3mr_issue_reset()
6189 mpi3mr_dprint(sc, MPI3MR_ERROR, in mpi3mr_issue_reset()
6193 sc->unrecoverable = 1; in mpi3mr_issue_reset()
6197 mpi3mr_regwrite(sc, MPI3_SYSIF_WRITE_SEQUENCE_OFFSET, in mpi3mr_issue_reset()
6199 mpi3mr_regwrite(sc, MPI3_SYSIF_WRITE_SEQUENCE_OFFSET, in mpi3mr_issue_reset()
6201 mpi3mr_regwrite(sc, MPI3_SYSIF_WRITE_SEQUENCE_OFFSET, in mpi3mr_issue_reset()
6203 mpi3mr_regwrite(sc, MPI3_SYSIF_WRITE_SEQUENCE_OFFSET, in mpi3mr_issue_reset()
6205 mpi3mr_regwrite(sc, MPI3_SYSIF_WRITE_SEQUENCE_OFFSET, in mpi3mr_issue_reset()
6207 mpi3mr_regwrite(sc, MPI3_SYSIF_WRITE_SEQUENCE_OFFSET, in mpi3mr_issue_reset()
6209 mpi3mr_regwrite(sc, MPI3_SYSIF_WRITE_SEQUENCE_OFFSET, in mpi3mr_issue_reset()
6213 host_diagnostic = mpi3mr_regread(sc, MPI3_SYSIF_HOST_DIAG_OFFSET); in mpi3mr_issue_reset()
6214 mpi3mr_dprint(sc, MPI3MR_INFO, in mpi3mr_issue_reset()
6220 mpi3mr_set_diagsave(sc); in mpi3mr_issue_reset()
6224 (sc->facts.ioc_num << in mpi3mr_issue_reset()
6226 mpi3mr_regwrite(sc, MPI3_SYSIF_SCRATCHPAD0_OFFSET, scratch_pad0); in mpi3mr_issue_reset()
6227 mpi3mr_regwrite(sc, MPI3_SYSIF_HOST_DIAG_OFFSET, host_diagnostic | reset_type); in mpi3mr_issue_reset()
6231 ioc_status = mpi3mr_regread(sc, MPI3_SYSIF_IOC_STATUS_OFFSET); in mpi3mr_issue_reset()
6235 mpi3mr_regread(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET); in mpi3mr_issue_reset()
6238 mpi3mr_clear_reset_history(sc); in mpi3mr_issue_reset()
6247 ioc_status = mpi3mr_regread(sc, MPI3_SYSIF_IOC_STATUS_OFFSET); in mpi3mr_issue_reset()
6248 if (mpi3mr_diagfault_success(sc, ioc_status)) { in mpi3mr_issue_reset()
6256 mpi3mr_regwrite(sc, MPI3_SYSIF_WRITE_SEQUENCE_OFFSET, in mpi3mr_issue_reset()
6259 ioc_status = mpi3mr_regread(sc, MPI3_SYSIF_IOC_STATUS_OFFSET); in mpi3mr_issue_reset()
6260 ioc_config = mpi3mr_regread(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET); in mpi3mr_issue_reset()
6262 mpi3mr_dprint(sc, MPI3MR_INFO, in mpi3mr_issue_reset()
6268 sc->unrecoverable = 1; in mpi3mr_issue_reset()
6273 inline void mpi3mr_cleanup_event_taskq(struct mpi3mr_softc *sc) in mpi3mr_cleanup_event_taskq() argument
6282 taskqueue_block(sc->cam_sc->ev_tq); in mpi3mr_cleanup_event_taskq()
6283 while (taskqueue_cancel(sc->cam_sc->ev_tq, &sc->cam_sc->ev_task, NULL) != 0) { in mpi3mr_cleanup_event_taskq()
6284 taskqueue_drain(sc->cam_sc->ev_tq, &sc->cam_sc->ev_task); in mpi3mr_cleanup_event_taskq()
6290 * @sc: Adapter instance reference
6304 int mpi3mr_soft_reset_handler(struct mpi3mr_softc *sc, in mpi3mr_soft_reset_handler() argument
6310 mpi3mr_dprint(sc, MPI3MR_INFO, "soft reset invoked: reason code: %s\n", in mpi3mr_soft_reset_handler()
6314 (sc->reset.ioctl_reset_snapdump != true)) in mpi3mr_soft_reset_handler()
6317 mpi3mr_dprint(sc, MPI3MR_INFO, in mpi3mr_soft_reset_handler()
6319 while (sc->diagsave_timeout) in mpi3mr_soft_reset_handler()
6322 ioc_state = mpi3mr_get_iocstate(sc); in mpi3mr_soft_reset_handler()
6324 mpi3mr_dprint(sc, MPI3MR_ERROR, "controller is in unrecoverable state, exit\n"); in mpi3mr_soft_reset_handler()
6325 sc->reset.type = MPI3MR_NO_RESET; in mpi3mr_soft_reset_handler()
6326 sc->reset.reason = MPI3MR_DEFAULT_RESET_REASON; in mpi3mr_soft_reset_handler()
6327 sc->reset.status = -1; in mpi3mr_soft_reset_handler()
6328 sc->reset.ioctl_reset_snapdump = false; in mpi3mr_soft_reset_handler()
6332 if (sc->reset_in_progress) { in mpi3mr_soft_reset_handler()
6333 mpi3mr_dprint(sc, MPI3MR_INFO, "reset is already in progress, exit\n"); in mpi3mr_soft_reset_handler()
6338 xpt_freeze_simq(sc->cam_sc->sim, 1); in mpi3mr_soft_reset_handler()
6340 mpi3mr_cleanup_event_taskq(sc); in mpi3mr_soft_reset_handler()
6342 sc->reset_in_progress = 1; in mpi3mr_soft_reset_handler()
6343 sc->block_ioctls = 1; in mpi3mr_soft_reset_handler()
6345 if (sc->timestamp_thread_active) in mpi3mr_soft_reset_handler()
6346 wakeup(&sc->timestamp_chan); in mpi3mr_soft_reset_handler()
6348 while (mpi3mr_atomic_read(&sc->pend_ioctls) && (i < PEND_IOCTLS_COMP_WAIT_TIME)) { in mpi3mr_soft_reset_handler()
6349 ioc_state = mpi3mr_get_iocstate(sc); in mpi3mr_soft_reset_handler()
6354 mpi3mr_dprint(sc, MPI3MR_INFO, in mpi3mr_soft_reset_handler()
6364 mpi3mr_dprint(sc, MPI3MR_INFO, "Turn off events prior to reset\n"); in mpi3mr_soft_reset_handler()
6367 sc->event_masks[i] = -1; in mpi3mr_soft_reset_handler()
6368 mpi3mr_issue_event_notification(sc); in mpi3mr_soft_reset_handler()
6371 mpi3mr_disable_interrupts(sc); in mpi3mr_soft_reset_handler()
6374 mpi3mr_trigger_snapdump(sc, reset_reason); in mpi3mr_soft_reset_handler()
6376 retval = mpi3mr_issue_reset(sc, in mpi3mr_soft_reset_handler()
6379 mpi3mr_dprint(sc, MPI3MR_ERROR, "Failed to issue soft reset to the ioc\n"); in mpi3mr_soft_reset_handler()
6383 mpi3mr_flush_drv_cmds(sc); in mpi3mr_soft_reset_handler()
6384 mpi3mr_flush_io(sc); in mpi3mr_soft_reset_handler()
6385 mpi3mr_invalidate_devhandles(sc); in mpi3mr_soft_reset_handler()
6386 mpi3mr_memset_buffers(sc); in mpi3mr_soft_reset_handler()
6388 if (sc->prepare_for_reset) { in mpi3mr_soft_reset_handler()
6389 sc->prepare_for_reset = 0; in mpi3mr_soft_reset_handler()
6390 sc->prepare_for_reset_timeout_counter = 0; in mpi3mr_soft_reset_handler()
6393 retval = mpi3mr_initialize_ioc(sc, MPI3MR_INIT_TYPE_RESET); in mpi3mr_soft_reset_handler()
6395 mpi3mr_dprint(sc, MPI3MR_ERROR, "reinit after soft reset failed: reason %d\n", in mpi3mr_soft_reset_handler()
6403 sc->diagsave_timeout = 0; in mpi3mr_soft_reset_handler()
6404 sc->reset_in_progress = 0; in mpi3mr_soft_reset_handler()
6405 mpi3mr_rfresh_tgtdevs(sc); in mpi3mr_soft_reset_handler()
6406 sc->ts_update_counter = 0; in mpi3mr_soft_reset_handler()
6407 sc->block_ioctls = 0; in mpi3mr_soft_reset_handler()
6408 sc->pel_abort_requested = 0; in mpi3mr_soft_reset_handler()
6409 if (sc->pel_wait_pend) { in mpi3mr_soft_reset_handler()
6410 sc->pel_cmds.retry_count = 0; in mpi3mr_soft_reset_handler()
6411 mpi3mr_issue_pel_wait(sc, &sc->pel_cmds); in mpi3mr_soft_reset_handler()
6412 mpi3mr_app_send_aen(sc); in mpi3mr_soft_reset_handler()
6415 ioc_state = mpi3mr_get_iocstate(sc); in mpi3mr_soft_reset_handler()
6417 mpi3mr_issue_reset(sc, in mpi3mr_soft_reset_handler()
6420 sc->unrecoverable = 1; in mpi3mr_soft_reset_handler()
6421 sc->reset_in_progress = 0; in mpi3mr_soft_reset_handler()
6422 sc->block_ioctls = 0; in mpi3mr_soft_reset_handler()
6425 mpi3mr_dprint(sc, MPI3MR_INFO, "Soft Reset: %s\n", ((retval == 0) ? "SUCCESS" : "FAILED")); in mpi3mr_soft_reset_handler()
6427 taskqueue_unblock(sc->cam_sc->ev_tq); in mpi3mr_soft_reset_handler()
6428 xpt_release_simq(sc->cam_sc->sim, 1); in mpi3mr_soft_reset_handler()
6430 sc->reset.type = MPI3MR_NO_RESET; in mpi3mr_soft_reset_handler()
6431 sc->reset.reason = MPI3MR_DEFAULT_RESET_REASON; in mpi3mr_soft_reset_handler()
6432 sc->reset.status = retval; in mpi3mr_soft_reset_handler()
6433 sc->reset.ioctl_reset_snapdump = false; in mpi3mr_soft_reset_handler()
6440 * @sc: Adapter instance reference
6447 static void mpi3mr_issue_ioc_shutdown(struct mpi3mr_softc *sc) in mpi3mr_issue_ioc_shutdown() argument
6453 mpi3mr_dprint(sc, MPI3MR_INFO, "sending shutdown notification\n"); in mpi3mr_issue_ioc_shutdown()
6454 if (sc->unrecoverable) { in mpi3mr_issue_ioc_shutdown()
6455 mpi3mr_dprint(sc, MPI3MR_ERROR, in mpi3mr_issue_ioc_shutdown()
6459 ioc_status = mpi3mr_regread(sc, MPI3_SYSIF_IOC_STATUS_OFFSET); in mpi3mr_issue_ioc_shutdown()
6462 mpi3mr_dprint(sc, MPI3MR_ERROR, "shutdown already in progress\n"); in mpi3mr_issue_ioc_shutdown()
6466 ioc_config = mpi3mr_regread(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET); in mpi3mr_issue_ioc_shutdown()
6470 mpi3mr_regwrite(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET, ioc_config); in mpi3mr_issue_ioc_shutdown()
6472 if (sc->facts.shutdown_timeout) in mpi3mr_issue_ioc_shutdown()
6473 timeout = sc->facts.shutdown_timeout * 10; in mpi3mr_issue_ioc_shutdown()
6476 ioc_status = mpi3mr_regread(sc, MPI3_SYSIF_IOC_STATUS_OFFSET); in mpi3mr_issue_ioc_shutdown()
6483 if (sc->unrecoverable) in mpi3mr_issue_ioc_shutdown()
6487 mpi3mr_print_fault_info(sc); in mpi3mr_issue_ioc_shutdown()
6492 if (mpi3mr_issue_reset(sc, in mpi3mr_issue_ioc_shutdown()
6497 ioc_config = mpi3mr_regread(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET); in mpi3mr_issue_ioc_shutdown()
6501 mpi3mr_regwrite(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET, ioc_config); in mpi3mr_issue_ioc_shutdown()
6503 if (sc->facts.shutdown_timeout) in mpi3mr_issue_ioc_shutdown()
6504 timeout = sc->facts.shutdown_timeout * 10; in mpi3mr_issue_ioc_shutdown()
6513 ioc_status = mpi3mr_regread(sc, MPI3_SYSIF_IOC_STATUS_OFFSET); in mpi3mr_issue_ioc_shutdown()
6514 ioc_config = mpi3mr_regread(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET); in mpi3mr_issue_ioc_shutdown()
6519 mpi3mr_dprint(sc, MPI3MR_ERROR, in mpi3mr_issue_ioc_shutdown()
6523 mpi3mr_dprint(sc, MPI3MR_INFO, in mpi3mr_issue_ioc_shutdown()
6531 * @sc: Adapter instance reference
6538 void mpi3mr_cleanup_ioc(struct mpi3mr_softc *sc) in mpi3mr_cleanup_ioc() argument
6542 mpi3mr_dprint(sc, MPI3MR_INFO, "cleaning up the controller\n"); in mpi3mr_cleanup_ioc()
6543 mpi3mr_disable_interrupts(sc); in mpi3mr_cleanup_ioc()
6545 ioc_state = mpi3mr_get_iocstate(sc); in mpi3mr_cleanup_ioc()
6547 if ((!sc->unrecoverable) && (!sc->reset_in_progress) && in mpi3mr_cleanup_ioc()
6549 if (mpi3mr_mur_ioc(sc, in mpi3mr_cleanup_ioc()
6551 mpi3mr_issue_reset(sc, in mpi3mr_cleanup_ioc()
6554 mpi3mr_issue_ioc_shutdown(sc); in mpi3mr_cleanup_ioc()
6557 mpi3mr_dprint(sc, MPI3MR_INFO, "controller cleanup completed\n"); in mpi3mr_cleanup_ioc()