1 /*-
14  *      - Redistributions of source code must retain the above
18  *      - Redistributions in binary form must reproduce the above
42 	u8 status;  member
48 	spinlock_t lock; /* Protects all members of this struct */  member
57 			   u8 status);
61 	const struct mlx5_fpga_transaction *xfer = xfer_state->xfer;  in xfer_complete()
62 	u8 status = xfer_state->status;  in xfer_complete()  local
65 	xfer->complete1(xfer, status);  in xfer_complete()
68 /* Xfer state spin lock must be locked */
77 	ddr_base = mlx5_fpga_ddr_base_get(xfer_state->xfer->conn->fdev);  in exec_more()
78 	page_size = (xfer_state->xfer->addr + xfer_state->pos < ddr_base) ?  in exec_more()
82 		if (xfer_state->status != IB_WC_SUCCESS) {  in exec_more()
83 			ret = -EIO;  in exec_more()
87 		left = xfer_state->xfer->size - xfer_state->pos;  in exec_more()
93 			ret = -ENOMEM;  in exec_more()
97 		pos_addr = xfer_state->xfer->addr + xfer_state->pos;  in exec_more()
98 		pos_data = xfer_state->xfer->data + xfer_state->pos;  in exec_more()
101 		cur_size = page_size - (pos_addr & (page_size - 1));  in exec_more()
107 		xfer_trans->xfer_state = xfer_state;  in exec_more()
108 		xfer_trans->transaction.addr = pos_addr;  in exec_more()
109 		xfer_trans->transaction.complete1 = trans_complete;  in exec_more()
110 		xfer_trans->transaction.conn = xfer_state->xfer->conn;  in exec_more()
111 		xfer_trans->transaction.data = pos_data;  in exec_more()
112 		xfer_trans->transaction.direction = xfer_state->xfer->direction;  in exec_more()
113 		xfer_trans->transaction.size = cur_size;  in exec_more()
115 		xfer_state->start_count++;  in exec_more()
116 		xfer_state->inflight_count++;  in exec_more()
117 …mlx5_fpga_dbg(xfer_state->xfer->conn->fdev, "Starting %zu bytes at %p done; %u started %u inflight…  in exec_more()
118 			      xfer_trans->transaction.size,  in exec_more()
119 			      xfer_trans->transaction.data,  in exec_more()
120 			      xfer_state->start_count,  in exec_more()
121 			      xfer_state->inflight_count,  in exec_more()
122 			      xfer_state->done_count,  in exec_more()
123 			      xfer_state->error_count);  in exec_more()
124 		ret = mlx5_fpga_trans_exec(&xfer_trans->transaction);  in exec_more()
126 			xfer_state->start_count--;  in exec_more()
127 			xfer_state->inflight_count--;  in exec_more()
128 			if (ret == -EBUSY)  in exec_more()
132 …mlx5_fpga_warn(xfer_state->xfer->conn->fdev, "Transfer failed to start transaction: %d. %u started…  in exec_more()
133 					       ret, xfer_state->start_count,  in exec_more()
134 					       xfer_state->done_count,  in exec_more()
135 					       xfer_state->error_count);  in exec_more()
136 				xfer_state->status = IB_WC_GENERAL_ERR;  in exec_more()
141 		xfer_state->pos += cur_size;  in exec_more()
142 		if (xfer_state->inflight_count >= xfer_state->budget)  in exec_more()
150 			   u8 status)  in trans_complete()  argument
160 	xfer_state = xfer_trans->xfer_state;  in trans_complete()
161 …mlx5_fpga_dbg(complete->conn->fdev, "Transaction %zu bytes at %p done, status %u; %u started %u in…  in trans_complete()
162 		      xfer_trans->transaction.size,  in trans_complete()
163 		      xfer_trans->transaction.data, status,  in trans_complete()
164 		      xfer_state->start_count, xfer_state->inflight_count,  in trans_complete()
165 		      xfer_state->done_count, xfer_state->error_count);  in trans_complete()
168 	spin_lock_irqsave(&xfer_state->lock, flags);  in trans_complete()
170 	if (status != IB_WC_SUCCESS) {  in trans_complete()
171 		xfer_state->error_count++;  in trans_complete()
172 …mlx5_fpga_warn(complete->conn->fdev, "Transaction failed during transfer. %u started %u inflight %…  in trans_complete()
173 			       xfer_state->start_count,  in trans_complete()
174 			       xfer_state->inflight_count,  in trans_complete()
175 			       xfer_state->done_count, xfer_state->error_count);  in trans_complete()
176 		if (xfer_state->status == IB_WC_SUCCESS)  in trans_complete()
177 			xfer_state->status = status;  in trans_complete()
179 		xfer_state->done_count++;  in trans_complete()
183 	xfer_state->inflight_count--;  in trans_complete()
184 	if (!xfer_state->inflight_count)  in trans_complete()
187 	spin_unlock_irqrestore(&xfer_state->lock, flags);  in trans_complete()
195 	u64 base = mlx5_fpga_ddr_base_get(xfer->conn->fdev);  in mlx5_fpga_xfer_exec()
196 	u64 size = mlx5_fpga_ddr_size_get(xfer->conn->fdev);  in mlx5_fpga_xfer_exec()
202 	if (xfer->addr + xfer->size > base + size) {  in mlx5_fpga_xfer_exec()
203 		mlx5_fpga_warn(xfer->conn->fdev, "Transfer ends at %jx outside of DDR range %jx\n",  in mlx5_fpga_xfer_exec()
204 			       (uintmax_t)(xfer->addr + xfer->size), (uintmax_t)(base + size));  in mlx5_fpga_xfer_exec()
205 		return -EINVAL;  in mlx5_fpga_xfer_exec()
208 	if (xfer->addr & MLX5_FPGA_TRANSACTION_SEND_ALIGN_BITS) {  in mlx5_fpga_xfer_exec()
209 		mlx5_fpga_warn(xfer->conn->fdev, "Transfer address %jx not aligned\n",  in mlx5_fpga_xfer_exec()
210 			       (uintmax_t)xfer->addr);  in mlx5_fpga_xfer_exec()
211 		return -EINVAL;  in mlx5_fpga_xfer_exec()
214 	if (xfer->size & MLX5_FPGA_TRANSACTION_SEND_ALIGN_BITS) {  in mlx5_fpga_xfer_exec()
215 		mlx5_fpga_warn(xfer->conn->fdev, "Transfer size %zu not aligned\n",  in mlx5_fpga_xfer_exec()
216 			       xfer->size);  in mlx5_fpga_xfer_exec()
217 		return -EINVAL;  in mlx5_fpga_xfer_exec()
220 	if (xfer->size < 1) {  in mlx5_fpga_xfer_exec()
221 		mlx5_fpga_warn(xfer->conn->fdev, "Empty transfer size %zu not allowed\n",  in mlx5_fpga_xfer_exec()
222 			       xfer->size);  in mlx5_fpga_xfer_exec()
223 		return -EINVAL;  in mlx5_fpga_xfer_exec()
227 	xfer_state->xfer = xfer;  in mlx5_fpga_xfer_exec()
228 	xfer_state->status = IB_WC_SUCCESS;  in mlx5_fpga_xfer_exec()
229 	xfer_state->budget = 7;  in mlx5_fpga_xfer_exec()
230 	spin_lock_init(&xfer_state->lock);  in mlx5_fpga_xfer_exec()
231 	spin_lock_irqsave(&xfer_state->lock, flags);  in mlx5_fpga_xfer_exec()
234 	if (ret && (xfer_state->start_count == 0))  in mlx5_fpga_xfer_exec()
237 	spin_unlock_irqrestore(&xfer_state->lock, flags);  in mlx5_fpga_xfer_exec()