Lines Matching +full:lock +full:- +full:status

1 /*-
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
47 u8 status; member
54 spinlock_t lock; /* Protects all members of this struct */ member
66 return &fdev->trans->transactions[tid]; in find_tid()
74 spin_lock_irqsave(&fdev->trans->lock, flags); in alloc_tid()
76 if (list_empty(&fdev->trans->free_queue)) { in alloc_tid()
82 ret = list_first_entry(&fdev->trans->free_queue, in alloc_tid()
84 list_del(&ret->list_item); in alloc_tid()
86 ret->state = TRANS_STATE_NONE; in alloc_tid()
88 spin_unlock_irqrestore(&fdev->trans->lock, flags); in alloc_tid()
97 spin_lock_irqsave(&fdev->trans->lock, flags); in free_tid()
98 list_add_tail(&trans_priv->list_item, &fdev->trans->free_queue); in free_tid()
99 spin_unlock_irqrestore(&fdev->trans->lock, flags); in free_tid()
103 struct mlx5_fpga_trans_priv *trans_priv, u8 status) in trans_complete() argument
108 mlx5_fpga_dbg(fdev, "Transaction %u is complete with status %u\n", in trans_complete()
109 trans_priv->tid, status); in trans_complete()
111 spin_lock_irqsave(&fdev->trans->lock, flags); in trans_complete()
112 trans_priv->state = TRANS_STATE_COMPLETE; in trans_complete()
113 trans_priv->status = status; in trans_complete()
114 spin_unlock_irqrestore(&fdev->trans->lock, flags); in trans_complete()
116 user_trans = trans_priv->user_trans; in trans_complete()
119 if (user_trans->complete1) in trans_complete()
120 user_trans->complete1(user_trans, status); in trans_complete()
125 struct mlx5_fpga_dma_buf *buf, u8 status) in trans_send_complete() argument
131 mlx5_fpga_dbg(fdev, "send complete tid %u. Status: %u\n", in trans_send_complete()
132 trans_priv->tid, status); in trans_send_complete()
133 if (status) { in trans_send_complete()
134 trans_complete(fdev, trans_priv, status); in trans_send_complete()
138 spin_lock_irqsave(&fdev->trans->lock, flags); in trans_send_complete()
139 if (trans_priv->state == TRANS_STATE_SEND) in trans_send_complete()
140 trans_priv->state = TRANS_STATE_WAIT; in trans_send_complete()
141 spin_unlock_irqrestore(&fdev->trans->lock, flags); in trans_send_complete()
149 return -EINVAL; in trans_validate()
154 return -EINVAL; in trans_validate()
159 return -EINVAL; in trans_validate()
164 return -EINVAL; in trans_validate()
167 ((addr + size - 1) >> MLX5_FPGA_TRANSACTION_SEND_PAGE_BITS)) { in trans_validate()
170 return -EINVAL; in trans_validate()
174 …mlx5_fpga_warn(fdev, "Cannot access %zu bytes at cr-space address %jx. Must access a single dword\… in trans_validate()
176 return -EINVAL; in trans_validate()
184 struct mlx5_fpga_conn *conn = trans->conn; in mlx5_fpga_trans_exec()
189 if (!trans->complete1) { in mlx5_fpga_trans_exec()
190 mlx5_fpga_warn(conn->fdev, "Transaction must have a completion callback\n"); in mlx5_fpga_trans_exec()
191 err = -EINVAL; in mlx5_fpga_trans_exec()
195 err = trans_validate(conn->fdev, trans->addr, trans->size); in mlx5_fpga_trans_exec()
199 trans_priv = alloc_tid(conn->fdev); in mlx5_fpga_trans_exec()
201 err = -EBUSY; in mlx5_fpga_trans_exec()
204 trans_priv->user_trans = trans; in mlx5_fpga_trans_exec()
205 header = trans_priv->header; in mlx5_fpga_trans_exec()
207 memset(header, 0, sizeof(trans_priv->header)); in mlx5_fpga_trans_exec()
208 memset(&trans_priv->buf, 0, sizeof(trans_priv->buf)); in mlx5_fpga_trans_exec()
210 (trans->direction == MLX5_FPGA_WRITE) ? in mlx5_fpga_trans_exec()
213 MLX5_SET(fpga_shell_qp_packet, header, tid, trans_priv->tid); in mlx5_fpga_trans_exec()
214 MLX5_SET(fpga_shell_qp_packet, header, len, trans->size); in mlx5_fpga_trans_exec()
215 MLX5_SET64(fpga_shell_qp_packet, header, address, trans->addr); in mlx5_fpga_trans_exec()
217 trans_priv->buf.sg[0].data = header; in mlx5_fpga_trans_exec()
218 trans_priv->buf.sg[0].size = sizeof(trans_priv->header); in mlx5_fpga_trans_exec()
219 if (trans->direction == MLX5_FPGA_WRITE) { in mlx5_fpga_trans_exec()
220 trans_priv->buf.sg[1].data = trans->data; in mlx5_fpga_trans_exec()
221 trans_priv->buf.sg[1].size = trans->size; in mlx5_fpga_trans_exec()
224 trans_priv->buf.complete = trans_send_complete; in mlx5_fpga_trans_exec()
225 trans_priv->state = TRANS_STATE_SEND; in mlx5_fpga_trans_exec()
229 err = mlx5_fpga_conn_send(conn->fdev->shell_conn, &trans_priv->buf); in mlx5_fpga_trans_exec()
238 free_tid(conn->fdev, trans_priv); in mlx5_fpga_trans_exec()
248 u8 status = 0; in mlx5_fpga_trans_recv() local
252 buf->sg[0].size); in mlx5_fpga_trans_recv()
254 if (buf->sg[0].size < MLX5_ST_SZ_BYTES(fpga_shell_qp_packet)) { in mlx5_fpga_trans_recv()
256 buf->sg[0].size); in mlx5_fpga_trans_recv()
259 payload_len = buf->sg[0].size - MLX5_ST_SZ_BYTES(fpga_shell_qp_packet); in mlx5_fpga_trans_recv()
261 tid = MLX5_GET(fpga_shell_qp_packet, buf->sg[0].data, tid); in mlx5_fpga_trans_recv()
266 type = MLX5_GET(fpga_shell_qp_packet, buf->sg[0].data, type); in mlx5_fpga_trans_recv()
269 if (trans_priv->user_trans->direction != MLX5_FPGA_READ) { in mlx5_fpga_trans_recv()
271 type, trans_priv->user_trans->direction); in mlx5_fpga_trans_recv()
272 status = -EIO; in mlx5_fpga_trans_recv()
275 if (payload_len != trans_priv->user_trans->size) { in mlx5_fpga_trans_recv()
278 trans_priv->user_trans->size); in mlx5_fpga_trans_recv()
281 memcpy(trans_priv->user_trans->data, in mlx5_fpga_trans_recv()
282 MLX5_ADDR_OF(fpga_shell_qp_packet, buf->sg[0].data, in mlx5_fpga_trans_recv()
286 if (trans_priv->user_trans->direction != MLX5_FPGA_WRITE) { in mlx5_fpga_trans_recv()
288 type, trans_priv->user_trans->direction); in mlx5_fpga_trans_recv()
289 status = -EIO; in mlx5_fpga_trans_recv()
295 type, buf->sg[0].size); in mlx5_fpga_trans_recv()
296 status = -EIO; in mlx5_fpga_trans_recv()
301 trans_complete(fdev, trans_priv, status); in mlx5_fpga_trans_recv()
311 fdev->trans = kzalloc(sizeof(*fdev->trans), GFP_KERNEL); in mlx5_fpga_trans_device_init()
312 if (!fdev->trans) { in mlx5_fpga_trans_device_init()
313 ret = -ENOMEM; in mlx5_fpga_trans_device_init()
317 INIT_LIST_HEAD(&fdev->trans->free_queue); in mlx5_fpga_trans_device_init()
318 for (tid = 0; tid < ARRAY_SIZE(fdev->trans->transactions); tid++) { in mlx5_fpga_trans_device_init()
319 fdev->trans->transactions[tid].tid = tid; in mlx5_fpga_trans_device_init()
320 list_add_tail(&fdev->trans->transactions[tid].list_item, in mlx5_fpga_trans_device_init()
321 &fdev->trans->free_queue); in mlx5_fpga_trans_device_init()
324 spin_lock_init(&fdev->trans->lock); in mlx5_fpga_trans_device_init()
332 kfree(fdev->trans); in mlx5_fpga_trans_device_cleanup()