53 mlx5_fpga_sbu_conn_create(struct mlx5_fpga_device *fdev,  in mlx5_fpga_sbu_conn_create()  argument
58 	return mlx5_fpga_conn_create(fdev, attr, MLX5_FPGA_QPC_QP_TYPE_SANDBOX_QP);  in mlx5_fpga_sbu_conn_create()
91 	mlx5_fpga_dbg(complete->conn->fdev,  in mem_complete()
99 static int mem_transaction(struct mlx5_fpga_device *fdev, size_t size, u64 addr,  in mem_transaction()  argument
105 	if (!fdev->shell_conn) {  in mem_transaction()
113 	xfer.t.conn = fdev->shell_conn;  in mem_transaction()
119 		mlx5_fpga_dbg(fdev, "Transfer execution failed: %d\n", ret);  in mem_transaction()
130 static int mlx5_fpga_mem_read_i2c(struct mlx5_fpga_device *fdev, size_t size,  in mlx5_fpga_mem_read_i2c()  argument
141 	if (!fdev->mdev)  in mlx5_fpga_mem_read_i2c()
147 		err = mlx5_fpga_access_reg(fdev->mdev, actual_size,  in mlx5_fpga_mem_read_i2c()
151 			mlx5_fpga_err(fdev, "Failed to read over I2C: %d\n",  in mlx5_fpga_mem_read_i2c()
162 static int mlx5_fpga_mem_write_i2c(struct mlx5_fpga_device *fdev, size_t size,  in mlx5_fpga_mem_write_i2c()  argument
173 	if (!fdev->mdev)  in mlx5_fpga_mem_write_i2c()
179 		err = mlx5_fpga_access_reg(fdev->mdev, actual_size,  in mlx5_fpga_mem_write_i2c()
183 			mlx5_fpga_err(fdev, "Failed to write FPGA crspace\n");  in mlx5_fpga_mem_write_i2c()
193 int mlx5_fpga_mem_read(struct mlx5_fpga_device *fdev, size_t size, u64 addr,  in mlx5_fpga_mem_read()  argument
199 		access_type = fdev->shell_conn ? MLX5_FPGA_ACCESS_TYPE_RDMA :  in mlx5_fpga_mem_read()
202 	mlx5_fpga_dbg(fdev, "Reading %zu bytes at 0x%jx over %s",  in mlx5_fpga_mem_read()
207 		ret = mem_transaction(fdev, size, addr, buf, MLX5_FPGA_READ);  in mlx5_fpga_mem_read()
212 		ret = mlx5_fpga_mem_read_i2c(fdev, size, addr, buf);  in mlx5_fpga_mem_read()
217 		mlx5_fpga_warn(fdev, "Unexpected read access_type %u\n",  in mlx5_fpga_mem_read()
226 int mlx5_fpga_mem_write(struct mlx5_fpga_device *fdev, size_t size, u64 addr,  in mlx5_fpga_mem_write()  argument
232 		access_type = fdev->shell_conn ? MLX5_FPGA_ACCESS_TYPE_RDMA :  in mlx5_fpga_mem_write()
235 	mlx5_fpga_dbg(fdev, "Writing %zu bytes at 0x%jx over %s",  in mlx5_fpga_mem_write()
240 		ret = mem_transaction(fdev, size, addr, buf, MLX5_FPGA_WRITE);  in mlx5_fpga_mem_write()
245 		ret = mlx5_fpga_mem_write_i2c(fdev, size, addr, buf);  in mlx5_fpga_mem_write()
250 		mlx5_fpga_warn(fdev, "Unexpected write access_type %u\n",  in mlx5_fpga_mem_write()
259 int mlx5_fpga_get_sbu_caps(struct mlx5_fpga_device *fdev, int size, void *buf)  in mlx5_fpga_get_sbu_caps()  argument
261 	return mlx5_fpga_sbu_caps(fdev->mdev, buf, size);  in mlx5_fpga_get_sbu_caps()
265 u64 mlx5_fpga_ddr_size_get(struct mlx5_fpga_device *fdev)  in mlx5_fpga_ddr_size_get()  argument
267 	return (u64)MLX5_CAP_FPGA(fdev->mdev, fpga_ddr_size) << 10;  in mlx5_fpga_ddr_size_get()
271 u64 mlx5_fpga_ddr_base_get(struct mlx5_fpga_device *fdev)  in mlx5_fpga_ddr_base_get()  argument
273 	return MLX5_CAP64_FPGA(fdev->mdev, fpga_ddr_start_addr);  in mlx5_fpga_ddr_base_get()
277 void mlx5_fpga_client_data_set(struct mlx5_fpga_device *fdev,  in mlx5_fpga_client_data_set()  argument
282 	list_for_each_entry(context, &fdev->client_data_list, list) {  in mlx5_fpga_client_data_set()
289 	mlx5_fpga_warn(fdev, "No client context found for %s\n", client->name);  in mlx5_fpga_client_data_set()
293 void *mlx5_fpga_client_data_get(struct mlx5_fpga_device *fdev,  in mlx5_fpga_client_data_get()  argument
299 	list_for_each_entry(context, &fdev->client_data_list, list) {  in mlx5_fpga_client_data_get()
305 	mlx5_fpga_warn(fdev, "No client context found for %s\n", client->name);  in mlx5_fpga_client_data_get()
312 void mlx5_fpga_device_query(struct mlx5_fpga_device *fdev,  in mlx5_fpga_device_query()  argument
317 	spin_lock_irqsave(&fdev->state_lock, flags);  in mlx5_fpga_device_query()
318 	query->image_status = fdev->image_status;  in mlx5_fpga_device_query()
319 	query->admin_image = fdev->last_admin_image;  in mlx5_fpga_device_query()
320 	query->oper_image = fdev->last_oper_image;  in mlx5_fpga_device_query()
321 	spin_unlock_irqrestore(&fdev->state_lock, flags);  in mlx5_fpga_device_query()
325 static int mlx5_fpga_device_reload_cmd(struct mlx5_fpga_device *fdev)  in mlx5_fpga_device_reload_cmd()  argument
327 	struct mlx5_core_dev *mdev = fdev->mdev;  in mlx5_fpga_device_reload_cmd()
332 	mlx5_fpga_info(fdev, "mlx5/fpga - reload started\n");  in mlx5_fpga_device_reload_cmd()
333 	fdev->fdev_state = MLX5_FDEV_STATE_IN_PROGRESS;  in mlx5_fpga_device_reload_cmd()
334 	reinit_completion(&fdev->load_event);  in mlx5_fpga_device_reload_cmd()
337 		mlx5_fpga_err(fdev, "Failed to request reload: %d\n",  in mlx5_fpga_device_reload_cmd()
342 	err = wait_for_completion_timeout(&fdev->load_event,  in mlx5_fpga_device_reload_cmd()
345 		mlx5_fpga_err(fdev, "Failed waiting for reload: %d\n", err);  in mlx5_fpga_device_reload_cmd()
346 		fdev->fdev_state = MLX5_FDEV_STATE_FAILURE;  in mlx5_fpga_device_reload_cmd()
352 		mlx5_fpga_err(fdev, "Failed load check for reload: %d\n", err);  in mlx5_fpga_device_reload_cmd()
353 		fdev->fdev_state = MLX5_FDEV_STATE_FAILURE;  in mlx5_fpga_device_reload_cmd()
356 	spin_lock_irqsave(&fdev->state_lock, flags);  in mlx5_fpga_device_reload_cmd()
357 	fdev->fdev_state = MLX5_FDEV_STATE_SUCCESS;  in mlx5_fpga_device_reload_cmd()
358 	spin_unlock_irqrestore(&fdev->state_lock, flags);  in mlx5_fpga_device_reload_cmd()
359 	mlx5_fpga_info(fdev, "mlx5/fpga - reload ended\n");  in mlx5_fpga_device_reload_cmd()
364 int mlx5_fpga_device_reload(struct mlx5_fpga_device *fdev,  in mlx5_fpga_device_reload()  argument
367 	struct mlx5_core_dev *mdev = fdev->mdev;  in mlx5_fpga_device_reload()
372 	spin_lock_irqsave(&fdev->state_lock, flags);  in mlx5_fpga_device_reload()
373 	switch (fdev->fdev_state) {  in mlx5_fpga_device_reload()
385 	spin_unlock_irqrestore(&fdev->state_lock, flags);  in mlx5_fpga_device_reload()
392 		err = mlx5_fpga_device_reload_cmd(fdev);  in mlx5_fpga_device_reload()
402 	fdev->fdev_state = MLX5_FDEV_STATE_IN_PROGRESS;  in mlx5_fpga_device_reload()
403 	reinit_completion(&fdev->load_event);  in mlx5_fpga_device_reload()
406 		mlx5_fpga_info(fdev, "Loading from flash\n");  in mlx5_fpga_device_reload()
409 			mlx5_fpga_err(fdev, "Failed to request load: %d\n",  in mlx5_fpga_device_reload()
414 		mlx5_fpga_info(fdev, "Resetting\n");  in mlx5_fpga_device_reload()
417 			mlx5_fpga_err(fdev, "Failed to request reset: %d\n",  in mlx5_fpga_device_reload()
422 		mlx5_fpga_err(fdev, "Unknown command: %d\n",  in mlx5_fpga_device_reload()
428 	err = wait_for_completion_timeout(&fdev->load_event, timeout - jiffies);  in mlx5_fpga_device_reload()
430 		mlx5_fpga_err(fdev, "Failed waiting for FPGA load: %d\n", err);  in mlx5_fpga_device_reload()
431 		fdev->fdev_state = MLX5_FDEV_STATE_FAILURE;  in mlx5_fpga_device_reload()
449 		fdev->fdev_state = MLX5_FDEV_STATE_FAILURE;  in mlx5_fpga_device_reload()
466 int mlx5_fpga_flash_select(struct mlx5_fpga_device *fdev,  in mlx5_fpga_flash_select()  argument
472 	spin_lock_irqsave(&fdev->state_lock, flags);  in mlx5_fpga_flash_select()
473 	switch (fdev->fdev_state) {  in mlx5_fpga_flash_select()
475 		spin_unlock_irqrestore(&fdev->state_lock, flags);  in mlx5_fpga_flash_select()
483 	spin_unlock_irqrestore(&fdev->state_lock, flags);  in mlx5_fpga_flash_select()
485 	err = mlx5_fpga_image_select(fdev->mdev, image);  in mlx5_fpga_flash_select()
487 		mlx5_fpga_err(fdev, "Failed to select flash image: %d\n", err);  in mlx5_fpga_flash_select()
489 		fdev->last_admin_image = image;  in mlx5_fpga_flash_select()
494 int mlx5_fpga_connectdisconnect(struct mlx5_fpga_device *fdev,  in mlx5_fpga_connectdisconnect()  argument
500 	spin_lock_irqsave(&fdev->state_lock, flags);  in mlx5_fpga_connectdisconnect()
501 	switch (fdev->fdev_state) {  in mlx5_fpga_connectdisconnect()
503 		spin_unlock_irqrestore(&fdev->state_lock, flags);  in mlx5_fpga_connectdisconnect()
511 	spin_unlock_irqrestore(&fdev->state_lock, flags);  in mlx5_fpga_connectdisconnect()
513 	err = mlx5_fpga_ctrl_connect(fdev->mdev, connect);  in mlx5_fpga_connectdisconnect()
515 		mlx5_fpga_err(fdev, "Failed to connect/disconnect: %d\n", err);  in mlx5_fpga_connectdisconnect()
520 int mlx5_fpga_temperature(struct mlx5_fpga_device *fdev,  in mlx5_fpga_temperature()  argument
523 	return mlx5_fpga_query_mtmp(fdev->mdev, temp);  in mlx5_fpga_temperature()
527 struct device *mlx5_fpga_dev(struct mlx5_fpga_device *fdev)  in mlx5_fpga_dev()  argument
529 	return &fdev->mdev->pdev->dev;  in mlx5_fpga_dev()
533 void mlx5_fpga_get_cap(struct mlx5_fpga_device *fdev, u32 *fpga_caps)  in mlx5_fpga_get_cap()  argument
537 	spin_lock_irqsave(&fdev->state_lock, flags);  in mlx5_fpga_get_cap()
538 	memcpy(fpga_caps, &fdev->mdev->caps.fpga, sizeof(fdev->mdev->caps.fpga));  in mlx5_fpga_get_cap()
539 	spin_unlock_irqrestore(&fdev->state_lock, flags);  in mlx5_fpga_get_cap()