60 		mlx5_cqwq_pop(&iq->cq.wq);  in mlx5e_iq_poll()
62 		ci = iqcc & iq->wq.sz_m1;  in mlx5e_iq_poll()
84 	mlx5_cqwq_update_db_record(&iq->cq.wq);  in mlx5e_iq_poll()
106 	u16 pi = iq->pc & iq->wq.sz_m1;  in mlx5e_iq_send_nop()
107 	struct mlx5e_tx_wqe *wqe = mlx5_wq_cyc_get_wqe(&iq->wq, pi);  in mlx5e_iq_send_nop()
130 	int wq_sz = mlx5_wq_cyc_get_size(&iq->wq);  in mlx5e_iq_free_db()
154 	int wq_sz = mlx5_wq_cyc_get_size(&iq->wq);  in mlx5e_iq_alloc_db()
182 	void *sqc_wq = MLX5_ADDR_OF(sqc, sqc, wq);  in mlx5e_iq_create()
204 	err = mlx5_wq_cyc_create(mdev, &param->wq, sqc_wq,  in mlx5e_iq_create()
205 	    &iq->wq, &iq->wq_ctrl);  in mlx5e_iq_create()
209 	iq->wq.db = &iq->wq.db[MLX5_SND_DBR];  in mlx5e_iq_create()
240 	void *wq;  in mlx5e_iq_enable()  local
255 	wq = MLX5_ADDR_OF(sqc, sqc, wq);  in mlx5e_iq_enable()
277 	MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC);  in mlx5e_iq_enable()
278 	MLX5_SET(wq, wq, uar_page, bfreg->index);  in mlx5e_iq_enable()
279 	MLX5_SET(wq, wq, log_wq_pg_sz, iq->wq_ctrl.buf.page_shift -  in mlx5e_iq_enable()
281 	MLX5_SET64(wq, wq, dbr_addr, iq->wq_ctrl.db.dma);  in mlx5e_iq_enable()
284 	    (__be64 *) MLX5_ADDR_OF(wq, wq, pas));  in mlx5e_iq_enable()
450 	*iq->wq.db = cpu_to_be32(iq->pc);  in mlx5e_iq_notify_hw()
470         return ((iq->wq.sz_m1 & (cc - pc)) >= n || cc == pc);  in mlx5e_iq_has_room_for()
486 	pi = ((~iq->pc) & iq->wq.sz_m1);  in mlx5e_iq_get_producer_index()
490 		pi = ((~iq->pc) & iq->wq.sz_m1);  in mlx5e_iq_get_producer_index()
494 	return (iq->pc & iq->wq.sz_m1);  in mlx5e_iq_get_producer_index()