Lines Matching refs:val
137 int val; in rlswitch_attach() local
140 val = 0; in rlswitch_attach()
141 val |= 0 << 10; /* enable 802.1q VLAN Tag support */ in rlswitch_attach()
142 val |= 0 << 9; /* enable VLAN ingress filtering */ in rlswitch_attach()
143 val |= 1 << 8; /* disable VLAN tag admit control */ in rlswitch_attach()
144 val |= 1 << 6; /* internal use */ in rlswitch_attach()
145 val |= 1 << 5; /* internal use */ in rlswitch_attach()
146 val |= 1 << 4; /* internal use */ in rlswitch_attach()
147 val |= 1 << 3; /* internal use */ in rlswitch_attach()
148 val |= 1 << 1; /* reserved */ in rlswitch_attach()
149 MIIBUS_WRITEREG(sc->mii_dev, 0, 16, val); in rlswitch_attach()
152 val = 0; in rlswitch_attach()
153 val |= 1 << 15; /* reserved */ in rlswitch_attach()
154 val |= 0 << 14; /* enable 1552 Bytes support */ in rlswitch_attach()
155 val |= 1 << 13; /* enable broadcast input drop */ in rlswitch_attach()
156 val |= 1 << 12; /* forward reserved control frames */ in rlswitch_attach()
157 val |= 1 << 11; /* disable forwarding unicast frames to other VLAN's */ in rlswitch_attach()
158 val |= 1 << 10; /* disable forwarding ARP broadcasts to other VLAN's */ in rlswitch_attach()
159 val |= 1 << 9; /* enable 48 pass 1 */ in rlswitch_attach()
160 val |= 0 << 8; /* enable VLAN */ in rlswitch_attach()
161 val |= 1 << 7; /* reserved */ in rlswitch_attach()
162 val |= 1 << 6; /* enable defer */ in rlswitch_attach()
163 val |= 1 << 5; /* 43ms LED blink time */ in rlswitch_attach()
164 val |= 3 << 3; /* 16:1 queue weight */ in rlswitch_attach()
165 val |= 1 << 2; /* disable broadcast storm control */ in rlswitch_attach()
166 val |= 1 << 1; /* enable power-on LED blinking */ in rlswitch_attach()
167 val |= 1 << 0; /* reserved */ in rlswitch_attach()
168 MIIBUS_WRITEREG(sc->mii_dev, 0, 18, val); in rlswitch_attach()
171 val = 0; in rlswitch_attach()
172 val |= 1 << 15; /* reserved */ in rlswitch_attach()
173 val |= 1 << 11; /* drop received packets with wrong VLAN tag */ in rlswitch_attach()
174 val |= 1 << 10; /* disable 802.1p priority classification */ in rlswitch_attach()
175 val |= 1 << 9; /* disable diffserv priority classification */ in rlswitch_attach()
176 val |= 1 << 6; /* internal use */ in rlswitch_attach()
177 val |= 3 << 4; /* internal use */ in rlswitch_attach()
178 val |= 1 << 3; /* internal use */ in rlswitch_attach()
179 val |= 1 << 2; /* internal use */ in rlswitch_attach()
180 val |= 1 << 0; /* remove VLAN tags on output */ in rlswitch_attach()
181 MIIBUS_WRITEREG(sc->mii_dev, 0, 22, val); in rlswitch_attach()
184 val = 0; in rlswitch_attach()
185 val |= 1 << 15; /* reserved */ in rlswitch_attach()
186 val |= 1 << 11; /* drop received packets with wrong VLAN tag */ in rlswitch_attach()
187 val |= 1 << 10; /* disable 802.1p priority classification */ in rlswitch_attach()
188 val |= 1 << 9; /* disable diffserv priority classification */ in rlswitch_attach()
189 val |= 1 << 6; /* internal use */ in rlswitch_attach()
190 val |= 3 << 4; /* internal use */ in rlswitch_attach()
191 val |= 1 << 3; /* internal use */ in rlswitch_attach()
192 val |= 1 << 2; /* internal use */ in rlswitch_attach()
193 val |= 1 << 0; /* remove VLAN tags on output */ in rlswitch_attach()
194 MIIBUS_WRITEREG(sc->mii_dev, 1, 22, val); in rlswitch_attach()
197 val = 0; in rlswitch_attach()
198 val |= 1 << 15; /* reserved */ in rlswitch_attach()
199 val |= 1 << 11; /* drop received packets with wrong VLAN tag */ in rlswitch_attach()
200 val |= 1 << 10; /* disable 802.1p priority classification */ in rlswitch_attach()
201 val |= 1 << 9; /* disable diffserv priority classification */ in rlswitch_attach()
202 val |= 1 << 6; /* internal use */ in rlswitch_attach()
203 val |= 3 << 4; /* internal use */ in rlswitch_attach()
204 val |= 1 << 3; /* internal use */ in rlswitch_attach()
205 val |= 1 << 2; /* internal use */ in rlswitch_attach()
206 val |= 1 << 0; /* remove VLAN tags on output */ in rlswitch_attach()
207 MIIBUS_WRITEREG(sc->mii_dev, 2, 22, val); in rlswitch_attach()
210 val = 0; in rlswitch_attach()
211 val |= 1 << 15; /* reserved */ in rlswitch_attach()
212 val |= 1 << 11; /* drop received packets with wrong VLAN tag */ in rlswitch_attach()
213 val |= 1 << 10; /* disable 802.1p priority classification */ in rlswitch_attach()
214 val |= 1 << 9; /* disable diffserv priority classification */ in rlswitch_attach()
215 val |= 1 << 6; /* internal use */ in rlswitch_attach()
216 val |= 3 << 4; /* internal use */ in rlswitch_attach()
217 val |= 1 << 3; /* internal use */ in rlswitch_attach()
218 val |= 1 << 2; /* internal use */ in rlswitch_attach()
219 val |= 1 << 0; /* remove VLAN tags on output */ in rlswitch_attach()
220 MIIBUS_WRITEREG(sc->mii_dev, 3, 22, val); in rlswitch_attach()
223 val = 0; in rlswitch_attach()
224 val |= 1 << 15; /* reserved */ in rlswitch_attach()
225 val |= 0 << 11; /* don't drop received packets with wrong VLAN tag */ in rlswitch_attach()
226 val |= 1 << 10; /* disable 802.1p priority classification */ in rlswitch_attach()
227 val |= 1 << 9; /* disable diffserv priority classification */ in rlswitch_attach()
228 val |= 1 << 6; /* internal use */ in rlswitch_attach()
229 val |= 3 << 4; /* internal use */ in rlswitch_attach()
230 val |= 1 << 3; /* internal use */ in rlswitch_attach()
231 val |= 1 << 2; /* internal use */ in rlswitch_attach()
232 val |= 2 << 0; /* add VLAN tags for untagged packets on output */ in rlswitch_attach()
233 MIIBUS_WRITEREG(sc->mii_dev, 4, 22, val); in rlswitch_attach()
236 val = 0; in rlswitch_attach()
237 val |= 0x0 << 12; /* Port 0 VLAN Index */ in rlswitch_attach()
238 val |= 1 << 11; /* internal use */ in rlswitch_attach()
239 val |= 1 << 10; /* internal use */ in rlswitch_attach()
240 val |= 1 << 9; /* internal use */ in rlswitch_attach()
241 val |= 1 << 7; /* internal use */ in rlswitch_attach()
242 val |= 1 << 6; /* internal use */ in rlswitch_attach()
243 val |= 0x11 << 0; /* VLAN A membership */ in rlswitch_attach()
244 MIIBUS_WRITEREG(sc->mii_dev, 0, 24, val); in rlswitch_attach()
247 val = 0; in rlswitch_attach()
248 val |= 1 << 15; /* internal use */ in rlswitch_attach()
249 val |= 1 << 14; /* internal use */ in rlswitch_attach()
250 val |= 1 << 13; /* internal use */ in rlswitch_attach()
251 val |= 1 << 12; /* internal use */ in rlswitch_attach()
252 val |= 0x100 << 0; /* VLAN A ID */ in rlswitch_attach()
253 MIIBUS_WRITEREG(sc->mii_dev, 0, 25, val); in rlswitch_attach()
256 val = 0; in rlswitch_attach()
257 val |= 0x1 << 12; /* Port 1 VLAN Index */ in rlswitch_attach()
258 val |= 1 << 11; /* internal use */ in rlswitch_attach()
259 val |= 1 << 10; /* internal use */ in rlswitch_attach()
260 val |= 1 << 9; /* internal use */ in rlswitch_attach()
261 val |= 1 << 7; /* internal use */ in rlswitch_attach()
262 val |= 1 << 6; /* internal use */ in rlswitch_attach()
263 val |= 0x12 << 0; /* VLAN B membership */ in rlswitch_attach()
264 MIIBUS_WRITEREG(sc->mii_dev, 1, 24, val); in rlswitch_attach()
267 val = 0; in rlswitch_attach()
268 val |= 1 << 15; /* internal use */ in rlswitch_attach()
269 val |= 1 << 14; /* internal use */ in rlswitch_attach()
270 val |= 1 << 13; /* internal use */ in rlswitch_attach()
271 val |= 1 << 12; /* internal use */ in rlswitch_attach()
272 val |= 0x101 << 0; /* VLAN B ID */ in rlswitch_attach()
273 MIIBUS_WRITEREG(sc->mii_dev, 1, 25, val); in rlswitch_attach()
276 val = 0; in rlswitch_attach()
277 val |= 0x2 << 12; /* Port 2 VLAN Index */ in rlswitch_attach()
278 val |= 1 << 11; /* internal use */ in rlswitch_attach()
279 val |= 1 << 10; /* internal use */ in rlswitch_attach()
280 val |= 1 << 9; /* internal use */ in rlswitch_attach()
281 val |= 1 << 7; /* internal use */ in rlswitch_attach()
282 val |= 1 << 6; /* internal use */ in rlswitch_attach()
283 val |= 0x14 << 0; /* VLAN C membership */ in rlswitch_attach()
284 MIIBUS_WRITEREG(sc->mii_dev, 2, 24, val); in rlswitch_attach()
287 val = 0; in rlswitch_attach()
288 val |= 1 << 15; /* internal use */ in rlswitch_attach()
289 val |= 1 << 14; /* internal use */ in rlswitch_attach()
290 val |= 1 << 13; /* internal use */ in rlswitch_attach()
291 val |= 1 << 12; /* internal use */ in rlswitch_attach()
292 val |= 0x102 << 0; /* VLAN C ID */ in rlswitch_attach()
293 MIIBUS_WRITEREG(sc->mii_dev, 2, 25, val); in rlswitch_attach()
296 val = 0; in rlswitch_attach()
297 val |= 0x3 << 12; /* Port 3 VLAN Index */ in rlswitch_attach()
298 val |= 1 << 11; /* internal use */ in rlswitch_attach()
299 val |= 1 << 10; /* internal use */ in rlswitch_attach()
300 val |= 1 << 9; /* internal use */ in rlswitch_attach()
301 val |= 1 << 7; /* internal use */ in rlswitch_attach()
302 val |= 1 << 6; /* internal use */ in rlswitch_attach()
303 val |= 0x18 << 0; /* VLAN D membership */ in rlswitch_attach()
304 MIIBUS_WRITEREG(sc->mii_dev, 3, 24, val); in rlswitch_attach()
307 val = 0; in rlswitch_attach()
308 val |= 1 << 15; /* internal use */ in rlswitch_attach()
309 val |= 1 << 14; /* internal use */ in rlswitch_attach()
310 val |= 1 << 13; /* internal use */ in rlswitch_attach()
311 val |= 1 << 12; /* internal use */ in rlswitch_attach()
312 val |= 0x103 << 0; /* VLAN D ID */ in rlswitch_attach()
313 MIIBUS_WRITEREG(sc->mii_dev, 3, 25, val); in rlswitch_attach()
316 val = 0; in rlswitch_attach()
317 val |= 0x0 << 12; /* Port 4 VLAN Index */ in rlswitch_attach()
318 val |= 1 << 11; /* internal use */ in rlswitch_attach()
319 val |= 1 << 10; /* internal use */ in rlswitch_attach()
320 val |= 1 << 9; /* internal use */ in rlswitch_attach()
321 val |= 1 << 7; /* internal use */ in rlswitch_attach()
322 val |= 1 << 6; /* internal use */ in rlswitch_attach()
323 val |= 0 << 0; /* VLAN E membership */ in rlswitch_attach()
324 MIIBUS_WRITEREG(sc->mii_dev, 4, 24, val); in rlswitch_attach()
327 val = 0; in rlswitch_attach()
328 val |= 1 << 15; /* internal use */ in rlswitch_attach()
329 val |= 1 << 14; /* internal use */ in rlswitch_attach()
330 val |= 1 << 13; /* internal use */ in rlswitch_attach()
331 val |= 1 << 12; /* internal use */ in rlswitch_attach()
332 val |= 0x104 << 0; /* VLAN E ID */ in rlswitch_attach()
333 MIIBUS_WRITEREG(sc->mii_dev, 4, 25, val); in rlswitch_attach()
381 int phy, reg, val; in rlswitch_phydump() local
389 val = MIIBUS_READREG(sc->mii_dev, phy, reg); in rlswitch_phydump()
390 printf(" 0x%x", val); in rlswitch_phydump()