1 /*-
2  * SPDX-License-Identifier: BSD-4-Clause
19  * 4. Neither the name of the author nor the names of any co-contributors
128 	sc->mii_capabilities = BMSR_100TXFDX & sc->mii_capmask;  in rlswitch_attach()
139 	/* Global Control 0 */  in rlswitch_attach()
143 	val |= 1 << 8;		/* disable VLAN tag admit control */  in rlswitch_attach()
149 	MIIBUS_WRITEREG(sc->mii_dev, 0, 16, val);  in rlswitch_attach()
151 	/* Global Control 2 */  in rlswitch_attach()
156 	val |= 1 << 12;		/* forward reserved control frames */  in rlswitch_attach()
157 	val |= 1 << 11;		/* disable forwarding unicast frames to other VLAN's */  in rlswitch_attach()
158 	val |= 1 << 10;		/* disable forwarding ARP broadcasts to other VLAN's */  in rlswitch_attach()
165 	val |= 1 << 2;		/* disable broadcast storm control */  in rlswitch_attach()
166 	val |= 1 << 1;		/* enable power-on LED blinking */  in rlswitch_attach()
168 	MIIBUS_WRITEREG(sc->mii_dev, 0, 18, val);  in rlswitch_attach()
170 	/* Port 0 Control Register 0 */  in rlswitch_attach()
174 	val |= 1 << 10;		/* disable 802.1p priority classification */  in rlswitch_attach()
175 	val |= 1 << 9;		/* disable diffserv priority classification */  in rlswitch_attach()
181 	MIIBUS_WRITEREG(sc->mii_dev, 0, 22, val);  in rlswitch_attach()
183 	/* Port 1 Control Register 0 */  in rlswitch_attach()
187 	val |= 1 << 10;		/* disable 802.1p priority classification */  in rlswitch_attach()
188 	val |= 1 << 9;		/* disable diffserv priority classification */  in rlswitch_attach()
194 	MIIBUS_WRITEREG(sc->mii_dev, 1, 22, val);  in rlswitch_attach()
196 	/* Port 2 Control Register 0 */  in rlswitch_attach()
200 	val |= 1 << 10;		/* disable 802.1p priority classification */  in rlswitch_attach()
201 	val |= 1 << 9;		/* disable diffserv priority classification */  in rlswitch_attach()
207 	MIIBUS_WRITEREG(sc->mii_dev, 2, 22, val);  in rlswitch_attach()
209 	/* Port 3 Control Register 0 */  in rlswitch_attach()
213 	val |= 1 << 10;		/* disable 802.1p priority classification */  in rlswitch_attach()
214 	val |= 1 << 9;		/* disable diffserv priority classification */  in rlswitch_attach()
220 	MIIBUS_WRITEREG(sc->mii_dev, 3, 22, val);  in rlswitch_attach()
222 	/* Port 4 (system port) Control Register 0 */  in rlswitch_attach()
226 	val |= 1 << 10;		/* disable 802.1p priority classification */  in rlswitch_attach()
227 	val |= 1 << 9;		/* disable diffserv priority classification */  in rlswitch_attach()
233 	MIIBUS_WRITEREG(sc->mii_dev, 4, 22, val);  in rlswitch_attach()
235 	/* Port 0 Control Register 1 and VLAN A */  in rlswitch_attach()
237 	val |= 0x0 << 12;	/* Port 0 VLAN Index */  in rlswitch_attach()
244 	MIIBUS_WRITEREG(sc->mii_dev, 0, 24, val);  in rlswitch_attach()
246 	/* Port 0 Control Register 2 and VLAN A */  in rlswitch_attach()
253 	MIIBUS_WRITEREG(sc->mii_dev, 0, 25, val);  in rlswitch_attach()
255 	/* Port 1 Control Register 1 and VLAN B */  in rlswitch_attach()
257 	val |= 0x1 << 12;	/* Port 1 VLAN Index */  in rlswitch_attach()
264 	MIIBUS_WRITEREG(sc->mii_dev, 1, 24, val);  in rlswitch_attach()
266 	/* Port 1 Control Register 2 and VLAN B */  in rlswitch_attach()
273 	MIIBUS_WRITEREG(sc->mii_dev, 1, 25, val);  in rlswitch_attach()
275 	/* Port 2 Control Register 1 and VLAN C */  in rlswitch_attach()
277 	val |= 0x2 << 12;	/* Port 2 VLAN Index */  in rlswitch_attach()
284 	MIIBUS_WRITEREG(sc->mii_dev, 2, 24, val);  in rlswitch_attach()
286 	/* Port 2 Control Register 2 and VLAN C */  in rlswitch_attach()
293 	MIIBUS_WRITEREG(sc->mii_dev, 2, 25, val);  in rlswitch_attach()
295 	/* Port 3 Control Register 1 and VLAN D */  in rlswitch_attach()
297 	val |= 0x3 << 12;	/* Port 3 VLAN Index */  in rlswitch_attach()
304 	MIIBUS_WRITEREG(sc->mii_dev, 3, 24, val);  in rlswitch_attach()
306 	/* Port 3 Control Register 2 and VLAN D */  in rlswitch_attach()
313 	MIIBUS_WRITEREG(sc->mii_dev, 3, 25, val);  in rlswitch_attach()
315 	/* Port 4 Control Register 1 and VLAN E */  in rlswitch_attach()
317 	val |= 0x0 << 12;	/* Port 4 VLAN Index */  in rlswitch_attach()
324 	MIIBUS_WRITEREG(sc->mii_dev, 4, 24, val);  in rlswitch_attach()
326 	/* Port 4 Control Register 2 and VLAN E */  in rlswitch_attach()
333 	MIIBUS_WRITEREG(sc->mii_dev, 4, 25, val);  in rlswitch_attach()
339 	MIIBUS_MEDIAINIT(sc->mii_dev);  in rlswitch_attach()
369 	struct mii_data *mii = phy->mii_pdata;  in rlswitch_status()
371 	mii->mii_media_status = IFM_AVALID;  in rlswitch_status()
372 	mii->mii_media_active = IFM_ETHER;  in rlswitch_status()
373 	mii->mii_media_status |= IFM_ACTIVE;  in rlswitch_status()
374 	mii->mii_media_active |=  in rlswitch_status()
389 			val = MIIBUS_READREG(sc->mii_dev, phy, reg);  in rlswitch_phydump()