Lines Matching +full:0 +full:x0040
42 #define MII_NSPHY_DCR 0x12 /* Disconnect counter */
44 #define MII_NSPHY_FCSCR 0x13 /* False carrier sense counter */
46 #define MII_NSPHY_RECR 0x15 /* Receive error counter */
48 #define MII_NSPHY_SRR 0x16 /* Silicon revision */
50 #define MII_NSPHY_PCR 0x17 /* PCS sub-layer configuration */
51 #define PCR_NRZI 0x8000 /* NRZI encoding enabled for 100TX */
52 #define PCR_DESCRTOSEL 0x4000 /* descrambler t/o select (2ms) */
53 #define PCR_DESCRTODIS 0x2000 /* descrambler t/o disable */
54 #define PCR_REPEATER 0x1000 /* repeater mode */
55 #define PCR_ENCSEL 0x0800 /* encoder mode select */
56 #define PCR_CLK25MDIS 0x0080 /* CLK25M disable */
57 #define PCR_FLINK100 0x0040 /* force good link in 100mbps */
58 #define PCR_CIMDIS 0x0020 /* carrier integrity monitor disable */
59 #define PCR_TXOFF 0x0010 /* force transmit off */
60 #define PCR_LED1MODE 0x0004 /* LED1 mode: see below */
61 #define PCR_LED4MODE 0x0002 /* LED4 mode: see below */
69 * 0 Normal LED1 operation - 10baseTX and 100baseTX transmission
77 * 0 LED4 output configured to indicate polarity in 10baseT
81 #define MII_NSPHY_LBREMR 0x18 /* Loopback, bypass, error mask */
82 #define LBREMR_BADSSDEN 0x8000 /* enable bad SSD detection */
83 #define LBREMR_BP4B5B 0x4000 /* bypass 4b/5b encoding */
84 #define LBREMR_BPSCR 0x2000 /* bypass scrambler */
85 #define LBREMR_BPALIGN 0x1000 /* bypass alignment function */
86 #define LBREMR_10LOOP 0x0800 /* 10baseT loopback */
87 #define LBREMR_LB1 0x0200 /* loopback ctl 1 */
88 #define LBREMR_LB0 0x0100 /* loopback ctl 0 */
89 #define LBREMR_ALTCRS 0x0040 /* alt crs operation */
90 #define LBREMR_LOOPXMTDIS 0x0020 /* disable transmit in 100TX loopbk */
91 #define LBREMR_CODEERR 0x0010 /* code errors */
92 #define LBREMR_PEERR 0x0008 /* premature end errors */
93 #define LBREMR_LINKERR 0x0004 /* link errors */
94 #define LBREMR_PKTERR 0x0002 /* packet errors */
96 #define MII_NSPHY_PAR 0x19 /* Physical address and status */
97 #define PAR_DISCRSJAB 0x0800 /* disable car sense during jab */
98 #define PAR_ANENSTAT 0x0400 /* autoneg mode status */
99 #define PAR_FEFIEN 0x0100 /* far end fault enable */
100 #define PAR_FDX 0x0080 /* full duplex status */
101 #define PAR_10 0x0040 /* 10mbps mode */
102 #define PAR_CON 0x0020 /* connect status */
103 #define PAR_AMASK 0x001f /* PHY address bits */
105 #define MII_NSPHY_10BTSR 0x1b /* 10baseT status */
106 #define MII_NSPHY_10BTCR 0x1c /* 10baseT configuration */