Lines Matching +full:bypass +full:- +full:enable

1 /*-
2  * SPDX-License-Identifier: BSD-4-Clause
18  * 4. Neither the name of the author nor the names of any co-contributors
52 #define CIPHY_BMCR_CTEST	0x0080	/* Collision test enable */
137 #define CIPHY_1000CTL_MSE	0x1000	/* Master/Slave manual enable */
159 #define CIPHY_EXTSTS_X_FD_CAP	0x8000	/* 1000base-X FD capable */
160 #define CIPHY_EXTSTS_X_HD_CAP	0x4000	/* 1000base-X HD capable */
161 #define CIPHY_EXTSTS_T_FD_CAP	0x2000	/* 1000base-T FD capable */
162 #define CIPHY_EXTSTS_T_HD_CAP	0x1000	/* 1000base-T HD capable */
171 /* Vendor-specific PHY registers */
195 #define CIPHY_1000STS2_BCM5400	0x0040	/* non-complient BCM5400 detected */
197 /* Bypass control register */
200 #define CIPHY_BYPASS_4B5B	0x4000	/* bypass the 4B5B encoder */
201 #define CIPHY_BYPASS_SCRAM	0x2000	/* bypass scrambler */
202 #define CIPHY_BYPASS_DSCAM	0x1000	/* bypass descrambler */
203 #define CIPHY_BYPASS_PCSRX	0x0800	/* bypass PCS receive */
204 #define CIPHY_BYPASS_PCSTX	0x0400	/* bypass PCS transmit */
205 #define CIPHY_BYPASS_LFI	0x0200	/* bypass LFI timer */
206 #define CIPHY_BYPASS_TXCLK	0x0100	/* enable transmit clock on LED4 pin */
208 #define CIPHY_BYPASS_BCM5400	0x0040	/* bypass BCM5400 detect */
211 #define CIPHY_BYPASS_PARALLEL	0x0008	/* parallel detect enable */
253 #define CIPHY_ECTL1_ACTIPHY	0x0020	/* Enable ActiPHY power saving */
283 #define CIPHY_IMR_PINENABLE	0x8000	/* Interrupt pin enable */
331 #define CIPHY_LED_PULSE		0x0008	/* LED pulse enable */
332 #define CIPHY_LED_LINKACTBLINK	0x0004	/* enable link/activity LED blink */
339 #define CIPHY_AUXCSR_XOVER	0x2000	/* MDI/MDI-X crossover indication */